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Razvalyaev:test_configs
Razvalyaev:stm32f103_diplom
Razvalyaev:NewPWM_Matlab
Razvalyaev:stm32f103_steps_for_diplom
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pull from: Razvalyaev:NewPWM_Matlab
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Razvalyaev:NewPWM_Matlab
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Razvalyaev:main

13 Commits
main ... NewPWM_Mat

Author SHA1 Message Date
Razvalyaev
f3774d2e0b 2023 симулинк перенес на 2021 2025-05-16 16:23:20 +03:00
Razvalyaev
05f62db4ab добавлен двигатель который крутиться (с диплома) 2025-05-16 16:21:01 +03:00
Razvalyaev
d464506c32 Merge branch 'NewPWM_Matlab' of https://git.arktika.cyou/set506/matlab_stm_emulate into NewPWM_Matlab 2025-05-12 09:16:49 +03:00
Razvalyaev
fb310675aa добавлена обратная связь по скорости 2025-05-12 09:16:26 +03:00
Razvalyaev
8d7afff1c3 подправлен main.c под новую структуру проекта 2025-04-25 00:47:35 +03:00
Razvalyaev
8c6e7fd7f1 Запущен движок алгоритотм NewPWM 2025-04-24 18:26:25 +03:00
Razvalyaev
4433c7df9c Сделан центрированный центрированный режим счета 2025-04-01 14:07:36 +03:00
Razvalyaev
f856b33e1c через дефайн убран поток приложения мк 2025-03-31 16:29:01 +03:00
Razvalyaev
87c9cd01ff красивые токи без двигателя, но напряжение непонятное... 2025-03-26 16:32:55 +03:00
Razvalyaev
98ebd8943c Удален ненужный settings.c 2025-03-26 14:21:48 +03:00
Razvalyaev
0d80b52d9b Запущена симуляция переструктурированного проекта 2025-03-26 12:28:15 +03:00
Razvalyaev
7b6cc2fa50 Удален старые сурсы. Проект компилится но не проверен в симулинке 2025-03-25 14:55:28 +03:00
Razvalyaev
4556b453db Переструктурирован проект. Сурсы вынесены за этот гит. Здесь осталась только оболочка 
также был тест компилятора mingw, следующие ошибки:
- переопределение __INT64_C, __UINT64_C
- и еше какие-то проблемы с intmax_t uintmax_t
 2025-03-25 14:54:36 +03:00
1458 changed files with 359290 additions and 7577 deletions
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173
Code/Core/Src/main.c → App_Wrapper/main.c
View File

@ -65,45 +65,95 @@ void SystemClock_Config(void);
*/
void Periph_reInit(void)
{
// wait for reinit modbus coil (requested by modbus interrupt)
if(MB_Read_Coil_Global(COIL_UART_CTRL_GLOBAL, NULL) && hmodbus1.fTX_Done)
unsigned UpdatePWMTIM = 0;
unsigned UpdateLog = 0;
// if (sin3Phase)
// coils_regs[0]=0xc;
//////////////âêë/âûêë 74AC08//////////
if ((GPIOC->IDR & (1 << 1)) == 0)
GPIOC->ODR &= ~(1 << 0);
else
GPIOC->ODR |= (1 << 0);
///////////////////////////////////////
// wait for reinit modbus coil (requested by modbus interrupt)
if (MB_Read_Coil_Global(COIL_UART_CTRL_GLOBAL, NULL) && hmodbus1.fTX_Done)
{
MB_Write_Coil_Global(COIL_UART_CTRL_GLOBAL, RESET_COIL);
modbus1_suart.huart.Init.BaudRate = uart_ctrl[R_UART_CTRL_SPEED];
RS_ReInit_UART(&hmodbus1 ,&modbus1_suart);
RS_ReInit_UART(&hmodbus1, &modbus1_suart);
}
// fait for reinit log timer (requested by modbus interrupt)
if((TIM_CTRL.sTimFreqHz != log_ctrl[R_LOG_CTRL_LOG_HZ]) && (log_ctrl[R_LOG_CTRL_LOG_HZ] != 0))
if ((TIM_CTRL.sTimFreqHz != log_ctrl[R_LOG_CTRL_LOG_HZ]) && (log_ctrl[R_LOG_CTRL_LOG_HZ] != 0))
{
TIM_CTRL.sTimFreqHz = log_ctrl[R_LOG_CTRL_LOG_HZ];
// clear logs params
Set_Log_Params();
// update logs params
UpdateLog = 1;
TIM_Base_MspDeInit(&TIM_CTRL.htim);
Control_Timer_ReInit(&TIM_CTRL);
// hpwm_a.hramp[PWM_RampSineHz_Ind].SampleT = 1.0f/TIM_CTRL.sTimFreqHz;
// hpwm_a.hramp[PWM_RampPWMDuty_Ind].SampleT = 1.0f/TIM_CTRL.sTimFreqHz;
}
// READ TIM_PWM_HZ
if(hpwm1.stim.sTimFreqHz != pwm_ctrl[R_PWM_CTRL_PWM_HZ])
if (hpwm.tim_a.stim.sTimFreqHz != pwm_ctrl[R_PWM_CTRL_PWM_HZ])
{
hpwm1.stim.sTimFreqHz = pwm_ctrl[R_PWM_CTRL_PWM_HZ];
pwm_ctrl[R_PWM_CTRL_PWM_HZ] = hpwm1.stim.sTimFreqHz;
hpwm.tim_a.stim.sTimFreqHz = pwm_ctrl[R_PWM_CTRL_PWM_HZ];
pwm_ctrl[R_PWM_CTRL_PWM_HZ] = hpwm.tim_a.stim.sTimFreqHz;
// update tim
UpdatePWMTIM = 1;
// update logs params
Set_Log_Params();
// reinit tim
PWM_Sine_ReInit(&hpwm1);
PWM_SlavePhase_reInit(&hpwm2);
PWM_SlavePhase_reInit(&hpwm3);
UpdateLog = 1;
}
// READ TICKBASE_PRESCALER
if (hpwm.tim_a.stim.sTickBasePrescaler != pwm_ctrl[R_PWM_CTRL_TICKBASE_PRESCALER])
{
if ((hpwm.tim_a.stim.sTickBasePrescaler > 1) ||
(pwm_ctrl[R_PWM_CTRL_TICKBASE_PRESCALER] > 1))
{
hpwm.tim_a.stim.sTickBasePrescaler = pwm_ctrl[R_PWM_CTRL_TICKBASE_PRESCALER];
pwm_ctrl[R_PWM_CTRL_TICKBASE_PRESCALER] = hpwm.tim_a.stim.sTickBasePrescaler;
// update tim
UpdatePWMTIM = 1;
// update logs params
UpdateLog = 1;
}
}
// UPDATE LOG PARAMS
if (UpdateLog)
{
// set logs params
Set_Log_Params();
}
// UPDATE PWM TIM PARAMS
if (UpdatePWMTIM)
{
// reinit tims
PWM_Sine_ReInit(&hpwm);
// UPDATE DUTY TABLE SCALE
PWM_Update_Params(&hpwm);
}
}
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
int main_init(void)
{
/* USER CODE BEGIN 1 */
__HAL_DBGMCU_FREEZE_TIM1();
@ -139,37 +189,38 @@ int main(void)
/* Infinite loop */
/* USER CODE BEGIN WHILE */
// init params for pwm and log
pwm_ctrl[R_PWM_CTRL_PWM_VALUE] = 2560;
pwm_ctrl[R_PWM_CTRL_PWM_HZ] = HZ_TIMER_PWM;
pwm_ctrl[R_PWM_CTRL_MIN_PULSE_DUR] = 30;
pwm_ctrl[R_PWM_CTRL_DEAD_TIME] = 1;
pwm_ctrl[R_PWM_CTRL_SIN_TABLE_SIZE] = SIN_TABLE_SIZE_MAX;
//MB_Write_Coil_Global(COIL_PWM_DC_MODE_GLOBAL, SET_COIL);
MB_Write_Coil_Global(COIL_PWM_CH_MODE_GLOBAL, SET_COIL);
MB_Write_Coil_Global(COIL_PWM_PHASE_MODE_GLOBAL, SET_COIL);
// init params for pwm and log
pwm_ctrl[R_PWM_CTRL_PWM_SINE_HZ] = 10000;
pwm_ctrl[R_PWM_CTRL_DUTY_BRIDGE] = 10000;//HZ_TIMER_PWM;
pwm_ctrl[R_PWM_CTRL_PWM_HZ] = 15000;//HZ_TIMER_PWM;
pwm_ctrl[R_PWM_CTRL_MAX_PULSE_DUR] = 0;
pwm_ctrl[R_PWM_CTRL_MIN_PULSE_DUR] = 0;
pwm_ctrl[R_PWM_CTRL_DEAD_TIME] = 100;
pwm_ctrl[R_PWM_CTRL_SIN_TABLE_SIZE] = SIN_TABLE_SIZE_MAX;
MB_Write_Coil_Global(COIL_PWM_PHASE_MODE_GLOBAL, SET_COIL);
MB_Write_Coil_Global(COIL_PWM_BRIDGE_MODE_GLOBAL, SET_COIL);
MB_Write_Coil_Global(COIL_PWM_DC_MODE_GLOBAL, SET_COIL);
log_ctrl[R_LOG_CTRL_LOG_HZ] = HZ_TIMER_CTRL;
log_ctrl[R_LOG_CTRL_LOG_SIZE] = 50;
log_ctrl[R_LOG_CTRL_LOG_PWM_NUMB] = 3;
log_ctrl[R_LOG_CTRL_LOG_HZ] = HZ_TIMER_CTRL;
log_ctrl[R_LOG_CTRL_LOG_SIZE] = 50;
log_ctrl[R_LOG_CTRL_LOG_PWM_NUMB] = 3;
WriteSettingsToMem();
MODBUS_FirstInit();
Control_Timer_FirstInit();
PWM_Sine_FirstInit();
MODBUS_FirstInit();
Control_Timer_FirstInit();
PWM_Sine_FirstInit();
//---------------TEST MODBUS------------------
// MODBUS_Transmit_IT(&hmodbus1, &MODBUS_MSG);
//RS_Receive_IT(&hmodbus1, &MODBUS_MSG);
while (1)
{
/* USER CODE END WHILE */
Periph_reInit();
/* USER CODE BEGIN 3 */
// HAL_Delay(200);
// MB_Toogle_Coil_Local(&GPIOD->ODR, COIL_GPIOD_LED3);
}
// while (1)
// {
// /* USER CODE END WHILE */
// Periph_reInit();
// /* USER CODE BEGIN 3 */
//// HAL_Delay(200);
//// MB_Toogle_Coil_Local(&GPIOD->ODR, COIL_GPIOD_LED3);
// }
/* USER CODE END 3 */
}
@ -179,48 +230,14 @@ int main(void)
*/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = 8;
RCC_OscInitStruct.PLL.PLLN = 72;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 4;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
{
Error_Handler();
}
}
/* USER CODE BEGIN 4 */
HAL_StatusTypeDef HAL_FLASH_Unlock() {}
HAL_StatusTypeDef HAL_FLASH_Lock() {}
HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data) {}
HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef* pEraseInit, uint32_t* SectorError) {}
HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout) {}
/* USER CODE END 4 */
/**

49
Code/Core/Inc/gpio.h
View File

@ -1,49 +0,0 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file gpio.h
* @brief This file contains all the function prototypes for
* the gpio.c file
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __GPIO_H__
#define __GPIO_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_GPIO_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /*__ GPIO_H__ */

69
Code/Core/Inc/main.h
View File

@ -1,69 +0,0 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.h
* @brief : Header for main.c file.
* This file contains the common defines of the application.
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void Error_Handler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
#ifdef __cplusplus
}
#endif
#endif /* __MAIN_H */

495
Code/Core/Inc/stm32f4xx_hal_conf.h
View File

@ -1,495 +0,0 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f4xx_hal_conf_template.h
* @author MCD Application Team
* @brief HAL configuration template file.
* This file should be copied to the application folder and renamed
* to stm32f4xx_hal_conf.h.
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F4xx_HAL_CONF_H
#define __STM32F4xx_HAL_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* ########################## Module Selection ############################## */
/**
* @brief This is the list of modules to be used in the HAL driver
*/
#define HAL_MODULE_ENABLED
/* #define HAL_CRYP_MODULE_ENABLED */
/* #define HAL_ADC_MODULE_ENABLED */
/* #define HAL_CAN_MODULE_ENABLED */
/* #define HAL_CRC_MODULE_ENABLED */
/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
#define HAL_DAC_MODULE_ENABLED
/* #define HAL_DCMI_MODULE_ENABLED */
/* #define HAL_DMA2D_MODULE_ENABLED */
/* #define HAL_ETH_MODULE_ENABLED */
/* #define HAL_ETH_LEGACY_MODULE_ENABLED */
/* #define HAL_NAND_MODULE_ENABLED */
/* #define HAL_NOR_MODULE_ENABLED */
/* #define HAL_PCCARD_MODULE_ENABLED */
/* #define HAL_SRAM_MODULE_ENABLED */
/* #define HAL_SDRAM_MODULE_ENABLED */
/* #define HAL_HASH_MODULE_ENABLED */
/* #define HAL_I2C_MODULE_ENABLED */
/* #define HAL_I2S_MODULE_ENABLED */
/* #define HAL_IWDG_MODULE_ENABLED */
/* #define HAL_LTDC_MODULE_ENABLED */
/* #define HAL_RNG_MODULE_ENABLED */
/* #define HAL_RTC_MODULE_ENABLED */
/* #define HAL_SAI_MODULE_ENABLED */
/* #define HAL_SD_MODULE_ENABLED */
/* #define HAL_MMC_MODULE_ENABLED */
/* #define HAL_SPI_MODULE_ENABLED */
#define HAL_TIM_MODULE_ENABLED
#define HAL_UART_MODULE_ENABLED
#define HAL_USART_MODULE_ENABLED
/* #define HAL_IRDA_MODULE_ENABLED */
/* #define HAL_SMARTCARD_MODULE_ENABLED */
/* #define HAL_SMBUS_MODULE_ENABLED */
/* #define HAL_WWDG_MODULE_ENABLED */
/* #define HAL_PCD_MODULE_ENABLED */
/* #define HAL_HCD_MODULE_ENABLED */
/* #define HAL_DSI_MODULE_ENABLED */
/* #define HAL_QSPI_MODULE_ENABLED */
/* #define HAL_QSPI_MODULE_ENABLED */
/* #define HAL_CEC_MODULE_ENABLED */
/* #define HAL_FMPI2C_MODULE_ENABLED */
/* #define HAL_FMPSMBUS_MODULE_ENABLED */
/* #define HAL_SPDIFRX_MODULE_ENABLED */
/* #define HAL_DFSDM_MODULE_ENABLED */
/* #define HAL_LPTIM_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
#define HAL_EXTI_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED
#define HAL_PWR_MODULE_ENABLED
#define HAL_CORTEX_MODULE_ENABLED
/* ########################## HSE/HSI Values adaptation ##################### */
/**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/**
* @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL).
*/
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @brief Internal Low Speed oscillator (LSI) value.
*/
#if !defined (LSI_VALUE)
#define LSI_VALUE 32000U /*!< LSI Typical Value in Hz*/
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations
in voltage and temperature.*/
/**
* @brief External Low Speed oscillator (LSE) value.
*/
#if !defined (LSE_VALUE)
#define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */
#endif /* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
#endif /* LSE_STARTUP_TIMEOUT */
/**
* @brief External clock source for I2S peripheral
* This value is used by the I2S HAL module to compute the I2S clock source
* frequency, this source is inserted directly through I2S_CKIN pad.
*/
#if !defined (EXTERNAL_CLOCK_VALUE)
#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External audio frequency in Hz*/
#endif /* EXTERNAL_CLOCK_VALUE */
/* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */
/* ########################### System Configuration ######################### */
/**
* @brief This is the HAL system configuration section
*/
#define VDD_VALUE 3300U /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY 15U /*!< tick interrupt priority */
#define USE_RTOS 0U
#define PREFETCH_ENABLE 1U
#define INSTRUCTION_CACHE_ENABLE 1U
#define DATA_CACHE_ENABLE 1U
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */
#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */
#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */
#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */
#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
#define USE_HAL_FMPI2C_REGISTER_CALLBACKS 0U /* FMPI2C register callback disabled */
#define USE_HAL_FMPSMBUS_REGISTER_CALLBACKS 0U /* FMPSMBUS register callback disabled */
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */
#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */
#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */
#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */
#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
/* ########################## Assert Selection ############################## */
/**
* @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code
*/
/* #define USE_FULL_ASSERT 1U */
/* ################## Ethernet peripheral configuration ##################### */
/* Section 1 : Ethernet peripheral configuration */
/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
#define MAC_ADDR0 2U
#define MAC_ADDR1 0U
#define MAC_ADDR2 0U
#define MAC_ADDR3 0U
#define MAC_ADDR4 0U
#define MAC_ADDR5 0U
/* Definition of the Ethernet driver buffers size and count */
#define ETH_RX_BUF_SIZE /* buffer size for receive */
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
#define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
/* Section 2: PHY configuration section */
/* DP83848_PHY_ADDRESS Address*/
#define DP83848_PHY_ADDRESS 0x01U
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
#define PHY_RESET_DELAY 0x000000FFU
/* PHY Configuration delay */
#define PHY_CONFIG_DELAY 0x00000FFFU
#define PHY_READ_TO 0x0000FFFFU
#define PHY_WRITE_TO 0x0000FFFFU
/* Section 3: Common PHY Registers */
#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */
#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */
#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */
#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */
#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */
#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */
#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */
#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
/* Section 4: Extended PHY Registers */
#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */
#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
/* ################## SPI peripheral configuration ########################## */
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
* Activated: CRC code is present inside driver
* Deactivated: CRC code cleaned from driver
*/
#define USE_SPI_CRC 0U
/* Includes ------------------------------------------------------------------*/
/**
* @brief Include module's header file
*/
#ifdef HAL_RCC_MODULE_ENABLED
#include "stm32f4xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32f4xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_EXTI_MODULE_ENABLED
#include "stm32f4xx_hal_exti.h"
#endif /* HAL_EXTI_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED
#include "stm32f4xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32f4xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
#include "stm32f4xx_hal_adc.h"
#endif /* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_CAN_MODULE_ENABLED
#include "stm32f4xx_hal_can.h"
#endif /* HAL_CAN_MODULE_ENABLED */
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
#include "stm32f4xx_hal_can_legacy.h"
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32f4xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_CRYP_MODULE_ENABLED
#include "stm32f4xx_hal_cryp.h"
#endif /* HAL_CRYP_MODULE_ENABLED */
#ifdef HAL_DMA2D_MODULE_ENABLED
#include "stm32f4xx_hal_dma2d.h"
#endif /* HAL_DMA2D_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED
#include "stm32f4xx_hal_dac.h"
#endif /* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_DCMI_MODULE_ENABLED
#include "stm32f4xx_hal_dcmi.h"
#endif /* HAL_DCMI_MODULE_ENABLED */
#ifdef HAL_ETH_MODULE_ENABLED
#include "stm32f4xx_hal_eth.h"
#endif /* HAL_ETH_MODULE_ENABLED */
#ifdef HAL_ETH_LEGACY_MODULE_ENABLED
#include "stm32f4xx_hal_eth_legacy.h"
#endif /* HAL_ETH_LEGACY_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32f4xx_hal_flash.h"
#endif /* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_SRAM_MODULE_ENABLED
#include "stm32f4xx_hal_sram.h"
#endif /* HAL_SRAM_MODULE_ENABLED */
#ifdef HAL_NOR_MODULE_ENABLED
#include "stm32f4xx_hal_nor.h"
#endif /* HAL_NOR_MODULE_ENABLED */
#ifdef HAL_NAND_MODULE_ENABLED
#include "stm32f4xx_hal_nand.h"
#endif /* HAL_NAND_MODULE_ENABLED */
#ifdef HAL_PCCARD_MODULE_ENABLED
#include "stm32f4xx_hal_pccard.h"
#endif /* HAL_PCCARD_MODULE_ENABLED */
#ifdef HAL_SDRAM_MODULE_ENABLED
#include "stm32f4xx_hal_sdram.h"
#endif /* HAL_SDRAM_MODULE_ENABLED */
#ifdef HAL_HASH_MODULE_ENABLED
#include "stm32f4xx_hal_hash.h"
#endif /* HAL_HASH_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32f4xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_SMBUS_MODULE_ENABLED
#include "stm32f4xx_hal_smbus.h"
#endif /* HAL_SMBUS_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED
#include "stm32f4xx_hal_i2s.h"
#endif /* HAL_I2S_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32f4xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_LTDC_MODULE_ENABLED
#include "stm32f4xx_hal_ltdc.h"
#endif /* HAL_LTDC_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32f4xx_hal_pwr.h"
#endif /* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_RNG_MODULE_ENABLED
#include "stm32f4xx_hal_rng.h"
#endif /* HAL_RNG_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32f4xx_hal_rtc.h"
#endif /* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_SAI_MODULE_ENABLED
#include "stm32f4xx_hal_sai.h"
#endif /* HAL_SAI_MODULE_ENABLED */
#ifdef HAL_SD_MODULE_ENABLED
#include "stm32f4xx_hal_sd.h"
#endif /* HAL_SD_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32f4xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32f4xx_hal_tim.h"
#endif /* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
#include "stm32f4xx_hal_uart.h"
#endif /* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
#include "stm32f4xx_hal_usart.h"
#endif /* HAL_USART_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32f4xx_hal_irda.h"
#endif /* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32f4xx_hal_smartcard.h"
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32f4xx_hal_wwdg.h"
#endif /* HAL_WWDG_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32f4xx_hal_pcd.h"
#endif /* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_HCD_MODULE_ENABLED
#include "stm32f4xx_hal_hcd.h"
#endif /* HAL_HCD_MODULE_ENABLED */
#ifdef HAL_DSI_MODULE_ENABLED
#include "stm32f4xx_hal_dsi.h"
#endif /* HAL_DSI_MODULE_ENABLED */
#ifdef HAL_QSPI_MODULE_ENABLED
#include "stm32f4xx_hal_qspi.h"
#endif /* HAL_QSPI_MODULE_ENABLED */
#ifdef HAL_CEC_MODULE_ENABLED
#include "stm32f4xx_hal_cec.h"
#endif /* HAL_CEC_MODULE_ENABLED */
#ifdef HAL_FMPI2C_MODULE_ENABLED
#include "stm32f4xx_hal_fmpi2c.h"
#endif /* HAL_FMPI2C_MODULE_ENABLED */
#ifdef HAL_FMPSMBUS_MODULE_ENABLED
#include "stm32f4xx_hal_fmpsmbus.h"
#endif /* HAL_FMPSMBUS_MODULE_ENABLED */
#ifdef HAL_SPDIFRX_MODULE_ENABLED
#include "stm32f4xx_hal_spdifrx.h"
#endif /* HAL_SPDIFRX_MODULE_ENABLED */
#ifdef HAL_DFSDM_MODULE_ENABLED
#include "stm32f4xx_hal_dfsdm.h"
#endif /* HAL_DFSDM_MODULE_ENABLED */
#ifdef HAL_LPTIM_MODULE_ENABLED
#include "stm32f4xx_hal_lptim.h"
#endif /* HAL_LPTIM_MODULE_ENABLED */
#ifdef HAL_MMC_MODULE_ENABLED
#include "stm32f4xx_hal_mmc.h"
#endif /* HAL_MMC_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32F4xx_HAL_CONF_H */

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f4xx_it.h
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F4xx_IT_H
#define __STM32F4xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
#ifdef __cplusplus
}
#endif
#endif /* __STM32F4xx_IT_H */

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// TRACE SETTINGS
#define TRACE_MB_UART_ENABLE 14
//#define TRACE_MB_TIM_ENABLE 15
#define TRACE_TIM_PWM_ENABLE 15
//#define TRACE_PWM_REINIT_ENABLE 15
//#define TRACE_TIM_DEAD_TIME_ENABLE 14
//#define TRACE_TIM_CTRL_ENABLE 15
#define TRACE_GPIO_ENTER(_gpio_,_pin_) (_gpio_)->BSRR = (1<<(_pin_))
#define TRACE_GPIO_EXIT(_gpio_,_pin_) (_gpio_)->BSRR = (1<<((_pin_)+16))
#ifdef TRACE_MB_UART_ENABLE
#define Trace_MB_UART_Enter() TRACE_GPIO_ENTER(GPIOD, TRACE_MB_UART_ENABLE)
#define Trace_MB_UART_Exit() TRACE_GPIO_EXIT(GPIOD, TRACE_MB_UART_ENABLE)
#endif
#ifdef TRACE_MB_TIM_ENABLE
#define Trace_MB_TIM_Enter() TRACE_GPIO_ENTER(GPIOD, TRACE_MB_TIM_ENABLE)
#define Trace_MB_TIM_Exit() TRACE_GPIO_EXIT(GPIOD, TRACE_MB_TIM_ENABLE)
#endif
#ifdef TRACE_TIM_PWM_ENABLE
#define Trace_PWM_TIM_Enter() TRACE_GPIO_ENTER(GPIOD, TRACE_TIM_PWM_ENABLE)
#define Trace_PWM_TIM_Exit() TRACE_GPIO_EXIT(GPIOD, TRACE_TIM_PWM_ENABLE)
#endif
#ifdef TRACE_PWM_REINIT_ENABLE
#define Trace_PWM_reInit_Enter() TRACE_GPIO_ENTER(GPIOD, TRACE_PWM_REINIT_ENABLE)
#define Trace_PWM_reInit_Exit() TRACE_GPIO_EXIT(GPIOD, TRACE_PWM_REINIT_ENABLE)
#endif
#ifdef TRACE_TIM_DEAD_TIME_ENABLE
#define Trace_PWM_DeadTime_Enter() TRACE_GPIO_ENTER(GPIOD, TRACE_TIM_DEAD_TIME_ENABLE)
#define Trace_PWM_DeadTime_Exit() TRACE_GPIO_EXIT(GPIOD, TRACE_TIM_DEAD_TIME_ENABLE)
#endif
#ifdef TRACE_TIM_CTRL_ENABLE
#define Trace_CTRL_TIM_Enter() TRACE_GPIO_ENTER(GPIOD, TRACE_TIM_CTRL_ENABLE)
#define Trace_CTRL_TIM_Exit() TRACE_GPIO_EXIT(GPIOD, TRACE_TIM_CTRL_ENABLE)
#endif
#ifndef Trace_MB_UART_Enter
#define Trace_MB_UART_Enter()
#endif
#ifndef Trace_MB_UART_Exit
#define Trace_MB_UART_Exit()
#endif
#ifndef Trace_MB_TIM_Enter
#define Trace_MB_TIM_Enter()
#endif
#ifndef Trace_MB_TIM_Exit
#define Trace_MB_TIM_Exit()
#endif
#ifndef Trace_PWM_TIM_Enter
#define Trace_PWM_TIM_Enter()
#endif
#ifndef Trace_PWM_TIM_Exit
#define Trace_PWM_TIM_Exit()
#endif
#ifndef Trace_CTRL_TIM_Enter
#define Trace_CTRL_TIM_Enter()
#endif
#ifndef Trace_CTRL_TIM_Exit
#define Trace_CTRL_TIM_Exit()
#endif
#ifndef Trace_PWM_reInit_Enter
#define Trace_PWM_reInit_Enter()
#endif
#ifndef Trace_PWM_reInit_Exit
#define Trace_PWM_reInit_Exit()
#endif
#ifndef Trace_PWM_DeadTime_Enter
#define Trace_PWM_DeadTime_Enter()
#endif
#ifndef Trace_PWM_DeadTime_Exit
#define Trace_PWM_DeadTime_Exit()
#endif

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file gpio.c
* @brief This file provides code for the configuration
* of all used GPIO pins.
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "gpio.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/*----------------------------------------------------------------------------*/
/* Configure GPIO */
/*----------------------------------------------------------------------------*/
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/** Configure pins as
* Analog
* Input
* Output
* EVENT_OUT
* EXTI
*/
void MX_GPIO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOH_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
/*Configure GPIO pin : PC13 */
GPIO_InitStruct.Pin = GPIO_PIN_15 | GPIO_PIN_14 | GPIO_PIN_13 | GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_PULLDOWN;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
}
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f4xx_hal_msp.c
* @brief This file provides code for the MSP Initialization
* and de-Initialization codes.
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN Define */
/* USER CODE END Define */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN Macro */
/* USER CODE END Macro */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* External functions --------------------------------------------------------*/
/* USER CODE BEGIN ExternalFunctions */
/* USER CODE END ExternalFunctions */
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_SYSCFG_CLK_ENABLE();
__HAL_RCC_PWR_CLK_ENABLE();
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f4xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32f4xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
/* USER CODE BEGIN EV */
/* USER CODE END EV */
/******************************************************************************/
/* Cortex-M4 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
{
}
/* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
return;
/* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
/* USER CODE END W1_MemoryManagement_IRQn 0 */
}
}
/**
* @brief This function handles Pre-fetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
/* USER CODE END W1_BusFault_IRQn 0 */
}
}
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
/* USER CODE END W1_UsageFault_IRQn 0 */
}
}
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
/* USER CODE BEGIN SVCall_IRQn 0 */
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
/* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
/******************************************************************************/
/* STM32F4xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32f4xx.s). */
/******************************************************************************/
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

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/**
******************************************************************************
* @file system_stm32f4xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
*
* This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f4xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f4xx_system
* @{
*/
/** @addtogroup STM32F4xx_System_Private_Includes
* @{
*/
#include "stm32f4xx.h"
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @}
*/
/** @addtogroup STM32F4xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F4xx_System_Private_Defines
* @{
*/
/************************* Miscellaneous Configuration ************************/
/*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory */
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
|| defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|| defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||\
STM32F412Zx || STM32F412Vx */
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|| defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
/* #define DATA_IN_ExtSDRAM */
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
STM32F479xx */
/* Note: Following vector table addresses must be defined in line with linker
configuration. */
/*!< Uncomment the following line if you need to relocate the vector table
anywhere in Flash or Sram, else the vector table is kept at the automatic
remap of boot address selected */
/* #define USER_VECT_TAB_ADDRESS */
#if defined(USER_VECT_TAB_ADDRESS)
/*!< Uncomment the following line if you need to relocate your vector Table
in Sram else user remap will be done in Flash. */
/* #define VECT_TAB_SRAM */
#if defined(VECT_TAB_SRAM)
#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
#else
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
#endif /* VECT_TAB_SRAM */
#endif /* USER_VECT_TAB_ADDRESS */
/******************************************************************************/
/**
* @}
*/
/** @addtogroup STM32F4xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F4xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
* @{
*/
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
/**
* @}
*/
/** @addtogroup STM32F4xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the FPU setting, vector table location and External memory
* configuration.
* @param None
* @retval None
*/
void SystemInit(void)
{
/* FPU settings ------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
#endif
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#endif /* USER_VECT_TAB_ADDRESS */
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
* 16 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
* depends on the application requirements), user has to ensure that HSE_VALUE
* is same as the real frequency of the crystal used. Otherwise, this function
* may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
*
* @param None
* @retval None
*/
void SystemCoreClockUpdate(void)
{
uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00: /* HSI used as system clock source */
SystemCoreClock = HSI_VALUE;
break;
case 0x04: /* HSE used as system clock source */
SystemCoreClock = HSE_VALUE;
break;
case 0x08: /* PLL used as system clock source */
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
SYSCLK = PLL_VCO / PLL_P
*/
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
if (pllsource != 0)
{
/* HSE used as PLL clock source */
pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
}
else
{
/* HSI used as PLL clock source */
pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
}
pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
SystemCoreClock = pllvco/pllp;
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK frequency --------------------------------------------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
/* HCLK frequency */
SystemCoreClock >>= tmp;
}
#if defined (DATA_IN_ExtSRAM) && defined (DATA_IN_ExtSDRAM)
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|| defined(STM32F469xx) || defined(STM32F479xx)
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f4xx.s before jump to main.
* This function configures the external memories (SRAM/SDRAM)
* This SRAM/SDRAM will be used as program data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmp = 0x00;
register uint32_t tmpreg = 0, timeout = 0xFFFF;
register __IO uint32_t index;
/* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface clock */
RCC->AHB1ENR |= 0x000001F8;
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
/* Connect PDx pins to FMC Alternate function */
GPIOD->AFR[0] = 0x00CCC0CC;
GPIOD->AFR[1] = 0xCCCCCCCC;
/* Configure PDx pins in Alternate function mode */
GPIOD->MODER = 0xAAAA0A8A;
/* Configure PDx pins speed to 100 MHz */
GPIOD->OSPEEDR = 0xFFFF0FCF;
/* Configure PDx pins Output type to push-pull */
GPIOD->OTYPER = 0x00000000;
/* No pull-up, pull-down for PDx pins */
GPIOD->PUPDR = 0x00000000;
/* Connect PEx pins to FMC Alternate function */
GPIOE->AFR[0] = 0xC00CC0CC;
GPIOE->AFR[1] = 0xCCCCCCCC;
/* Configure PEx pins in Alternate function mode */
GPIOE->MODER = 0xAAAA828A;
/* Configure PEx pins speed to 100 MHz */
GPIOE->OSPEEDR = 0xFFFFC3CF;
/* Configure PEx pins Output type to push-pull */
GPIOE->OTYPER = 0x00000000;
/* No pull-up, pull-down for PEx pins */
GPIOE->PUPDR = 0x00000000;
/* Connect PFx pins to FMC Alternate function */
GPIOF->AFR[0] = 0xCCCCCCCC;
GPIOF->AFR[1] = 0xCCCCCCCC;
/* Configure PFx pins in Alternate function mode */
GPIOF->MODER = 0xAA800AAA;
/* Configure PFx pins speed to 50 MHz */
GPIOF->OSPEEDR = 0xAA800AAA;
/* Configure PFx pins Output type to push-pull */
GPIOF->OTYPER = 0x00000000;
/* No pull-up, pull-down for PFx pins */
GPIOF->PUPDR = 0x00000000;
/* Connect PGx pins to FMC Alternate function */
GPIOG->AFR[0] = 0xCCCCCCCC;
GPIOG->AFR[1] = 0xCCCCCCCC;
/* Configure PGx pins in Alternate function mode */
GPIOG->MODER = 0xAAAAAAAA;
/* Configure PGx pins speed to 50 MHz */
GPIOG->OSPEEDR = 0xAAAAAAAA;
/* Configure PGx pins Output type to push-pull */
GPIOG->OTYPER = 0x00000000;
/* No pull-up, pull-down for PGx pins */
GPIOG->PUPDR = 0x00000000;
/* Connect PHx pins to FMC Alternate function */
GPIOH->AFR[0] = 0x00C0CC00;
GPIOH->AFR[1] = 0xCCCCCCCC;
/* Configure PHx pins in Alternate function mode */
GPIOH->MODER = 0xAAAA08A0;
/* Configure PHx pins speed to 50 MHz */
GPIOH->OSPEEDR = 0xAAAA08A0;
/* Configure PHx pins Output type to push-pull */
GPIOH->OTYPER = 0x00000000;
/* No pull-up, pull-down for PHx pins */
GPIOH->PUPDR = 0x00000000;
/* Connect PIx pins to FMC Alternate function */
GPIOI->AFR[0] = 0xCCCCCCCC;
GPIOI->AFR[1] = 0x00000CC0;
/* Configure PIx pins in Alternate function mode */
GPIOI->MODER = 0x0028AAAA;
/* Configure PIx pins speed to 50 MHz */
GPIOI->OSPEEDR = 0x0028AAAA;
/* Configure PIx pins Output type to push-pull */
GPIOI->OTYPER = 0x00000000;
/* No pull-up, pull-down for PIx pins */
GPIOI->PUPDR = 0x00000000;
/*-- FMC Configuration -------------------------------------------------------*/
/* Enable the FMC interface clock */
RCC->AHB3ENR |= 0x00000001;
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
FMC_Bank5_6->SDCR[0] = 0x000019E4;
FMC_Bank5_6->SDTR[0] = 0x01115351;
/* SDRAM initialization sequence */
/* Clock enable command */
FMC_Bank5_6->SDCMR = 0x00000011;
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* Delay */
for (index = 0; index<1000; index++);
/* PALL command */
FMC_Bank5_6->SDCMR = 0x00000012;
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
timeout = 0xFFFF;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* Auto refresh command */
FMC_Bank5_6->SDCMR = 0x00000073;
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
timeout = 0xFFFF;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* MRD register program */
FMC_Bank5_6->SDCMR = 0x00046014;
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
timeout = 0xFFFF;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* Set refresh count */
tmpreg = FMC_Bank5_6->SDRTR;
FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
/* Disable write protection */
tmpreg = FMC_Bank5_6->SDCR[0];
FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
/* Configure and enable Bank1_SRAM2 */
FMC_Bank1->BTCR[2] = 0x00001011;
FMC_Bank1->BTCR[3] = 0x00000201;
FMC_Bank1E->BWTR[2] = 0x0fffffff;
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
#if defined(STM32F469xx) || defined(STM32F479xx)
/* Configure and enable Bank1_SRAM2 */
FMC_Bank1->BTCR[2] = 0x00001091;
FMC_Bank1->BTCR[3] = 0x00110212;
FMC_Bank1E->BWTR[2] = 0x0fffffff;
#endif /* STM32F469xx || STM32F479xx */
(void)(tmp);
}
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
#elif defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f4xx.s before jump to main.
* This function configures the external memories (SRAM/SDRAM)
* This SRAM/SDRAM will be used as program data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmp = 0x00;
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|| defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
#if defined (DATA_IN_ExtSDRAM)
register uint32_t tmpreg = 0, timeout = 0xFFFF;
register __IO uint32_t index;
#if defined(STM32F446xx)
/* Enable GPIOA, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG interface
clock */
RCC->AHB1ENR |= 0x0000007D;
#else
/* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface
clock */
RCC->AHB1ENR |= 0x000001F8;
#endif /* STM32F446xx */
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
#if defined(STM32F446xx)
/* Connect PAx pins to FMC Alternate function */
GPIOA->AFR[0] |= 0xC0000000;
GPIOA->AFR[1] |= 0x00000000;
/* Configure PDx pins in Alternate function mode */
GPIOA->MODER |= 0x00008000;
/* Configure PDx pins speed to 50 MHz */
GPIOA->OSPEEDR |= 0x00008000;
/* Configure PDx pins Output type to push-pull */
GPIOA->OTYPER |= 0x00000000;
/* No pull-up, pull-down for PDx pins */
GPIOA->PUPDR |= 0x00000000;
/* Connect PCx pins to FMC Alternate function */
GPIOC->AFR[0] |= 0x00CC0000;
GPIOC->AFR[1] |= 0x00000000;
/* Configure PDx pins in Alternate function mode */
GPIOC->MODER |= 0x00000A00;
/* Configure PDx pins speed to 50 MHz */
GPIOC->OSPEEDR |= 0x00000A00;
/* Configure PDx pins Output type to push-pull */
GPIOC->OTYPER |= 0x00000000;
/* No pull-up, pull-down for PDx pins */
GPIOC->PUPDR |= 0x00000000;
#endif /* STM32F446xx */
/* Connect PDx pins to FMC Alternate function */
GPIOD->AFR[0] = 0x000000CC;
GPIOD->AFR[1] = 0xCC000CCC;
/* Configure PDx pins in Alternate function mode */
GPIOD->MODER = 0xA02A000A;
/* Configure PDx pins speed to 50 MHz */
GPIOD->OSPEEDR = 0xA02A000A;
/* Configure PDx pins Output type to push-pull */
GPIOD->OTYPER = 0x00000000;
/* No pull-up, pull-down for PDx pins */
GPIOD->PUPDR = 0x00000000;
/* Connect PEx pins to FMC Alternate function */
GPIOE->AFR[0] = 0xC00000CC;
GPIOE->AFR[1] = 0xCCCCCCCC;
/* Configure PEx pins in Alternate function mode */
GPIOE->MODER = 0xAAAA800A;
/* Configure PEx pins speed to 50 MHz */
GPIOE->OSPEEDR = 0xAAAA800A;
/* Configure PEx pins Output type to push-pull */
GPIOE->OTYPER = 0x00000000;
/* No pull-up, pull-down for PEx pins */
GPIOE->PUPDR = 0x00000000;
/* Connect PFx pins to FMC Alternate function */
GPIOF->AFR[0] = 0xCCCCCCCC;
GPIOF->AFR[1] = 0xCCCCCCCC;
/* Configure PFx pins in Alternate function mode */
GPIOF->MODER = 0xAA800AAA;
/* Configure PFx pins speed to 50 MHz */
GPIOF->OSPEEDR = 0xAA800AAA;
/* Configure PFx pins Output type to push-pull */
GPIOF->OTYPER = 0x00000000;
/* No pull-up, pull-down for PFx pins */
GPIOF->PUPDR = 0x00000000;
/* Connect PGx pins to FMC Alternate function */
GPIOG->AFR[0] = 0xCCCCCCCC;
GPIOG->AFR[1] = 0xCCCCCCCC;
/* Configure PGx pins in Alternate function mode */
GPIOG->MODER = 0xAAAAAAAA;
/* Configure PGx pins speed to 50 MHz */
GPIOG->OSPEEDR = 0xAAAAAAAA;
/* Configure PGx pins Output type to push-pull */
GPIOG->OTYPER = 0x00000000;
/* No pull-up, pull-down for PGx pins */
GPIOG->PUPDR = 0x00000000;
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|| defined(STM32F469xx) || defined(STM32F479xx)
/* Connect PHx pins to FMC Alternate function */
GPIOH->AFR[0] = 0x00C0CC00;
GPIOH->AFR[1] = 0xCCCCCCCC;
/* Configure PHx pins in Alternate function mode */
GPIOH->MODER = 0xAAAA08A0;
/* Configure PHx pins speed to 50 MHz */
GPIOH->OSPEEDR = 0xAAAA08A0;
/* Configure PHx pins Output type to push-pull */
GPIOH->OTYPER = 0x00000000;
/* No pull-up, pull-down for PHx pins */
GPIOH->PUPDR = 0x00000000;
/* Connect PIx pins to FMC Alternate function */
GPIOI->AFR[0] = 0xCCCCCCCC;
GPIOI->AFR[1] = 0x00000CC0;
/* Configure PIx pins in Alternate function mode */
GPIOI->MODER = 0x0028AAAA;
/* Configure PIx pins speed to 50 MHz */
GPIOI->OSPEEDR = 0x0028AAAA;
/* Configure PIx pins Output type to push-pull */
GPIOI->OTYPER = 0x00000000;
/* No pull-up, pull-down for PIx pins */
GPIOI->PUPDR = 0x00000000;
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
/*-- FMC Configuration -------------------------------------------------------*/
/* Enable the FMC interface clock */
RCC->AHB3ENR |= 0x00000001;
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
/* Configure and enable SDRAM bank1 */
#if defined(STM32F446xx)
FMC_Bank5_6->SDCR[0] = 0x00001954;
#else
FMC_Bank5_6->SDCR[0] = 0x000019E4;
#endif /* STM32F446xx */
FMC_Bank5_6->SDTR[0] = 0x01115351;
/* SDRAM initialization sequence */
/* Clock enable command */
FMC_Bank5_6->SDCMR = 0x00000011;
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* Delay */
for (index = 0; index<1000; index++);
/* PALL command */
FMC_Bank5_6->SDCMR = 0x00000012;
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
timeout = 0xFFFF;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* Auto refresh command */
#if defined(STM32F446xx)
FMC_Bank5_6->SDCMR = 0x000000F3;
#else
FMC_Bank5_6->SDCMR = 0x00000073;
#endif /* STM32F446xx */
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
timeout = 0xFFFF;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* MRD register program */
#if defined(STM32F446xx)
FMC_Bank5_6->SDCMR = 0x00044014;
#else
FMC_Bank5_6->SDCMR = 0x00046014;
#endif /* STM32F446xx */
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
timeout = 0xFFFF;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* Set refresh count */
tmpreg = FMC_Bank5_6->SDRTR;
#if defined(STM32F446xx)
FMC_Bank5_6->SDRTR = (tmpreg | (0x0000050C<<1));
#else
FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
#endif /* STM32F446xx */
/* Disable write protection */
tmpreg = FMC_Bank5_6->SDCR[0];
FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
#endif /* DATA_IN_ExtSDRAM */
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
|| defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|| defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
#if defined(DATA_IN_ExtSRAM)
/*-- GPIOs Configuration -----------------------------------------------------*/
/* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
RCC->AHB1ENR |= 0x00000078;
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);
/* Connect PDx pins to FMC Alternate function */
GPIOD->AFR[0] = 0x00CCC0CC;
GPIOD->AFR[1] = 0xCCCCCCCC;
/* Configure PDx pins in Alternate function mode */
GPIOD->MODER = 0xAAAA0A8A;
/* Configure PDx pins speed to 100 MHz */
GPIOD->OSPEEDR = 0xFFFF0FCF;
/* Configure PDx pins Output type to push-pull */
GPIOD->OTYPER = 0x00000000;
/* No pull-up, pull-down for PDx pins */
GPIOD->PUPDR = 0x00000000;
/* Connect PEx pins to FMC Alternate function */
GPIOE->AFR[0] = 0xC00CC0CC;
GPIOE->AFR[1] = 0xCCCCCCCC;
/* Configure PEx pins in Alternate function mode */
GPIOE->MODER = 0xAAAA828A;
/* Configure PEx pins speed to 100 MHz */
GPIOE->OSPEEDR = 0xFFFFC3CF;
/* Configure PEx pins Output type to push-pull */
GPIOE->OTYPER = 0x00000000;
/* No pull-up, pull-down for PEx pins */
GPIOE->PUPDR = 0x00000000;
/* Connect PFx pins to FMC Alternate function */
GPIOF->AFR[0] = 0x00CCCCCC;
GPIOF->AFR[1] = 0xCCCC0000;
/* Configure PFx pins in Alternate function mode */
GPIOF->MODER = 0xAA000AAA;
/* Configure PFx pins speed to 100 MHz */
GPIOF->OSPEEDR = 0xFF000FFF;
/* Configure PFx pins Output type to push-pull */
GPIOF->OTYPER = 0x00000000;
/* No pull-up, pull-down for PFx pins */
GPIOF->PUPDR = 0x00000000;
/* Connect PGx pins to FMC Alternate function */
GPIOG->AFR[0] = 0x00CCCCCC;
GPIOG->AFR[1] = 0x000000C0;
/* Configure PGx pins in Alternate function mode */
GPIOG->MODER = 0x00085AAA;
/* Configure PGx pins speed to 100 MHz */
GPIOG->OSPEEDR = 0x000CAFFF;
/* Configure PGx pins Output type to push-pull */
GPIOG->OTYPER = 0x00000000;
/* No pull-up, pull-down for PGx pins */
GPIOG->PUPDR = 0x00000000;
/*-- FMC/FSMC Configuration --------------------------------------------------*/
/* Enable the FMC/FSMC interface clock */
RCC->AHB3ENR |= 0x00000001;
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
/* Configure and enable Bank1_SRAM2 */
FMC_Bank1->BTCR[2] = 0x00001011;
FMC_Bank1->BTCR[3] = 0x00000201;
FMC_Bank1E->BWTR[2] = 0x0fffffff;
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
#if defined(STM32F469xx) || defined(STM32F479xx)
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
/* Configure and enable Bank1_SRAM2 */
FMC_Bank1->BTCR[2] = 0x00001091;
FMC_Bank1->BTCR[3] = 0x00110212;
FMC_Bank1E->BWTR[2] = 0x0fffffff;
#endif /* STM32F469xx || STM32F479xx */
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)\
|| defined(STM32F412Zx) || defined(STM32F412Vx)
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);
/* Configure and enable Bank1_SRAM2 */
FSMC_Bank1->BTCR[2] = 0x00001011;
FSMC_Bank1->BTCR[3] = 0x00000201;
FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF;
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx */
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx */
(void)(tmp);
}
#endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/

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/**********************************TIM**************************************
Данный файл содержит базовые функции для инициализации портов.
***************************************************************************/
#include "gpio_general.h"
//-------------------------------------------------------------------
//------------------------GPIO INIT FUNCTIONS------------------------
HAL_StatusTypeDef GPIO_Clock_Enable(GPIO_TypeDef *GPIOx)
{
HAL_StatusTypeDef status = HAL_OK;
// choose port for enable clock
if (GPIOx==GPIOA)
__HAL_RCC_GPIOA_CLK_ENABLE();
else if (GPIOx==GPIOB)
__HAL_RCC_GPIOB_CLK_ENABLE();
else if (GPIOx==GPIOC)
__HAL_RCC_GPIOC_CLK_ENABLE();
else if (GPIOx==GPIOD)
__HAL_RCC_GPIOD_CLK_ENABLE();
else if (GPIOx==GPIOE)
__HAL_RCC_GPIOE_CLK_ENABLE();
else
status = HAL_ERROR;
return status;
}
//------------------------GPIO INIT FUNCTIONS------------------------
//-------------------------------------------------------------------

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/**********************************TIM**************************************
Данный файл содержит объявления базовых функции и дефайны для инициализации
портов.
***************************************************************************/
#ifndef __GPIO_GENERAL_H_
#define __GPIO_GENERAL_H_
#include "periph_general.h"
/////////////////////////////////////////////////////////////////////
///////////////////////////---FUNCTIONS---///////////////////////////
HAL_StatusTypeDef GPIO_Clock_Enable(GPIO_TypeDef *GPIOx);
///////////////////////////---FUNCTIONS---///////////////////////////
#endif // __GPIO_GENERAL_H_

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/**********************************TIM**************************************
Данный файл содержит инклюды и дефайны для всех библиотек базовой перефирии.
***************************************************************************/
#ifndef __PERIPH_GENERAL_H_
#define __PERIPH_GENERAL_H_
// user includes
#include "modbus.h"
#include "trace.h"
extern void Error_Handler(void);
#define ERROR_HANDLER_NAME(_params_) Error_Handler(_params_)
/* If error handler not defined - set void */
#ifndef ERROR_HANDLER_NAME
#define ((void)0U)
#endif // ERROR_HANDLER_NAME
#include "stm32f4xx_hal.h"
#include "gpio_general.h"
#include "uart_general.h"
#include "tim_general.h"
#endif // __PERIPH_GENERAL_H_

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/**********************************TIM**************************************
Данный файл содержит базовые функции для инициализации таймеров.
//-------------------Функции-------------------//
@func tim initialize
- TIM_Base_Init Инициализация TIM
- TIM_Output_PWM_Init Инициализация PWM с выводом на GPIO
- TIM_Base_MspInit Аналог HAL_MspInit для таймера
***************************************************************************/
#include "tim_general.h"
//-------------------------------------------------------------------
//-------------------------TIM INIT FUNCTIONS------------------------
/**
* @brief Initialize TIM with TIM_SettingsTypeDef structure.
* @param stim - указатель на структуру с настройками таймера.
* @return HAL status.
* @note Данная структура содержит хендл таймера и структуры для его настройки.
*/
HAL_StatusTypeDef TIM_Base_Init(TIM_SettingsTypeDef *stim)
{ // function takes structure for init
// check that htim is defined
if (stim->htim.Instance == NULL)
return HAL_ERROR;
if(stim->sTickBaseMHz) // if tickbase isnt disable
{
if((stim->sTimAHBFreqMHz == 0))
return HAL_ERROR;
stim->htim.Init.Prescaler = (stim->sTimAHBFreqMHz*stim->sTickBaseMHz) - 1;
if ((stim->sTimFreqHz != NULL))
stim->htim.Init.Period = ((1000000/stim->sTickBaseMHz) / stim->sTimFreqHz) - 1;
}
// if freq is too high (period too small for choosen base) OR base is too high (period too small for choosen base)
if((stim->htim.Init.Period == NULL) || (stim->htim.Init.Prescaler == NULL))
{
return HAL_ERROR;
}
// fix overflow of presc and period if need
for(int i = 0; (stim->htim.Init.Prescaler > 0xFFFF) || (stim->htim.Init.Period > 0xFFFF); i++)
{
if (i>10) // if it isnt fixed after 10 itteration - return HAL_ERRPOR
{
return HAL_ERROR;
}
// if timbase is too big (prescaller too big for choosen base from MHZ)
if(stim->htim.Init.Prescaler > 0xFFFF)
{
// переносим часть пресскалера в период
stim->htim.Init.Prescaler = ((stim->htim.Init.Prescaler + 1)/2) - 1;
stim->htim.Init.Period = ((stim->htim.Init.Period + 1)*2) - 1;
// обновляем TickBase
stim->sTickBaseMHz /= 2;
}
// if freq is too low (period too big for choosen base)
if(stim->htim.Init.Period > 0xFFFF)
{
// переносим часть периода в прескалер
stim->htim.Init.Period = ((stim->htim.Init.Period + 1)/2) - 1;
stim->htim.Init.Prescaler = ((stim->htim.Init.Prescaler + 1)*2) - 1;
// обновляем TickBase
stim->sTickBaseMHz *= 2;
}
}
//-------------TIM BASE INIT----------------
// tim base init
TIM_Base_MspInit(&stim->htim, stim->sTimMode);
if (HAL_TIM_Base_Init(&stim->htim) != HAL_OK)
{
ERROR_HANDLER_NAME();
return HAL_ERROR;
}
//-------------CLOCK SRC INIT---------------
// fill sClockSourceConfig if its NULL
if (stim->sClockSourceConfig.ClockSource == NULL)
stim->sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
// clock source init
if (HAL_TIM_ConfigClockSource(&stim->htim, &stim->sClockSourceConfig) != HAL_OK)
{
ERROR_HANDLER_NAME();
return HAL_ERROR;
}
//--------------SLAVE INIT------------------
// if slave mode enables - config it
if (stim->sSlaveConfig.SlaveMode)
{
// slave mode init
if (HAL_TIM_SlaveConfigSynchro(&stim->htim, &stim->sSlaveConfig) != HAL_OK)
{
ERROR_HANDLER_NAME();
return HAL_ERROR;
}
}
//--------------MASTER INIT-----------------
// master mode init
if (HAL_TIMEx_MasterConfigSynchronization(&stim->htim, &stim->sMasterConfig) != HAL_OK)
{
ERROR_HANDLER_NAME();
return HAL_ERROR;
}
//--------------BDTR INIT-----------------
if (HAL_TIMEx_ConfigBreakDeadTime(&stim->htim, &stim->sBreakDeadTimeConfig) != HAL_OK)
{
ERROR_HANDLER_NAME();
return HAL_ERROR;
}
//----------------IT CLEAR-------------------
__HAL_TIM_CLEAR_IT(&stim->htim, TIM_IT_UPDATE);
stim->htim.Instance->CNT = 0;
return HAL_OK;
}
/**
* @brief Initialize PWM Channel and GPIO for output.
* @param htim - указатель на хендл таймера.
* @param sConfigOC - указатель на настрйоки канала таймера.
* @param TIM_CHANNEL - канал таймера для настройки.
* @param GPIOx - порт для вывода ШИМ.
* @param GPIO_PIN - пин для вывода ШИМ.
* @return HAL status.
*/
HAL_StatusTypeDef TIM_Output_PWM_Init(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef *sConfigOC, uint32_t TIM_CHANNEL, GPIO_TypeDef *GPIOx, uint32_t GPIO_PIN)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
HAL_StatusTypeDef RES = HAL_ERROR;
// setup channel for pwm
if (HAL_TIM_PWM_ConfigChannel(htim, sConfigOC, TIM_CHANNEL) != HAL_OK)
{
ERROR_HANDLER_NAME();
return HAL_ERROR;
}
// choose port for enable clock
if(GPIO_Clock_Enable(GPIOx) != HAL_OK)
{
ERROR_HANDLER_NAME();
return HAL_ERROR;
}
GPIO_InitStruct.Pin = GPIO_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_PULLDOWN;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = TIM_Alternate_Mapping(htim->Instance);
if(GPIO_InitStruct.Alternate)
HAL_GPIO_Init(GPIOx, &GPIO_InitStruct);
return HAL_OK;
}
/**
* @brief Initialize TIMs clock and interrupt.
* @param htim - указатель на хендл таймера.
* @note Чтобы не генерировать функцию с иницилизацией неиспользуемых таймеров,
дефайнами в tim_general.h определяются используемые таймеры.
*/
void TIM_Base_MspInit(TIM_HandleTypeDef* htim, TIM_ITModeTypeDef it_mode)
{
it_mode = it_mode&TIM_IT_CONF;
#ifdef USE_TIM1
if(htim->Instance==TIM1)
{
/* TIM2 clock enable */
__HAL_RCC_TIM1_CLK_ENABLE();
/* TIM2 interrupt Init */
if(it_mode)
{
HAL_NVIC_SetPriority(TIM1_UP_TIM10_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
}
}
#endif
#ifdef USE_TIM2
if(htim->Instance==TIM2)
{
/* TIM2 clock enable */
__HAL_RCC_TIM2_CLK_ENABLE();
/* TIM2 interrupt Init */
if(it_mode)
{
HAL_NVIC_SetPriority(TIM2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM2_IRQn);
}
}
#endif
#ifdef USE_TIM3
if(htim->Instance==TIM3)
{
/* TIM3 clock enable */
__HAL_RCC_TIM3_CLK_ENABLE();
/* TIM3 interrupt Init */
if(it_mode)
{
HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM3_IRQn);
}
}
#endif
#ifdef USE_TIM4
if(htim->Instance==TIM4)
{
/* TIM4 clock enable */
__HAL_RCC_TIM4_CLK_ENABLE();
/* TIM4 interrupt Init */
if(it_mode)
{
HAL_NVIC_SetPriority(TIM4_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM4_IRQn);
}
}
#endif
#ifdef USE_TIM5
if(htim->Instance==TIM5)
{
/* TIM5 clock enable */
__HAL_RCC_TIM5_CLK_ENABLE();
/* TIM5 interrupt Init */
if(it_mode)
{
HAL_NVIC_SetPriority(TIM5_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM5_IRQn);
}
}
#endif
#ifdef USE_TIM6
if(htim->Instance==TIM6)
{
/* TIM6 clock enable */
__HAL_RCC_TIM6_CLK_ENABLE();
/* TIM6 interrupt Init */
if(it_mode)
{
HAL_NVIC_SetPriority(TIM6_DAC_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
}
}
#endif
#ifdef USE_TIM7
if(htim->Instance==TIM7)
{
/* TIM7 clock enable */
__HAL_RCC_TIM7_CLK_ENABLE();
/* TIM7 interrupt Init */
if(it_mode)
{
HAL_NVIC_SetPriority(TIM7_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM7_IRQn);
}
}
#endif
#ifdef USE_TIM8
if(htim->Instance==TIM8)
{
/* TIM8 clock enable */
__HAL_RCC_TIM8_CLK_ENABLE();
/* TIM8 interrupt Init */
if(it_mode)
{
HAL_NVIC_SetPriority(TIM8_UP_TIM13_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn);
}
}
#endif
#ifdef USE_TIM9
if(htim->Instance==TIM9)
{
/* TIM9 clock enable */
__HAL_RCC_TIM9_CLK_ENABLE();
/* TIM9 interrupt Init */
if(it_mode)
{
HAL_NVIC_SetPriority(TIM1_BRK_TIM9_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM1_BRK_TIM9_IRQn);
}
}
#endif
#ifdef USE_TIM10
if(htim->Instance==TIM10)
{
/* TIM10 clock enable */
__HAL_RCC_TIM10_CLK_ENABLE();
/* TIM10 interrupt Init */
if(it_mode)
{
HAL_NVIC_SetPriority(TIM1_UP_TIM10_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
}
}
#endif
#ifdef USE_TIM11
if(htim->Instance==TIM11)
{
/* TIM11 clock enable */
__HAL_RCC_TIM11_CLK_ENABLE();
/* TIM11 interrupt Init */
if(it_mode)
{
HAL_NVIC_SetPriority(TIM1_TRG_COM_TIM11_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM11_IRQn);
}
}
#endif
#ifdef USE_TIM12
if(htim->Instance==TIM12)
{
/* TIM12 clock enable */
__HAL_RCC_TIM12_CLK_ENABLE();
/* TIM12 interrupt Init */
if(it_mode)
{
HAL_NVIC_SetPriority(TIM8_BRK_TIM12_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM8_BRK_TIM12_IRQn);
}
}
#endif
#ifdef USE_TIM13
if(htim->Instance==TIM13)
{
/* TIM13 clock enable */
__HAL_RCC_TIM13_CLK_ENABLE();
/* TIM13 interrupt Init */
if(it_mode)
{
HAL_NVIC_SetPriority(TIM8_UP_TIM13_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn);
}
}
#endif
#ifdef USE_TIM14
if(htim->Instance==TIM14)
{
/* TIM14 clock enable */
__HAL_RCC_TIM14_CLK_ENABLE();
/* TIM14 interrupt Init */
if(it_mode)
{
HAL_NVIC_SetPriority(TIM8_TRG_COM_TIM14_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM8_TRG_COM_TIM14_IRQn);
}
}
#endif
}
/**
* @brief DeInitialize TIMs clock and interrupt.
* @param htim - указатель на хендл таймера.
* @note Чтобы не генерировать функцию с деиницилизацией неиспользуемых таймеров,
дефайнами в tim_general.h определяются используемые таймеры.
*/
void TIM_Base_MspDeInit(TIM_HandleTypeDef* htim)
{
#ifdef USE_TIM1
if(htim->Instance==TIM1)
{
__HAL_RCC_TIM1_FORCE_RESET();
__HAL_RCC_TIM1_RELEASE_RESET();
}
#endif
#ifdef USE_TIM2
if(htim->Instance==TIM2)
{
__HAL_RCC_TIM2_FORCE_RESET();
__HAL_RCC_TIM2_RELEASE_RESET();
}
#endif
#ifdef USE_TIM3
if(htim->Instance==TIM3)
{
__HAL_RCC_TIM3_FORCE_RESET();
__HAL_RCC_TIM3_RELEASE_RESET();
}
#endif
#ifdef USE_TIM4
if(htim->Instance==TIM4)
{
__HAL_RCC_TIM4_FORCE_RESET();
__HAL_RCC_TIM4_RELEASE_RESET();
}
#endif
#ifdef USE_TIM5
if(htim->Instance==TIM5)
{
__HAL_RCC_TIM5_FORCE_RESET();
__HAL_RCC_TIM5_RELEASE_RESET();
}
#endif
#ifdef USE_TIM6
if(htim->Instance==TIM6)
{
__HAL_RCC_TIM6_FORCE_RESET();
__HAL_RCC_TIM6_RELEASE_RESET();
}
#endif
#ifdef USE_TIM7
if(htim->Instance==TIM7)
{
__HAL_RCC_TIM7_FORCE_RESET();
__HAL_RCC_TIM7_RELEASE_RESET();
}
#endif
#ifdef USE_TIM8
if(htim->Instance==TIM8)
{
__HAL_RCC_TIM8_FORCE_RESET();
__HAL_RCC_TIM8_RELEASE_RESET();
}
#endif
#ifdef USE_TIM9
if(htim->Instance==TIM9)
{
__HAL_RCC_TIM9_FORCE_RESET();
__HAL_RCC_TIM9_RELEASE_RESET();
}
#endif
#ifdef USE_TIM10
if(htim->Instance==TIM10)
{
__HAL_RCC_TIM10_FORCE_RESET();
__HAL_RCC_TIM10_RELEASE_RESET();
}
#endif
#ifdef USE_TIM11
if(htim->Instance==TIM11)
{
__HAL_RCC_TIM11_FORCE_RESET();
__HAL_RCC_TIM11_RELEASE_RESET();
}
#endif
#ifdef USE_TIM12
if(htim->Instance==TIM12)
{
__HAL_RCC_TIM12_FORCE_RESET();
__HAL_RCC_TIM12_RELEASE_RESET();
}
#endif
#ifdef USE_TIM13
if(htim->Instance==TIM13)
{
__HAL_RCC_TIM13_FORCE_RESET();
__HAL_RCC_TIM13_RELEASE_RESET();
}
#endif
#ifdef USE_TIM14
if(htim->Instance==TIM14)
{
__HAL_RCC_TIM14_FORCE_RESET();
__HAL_RCC_TIM14_RELEASE_RESET();
}
#endif
}
//-------------------------TIM INIT FUNCTIONS------------------------
//-------------------------------------------------------------------

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/**********************************TIM**************************************
Данный файл содержит объявления базовых функции и дефайны для инициализации
таймеров.
***************************************************************************/
#ifndef __TIM_GENERAL_H_
#define __TIM_GENERAL_H_
/////////////////////////////////////////////////////////////////////
/////////////////////////---USER SETTINGS---/////////////////////////
#define HAL_TIM_MODULE_ENABLED // need to uncomment this define in stm32f4xx_hal_conf.h
#define USE_TIM1
#define USE_TIM2
#define USE_TIM3
#define USE_TIM4
#define USE_TIM5
#define USE_TIM6
#define USE_TIM7
#define USE_TIM8
#define USE_TIM9
#define USE_TIM10
#define USE_TIM11
#define USE_TIM12
#define USE_TIM13
#define USE_TIM14
/* note: used uart defines in modbus.h */
/////////////////////////---USER SETTINGS---/////////////////////////
#include "periph_general.h"
/////////////////////////////////////////////////////////////////////
////////////////////////////---DEFINES---////////////////////////////
#define TIM_IT_CONF_Pos 0
//#define TIM_PWM_CONF_Pos 1
//#define TIM_CLCK_SRC_CONF_Pos 2
//#define TIM_SLAVE_CONF_Pos 3
//#define TIM_MASTER_CONF_Pos 4
//#define TIM_BDTR_CONF_Pos 5
#define TIM_IT_CONF (1<<(TIM_IT_CONF_Pos))
//#define TIM_PWM_CONF (1<<(TIM_PWM_Pos))
#define TIM_Alternate_Mapping(INSTANCE) ((((INSTANCE) == TIM1) || ((INSTANCE) == TIM2))? GPIO_AF1_TIM1: \
(((INSTANCE) == TIM3) || ((INSTANCE) == TIM4) || ((INSTANCE) == TIM5))? GPIO_AF2_TIM3: \
(((INSTANCE) == TIM8) || ((INSTANCE) == TIM9) || ((INSTANCE) == TIM10) || ((INSTANCE) == TIM11))? GPIO_AF3_TIM8: \
(((INSTANCE) == TIM12) || ((INSTANCE) == TIM13) || ((INSTANCE) == TIM14))? GPIO_AF9_TIM12: \
(0))
////////////////////////////---DEFINES---////////////////////////////]
/////////////////////////////////////////////////////////////////////
///////////////////////---STRUCTURES & ENUMS---//////////////////////
typedef enum
{
TIM_DEFAULT = 0,
TIM_IT_MODE = TIM_IT_CONF,
// TIM_PWM_MODE = TIM_PWM_ENABLE,
// TIM_PWM_IT_MODE = TIM_PWM_ENABLE | TIM_IT_CONF,
}TIM_ITModeTypeDef;
typedef enum
{
TIM_Base_Disable = 0,
TIM_TickBase_1US = 1,
TIM_TickBase_10US = 10,
TIM_TickBase_100US = 100,
TIM_TickBase_1MS = 1000,
TIM_TickBase_10MS = 10000,
TIM_TickBase_100MS = 100000,
}TIM_MHzTickBaseTypeDef;
typedef struct // struct with settings for custom function
{
TIM_HandleTypeDef htim;
TIM_ClockConfigTypeDef sClockSourceConfig;
TIM_SlaveConfigTypeDef sSlaveConfig;
TIM_MasterConfigTypeDef sMasterConfig;
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig;
TIM_ITModeTypeDef sTimMode;
TIM_MHzTickBaseTypeDef sTickBaseMHz;
float sTimAHBFreqMHz;
uint32_t sTimFreqHz;
}TIM_SettingsTypeDef;
///////////////////////---STRUCTURES & ENUMS---//////////////////////
/////////////////////////////////////////////////////////////////////
///////////////////////////---FUNCTIONS---///////////////////////////
/**
* @brief Initialize TIM with TIM_SettingsTypeDef structure.
* @param stim - указатель на структуру с настройками таймера.
* @return HAL status.
* @note Данная структура содержит хендл таймера и структуры для его настройки.
*/
HAL_StatusTypeDef TIM_Base_Init(TIM_SettingsTypeDef* stim);
/**
* @brief Initialize PWM Channel and GPIO for output.
* @param htim - указатель на хендл таймера.
* @param sConfigOC - указатель на настрйоки канала таймера.
* @param TIM_CHANNEL - канал таймера для настройки.
* @param GPIOx - порт для вывода ШИМ.
* @param GPIO_PIN - пин для вывода ШИМ.
* @return HAL status.
*/
HAL_StatusTypeDef TIM_Output_PWM_Init(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef *sConfigOC, uint32_t TIM_CHANNEL, GPIO_TypeDef *GPIOx, uint32_t PWM_PIN);
/**
* @brief Initialize TIMs clock and interrupt.
* @param htim - указатель на хендл таймера.
* @note Чтобы не генерировать функцию с иницилизацией неиспользуемых таймеров,
дефайнами в tim_general.h определяются используемые таймеры.
*/
void TIM_Base_MspInit(TIM_HandleTypeDef* htim, TIM_ITModeTypeDef it_mode);
/**
* @brief DeInitialize TIMs clock and interrupt.
* @param htim - указатель на хендл таймера.
* @note Чтобы не генерировать функцию с деиницилизацией неиспользуемых таймеров,
дефайнами в tim_general.h определяются используемые таймеры.
*/
void TIM_Base_MspDeInit(TIM_HandleTypeDef* htim);
///////////////////////////---FUNCTIONS---///////////////////////////
#endif // __TIM_GENERAL_H_

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/*********************************UART**************************************
Данный файл содержит базовые функции для инициализации UART.
//-------------------Функции-------------------//
@func users
- UART_Base_Init Инициализация UART
@func uart initialize
- UART_GPIO_Init Инициализация GPIO для UART
- UART_DMA_Init Инициализация DMA для UART
- UART_MspInit Аналог HAL_MspInit для UART
- UART_MspDeInit Аналог HAL_MspDeInit для UART
***************************************************************************/
#include "uart_general.h"
//-------------------------------------------------------------------
//------------------------UART INIT FUNCTIONS------------------------
/**
* @brief Initialize UART with UART_SettingsTypeDef structure.
* @param suart - указатель на структуру с настройками UART.
* @return HAL status.
* @note Данная структура содержит хендл ЮАРТ и настройки перефирии (GPIO)
*/
HAL_StatusTypeDef UART_Base_Init(UART_SettingsTypeDef *suart)
{ // function takes setting structure for init
// check is settings are valid
if(Check_UART_Init_Struct(suart) != HAL_OK)
return HAL_ERROR;
suart->huart.Init.Mode = UART_MODE_TX_RX;
UART_MspInit(&suart->huart);
if (HAL_UART_Init(&suart->huart) != HAL_OK)
{
ERROR_HANDLER_NAME();
return HAL_ERROR;
}
// init gpio from UARTSettings structure
UART_GPIO_Init(suart->GPIOx, suart->GPIO_PIN_RX, suart->GPIO_PIN_TX);
// init dma from UARTSettings structure if need
if (suart->DMAChannel != 0)
UART_DMA_Init(&suart->huart, suart->huart.hdmarx, suart->DMAChannel, suart->DMA_CHANNEL_X);
return HAL_OK;
}
/**
* @brief Initialize GPIO for UART.
* @param GPIOx - порт для настройки.
* @param GPIO_PIN_RX - пин для настройки на прием.
* @param GPIO_PIN_TX - пин для настройки на передачу.
*/
void UART_GPIO_Init(GPIO_TypeDef *GPIOx, uint16_t GPIO_PIN_RX, uint16_t GPIO_PIN_TX)
{ // function takes port and pins (for rx and tx)
GPIO_InitTypeDef GPIO_InitStruct = {0};
// choose port for enable clock
GPIO_Clock_Enable(GPIOx);
//USART3 GPIO Configuration
//GPIO_PIN_TX ------> USART_TX
//GPIO_PIN_RX ------> USART_RX
#if defined(STM32F407xx) // gpio init for 407
GPIO_InitStruct.Pin = GPIO_PIN_TX|GPIO_PIN_RX;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
HAL_GPIO_Init(GPIOx, &GPIO_InitStruct);
#elif defined(STM32F103xG) // gpio init for atm403/stm103
//GPIO_PIN_TX ------> USART_TX
GPIO_InitStruct.Pin = GPIO_PIN_TX;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(GPIOx, &GPIO_InitStruct);
// GPIO_PIN_RX ------> USART_RX
GPIO_InitStruct.Pin = GPIO_PIN_RX;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOx, &GPIO_InitStruct);
#endif
}
/**
* @brief Initialize DMA for UART.
* @param huart - указатель на хендл UART для настройки DMA.
* @param hdma_rx - указатель на хендл DMA для линии приема UART.
* @param DMAChannel - указатель на канал DMA/поток DMA в STM32F407.
* @param DMA_CHANNEL_X - канал DMA.
*/
void UART_DMA_Init(UART_HandleTypeDef *huart, DMA_HandleTypeDef *hdma_rx, DMA_Stream_TypeDef *DMAChannel, uint32_t DMA_CHANNEL_X)
{ // function takes uart and dma handlers and dmachannel for uart
// for now only dma rx is supported, tx maybe later if needed
// calc defines on boot_project_setup.h
/* USART3 DMA Init */
/* USART3_RX Init */
hdma_rx->Instance = DMAChannel;
#if defined(STM32F407xx) // dma channel choose for 407
hdma_rx->Init.Channel = DMA_CHANNEL_X;
#endif
hdma_rx->Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_rx->Init.PeriphInc = DMA_PINC_DISABLE;
hdma_rx->Init.MemInc = DMA_MINC_ENABLE;
hdma_rx->Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_rx->Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_rx->Init.Mode = DMA_CIRCULAR;
hdma_rx->Init.Priority = DMA_PRIORITY_LOW;
if (HAL_DMA_Init(hdma_rx) != HAL_OK)
{
ERROR_HANDLER_NAME();
}
__USER_LINKDMA(huart,hdmarx,hdma_rx);
// __USER_LINKDMA is need because __HAL_LINKDMA is written for global defined hdma_rx
// so you get error because hal uses . insted of ->
}
/**
* @brief Initialize UART & DMA clock and interrupt.
* @param huart - указатель на хендл UART для инициализации.
* @note Чтобы не генерировать функцию с иницилизацией неиспользуемых UART,
дефайнами в rs_message.h определяются используемые UART.
*/
void UART_MspInit(UART_HandleTypeDef *huart) // analog for hal function
{
// __RCC_DMA_UART_CLK_ENABLE();
// /* DMA interrupt init */
// /* DMA1_Stream1_IRQn interrupt configuration */
// HAL_NVIC_SetPriority(DMA_UART_IRQn, 0, 0);
// HAL_NVIC_EnableIRQ(DMA_UART_IRQn);
// rcc, dma and interrupt init for USARTs
// GPIO init was moved to own functions UART_GPIO_Init
if(0);
#ifdef USE_USART1
else if(huart->Instance==USART1)
{
/* DMA2 clock enable */
__HAL_RCC_DMA2_CLK_ENABLE();
/* DMA interrupt init */
HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn);
/* USART1 clock enable */
__HAL_RCC_USART1_CLK_ENABLE();
/* USART1 interrupt Init */
HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(USART1_IRQn);
}
#endif // USE_USART1
#ifdef USE_USART2
else if(huart->Instance==USART2)
{
/* DMA1 clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
/* DMA interrupt init */
HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn);
/* USART2 clock enable */
__HAL_RCC_USART2_CLK_ENABLE();
/* USART2 interrupt Init */
HAL_NVIC_SetPriority(USART2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(USART2_IRQn);
}
#endif // USE_USART2
#ifdef USE_USART3
else if(huart->Instance==USART3)
{
/* DMA1 clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
/* DMA interrupt init */
HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn);
/* USART3 clock enable */
__HAL_RCC_USART3_CLK_ENABLE();
/* USART3 interrupt Init */
HAL_NVIC_SetPriority(USART3_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(USART3_IRQn);
}
#endif // USE_USART3
#ifdef USE_UART4
else if(huart->Instance==UART4)
{
/* DMA1 clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
/* DMA interrupt init */
HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream2_IRQn);
/* UART4 clock enable */
__HAL_RCC_UART4_CLK_ENABLE();
/* UART4 interrupt Init */
HAL_NVIC_SetPriority(UART4_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(UART4_IRQn);
}
#endif // USE_UART4
#ifdef USE_UART5
else if(huart->Instance==UART5)
{
/* DMA1 clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
/* DMA interrupt init */
HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn);
/* UART5 clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
/* UART5 interrupt Init */
HAL_NVIC_SetPriority(UART5_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(UART5_IRQn);
}
#endif // USE_UART5
#ifdef USE_USART6
else if(huart->Instance==USART6)
{
/* DMA2 clock enable */
__HAL_RCC_DMA2_CLK_ENABLE();
/* DMA interrupt init */
HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn);
/* USART6 clock enable */
__HAL_RCC_USART6_CLK_ENABLE();
/* USART6 interrupt Init */
HAL_NVIC_SetPriority(USART6_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(USART6_IRQn);
}
#endif // USE_USART6
}
/**
* @brief Deinitialize UART & DMA clock and interrupt.
* @param huart - указатель на хендл UART для деинициализации.
* @note Чтобы не генерировать функцию с деиницилизацией неиспользуемых UART,
дефайнами определяются используемые UART.
*/
void UART_MspDeInit(UART_HandleTypeDef *huart) // analog for hal function
{
// rcc, dma and interrupt init for USARTs
// GPIO init was moved to own functions UART_GPIO_Init
if(0);
#ifdef USE_USART1
else if(huart->Instance==USART1)
{
// /* DMA2 clock enable */
// __HAL_RCC_DMA2_CLK_ENABLE();
// /* DMA interrupt init */
// HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 0, 0);
// HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn);
/* USART1 clock reset */
__HAL_RCC_USART1_FORCE_RESET();
__HAL_RCC_USART1_RELEASE_RESET();
}
#endif // USE_USART1
#ifdef USE_USART2
else if(huart->Instance==USART2)
{
// /* DMA1 clock enable */
// __HAL_RCC_DMA1_CLK_ENABLE();
// /* DMA interrupt init */
// HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 0, 0);
// HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn);
/* USART2 clock reset */
__HAL_RCC_USART2_FORCE_RESET();
__HAL_RCC_USART2_RELEASE_RESET();
}
#endif // USE_USART2
#ifdef USE_USART3
else if(huart->Instance==USART3)
{
// /* DMA1 clock enable */
// __HAL_RCC_DMA1_CLK_ENABLE();
// /* DMA interrupt init */
// HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 0, 0);
// HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn);
/* USART3 clock reset */
__HAL_RCC_USART3_FORCE_RESET();
__HAL_RCC_USART3_RELEASE_RESET();
}
#endif // USE_USART3
#ifdef USE_UART4
else if(huart->Instance==UART4)
{
// /* DMA1 clock enable */
// __HAL_RCC_DMA1_CLK_ENABLE();
// /* DMA interrupt init */
// HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 0, 0);
// HAL_NVIC_EnableIRQ(DMA1_Stream2_IRQn);
/* UART4 clock reset */
__HAL_RCC_UART4_FORCE_RESET();
__HAL_RCC_UART4_RELEASE_RESET();
}
#endif // USE_UART4
#ifdef USE_UART5
else if(huart->Instance==UART5)
{
// /* DMA1 clock enable */
// __HAL_RCC_DMA1_CLK_ENABLE();
// /* DMA interrupt init */
// HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 0, 0);
// HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn);
/* UART5 clock reset */
__HAL_RCC_UART5_FORCE_RESET();
__HAL_RCC_UART5_RELEASE_RESET();
}
#endif // USE_UART5
#ifdef USE_USART6
else if(huart->Instance==USART6)
{
// /* DMA2 clock enable */
// __HAL_RCC_DMA2_CLK_ENABLE();
// /* DMA interrupt init */
// HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 0, 0);
// HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn);
/* USART6 clock reset */
__HAL_RCC_USART6_FORCE_RESET();
__HAL_RCC_USART6_RELEASE_RESET();
}
#endif // USE_USART6
}
/**
* @brief Check that uart init structure have correct values.
* @param suart - указатель на структуру с настройками UART.
* @return HAL status.
*/
HAL_StatusTypeDef Check_UART_Init_Struct(UART_SettingsTypeDef *suart)
{
// check is settings are valid
if (!IS_UART_INSTANCE(suart->huart.Instance))
return HAL_ERROR;
if (!IS_UART_BAUDRATE(suart->huart.Init.BaudRate) || (suart->huart.Init.BaudRate == NULL))
return HAL_ERROR;
if (!IS_GPIO_ALL_INSTANCE(suart->GPIOx))
return HAL_ERROR;
if (!IS_GPIO_PIN(suart->GPIO_PIN_RX) && !IS_GPIO_PIN(suart->GPIO_PIN_TX)) // if both pins arent set up
return HAL_ERROR;
return HAL_OK;
}
//------------------------UART INIT FUNCTIONS------------------------
//-------------------------------------------------------------------

106
Code/GENERAL/uart_general.h
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/*********************************UART**************************************
Данный файл содержит объявления базовых функции и дефайны для инициализации
UART.
***************************************************************************/
#ifndef __UART_GENERAL_H_
#define __UART_GENERAL_H_
//////////////////////////////////////////////////////////////////////
/////////////////////////---USER SETTINGS---/////////////////////////
#define HAL_UART_MODULE_ENABLED // need to uncomment these defines in stm32f4xx_hal_conf.h
#define HAL_USART_MODULE_ENABLED // also need to add hal_uart.c (source code)
//#define USE_USART1
//#define USE_USART2
//#define USE_USART3
//#define USE_UART4
//#define USE_UART5
//#define USE_USART6
/* note: used uart defines in modbus.h */
/////////////////////////---USER SETTINGS---/////////////////////////
#include "periph_general.h"
/////////////////////////////////////////////////////////////////////
////////////////////////////---DEFINES---////////////////////////////
/**
* @brief Analog for HAL define. Remade with pointer to structure.
* @note @ref __HAL_LINKDMA.
*/
#define __USER_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \
do{ \
(__HANDLE__)->__PPP_DMA_FIELD__ = (__DMA_HANDLE__); \
(__DMA_HANDLE__)->Parent = (__HANDLE__);} while(0U)
////////////////////////////---DEFINES---////////////////////////////
/////////////////////////////////////////////////////////////////////
///////////////////////---STRUCTURES & ENUMS---//////////////////////
typedef struct // struct with settings for custom function
{
UART_HandleTypeDef huart;
GPIO_TypeDef *GPIOx;
uint16_t GPIO_PIN_RX;
uint16_t GPIO_PIN_TX;
DMA_Stream_TypeDef *DMAChannel; // DMAChannel = 0 if doesnt need
uint32_t DMA_CHANNEL_X; // DMAChannel = 0 if doesnt need
}UART_SettingsTypeDef;
///////////////////////---STRUCTURES & ENUMS---//////////////////////
/////////////////////////////////////////////////////////////////////
///////////////////////////---FUNCTIONS---///////////////////////////
/**
* @brief Initialize UART with UART_SettingsTypeDef structure.
* @param suart - указатель на структуру с настройками UART.
* @return HAL status.
* @note Данная структура содержит хендл ЮАРТ и настройки перефирии (GPIO)
*/
HAL_StatusTypeDef UART_Base_Init(UART_SettingsTypeDef *suart);
/**
* @brief Initialize GPIO for UART.
* @param GPIOx - порт для настройки.
* @param GPIO_PIN_RX - пин для настройки на прием.
* @param GPIO_PIN_TX - пин для настройки на передачу.
*/
void UART_GPIO_Init(GPIO_TypeDef *GPIOx, uint16_t GPIO_PIN_RX, uint16_t GPIO_PIN_TX);
/**
* @brief Initialize DMA for UART.
* @param huart - указатель на хендл UART для настройки DMA.
* @param hdma_rx - указатель на хендл DMA для линии приема UART.
* @param DMAChannel - указатель на канал DMA/поток DMA в STM32F407.
* @param DMA_CHANNEL_X - канал DMA.
*/
void UART_DMA_Init(UART_HandleTypeDef *huart, DMA_HandleTypeDef *hdma_rx, DMA_Stream_TypeDef *DMAChannel, uint32_t DMA_CHANNEL_X);
/**
* @brief Initialize UART & DMA clock and interrupt.
* @param huart - указатель на хендл UART для инициализации.
* @note Чтобы не генерировать функцию с иницилизацией неиспользуемых UART,
дефайнами определяются используемые UART.
*/
void UART_MspInit(UART_HandleTypeDef *huart);
/**
* @brief Deinitialize UART & DMA clock and interrupt.
* @param huart - указатель на хендл UART для деинициализации.
* @note Чтобы не генерировать функцию с деиницилизацией неиспользуемых UART,
дефайнами в rs_message.h определяются используемые UART.
*/
void UART_MspDeInit(UART_HandleTypeDef *huart);
/**
* @brief Check that uart init structure have correct values.
* @param suart - указатель на структуру с настройками UART.
* @return HAL status.
*/
HAL_StatusTypeDef Check_UART_Init_Struct(UART_SettingsTypeDef *suart);
///////////////////////////---FUNCTIONS---///////////////////////////
#endif // __UART_GENERAL_H_

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Code/Modbus/crc_algs.c
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#include "crc_algs.h"
uint32_t CRC_calc;
uint32_t CRC_ref;
//uint16_t CRC_calc;
//uint16_t CRC_ref;
// left this global for debug
uint8_t uchCRCHi = 0xFF;
uint8_t uchCRCLo = 0xFF;
unsigned uIndex;
uint32_t crc32(uint8_t *data, uint32_t data_size)
{
static const unsigned int crc32_table[] =
{
0x00000000, 0x77073096, 0xEE0E612C, 0x990951BA, 0x076DC419, 0x706AF48F, 0xE963A535, 0x9E6495A3,
0x0EDB8832, 0x79DCB8A4, 0xE0D5E91E, 0x97D2D988, 0x09B64C2B, 0x7EB17CBD, 0xE7B82D07, 0x90BF1D91,
0x1DB71064, 0x6AB020F2, 0xF3B97148, 0x84BE41DE, 0x1ADAD47D, 0x6DDDE4EB, 0xF4D4B551, 0x83D385C7,
0x136C9856, 0x646BA8C0, 0xFD62F97A, 0x8A65C9EC, 0x14015C4F, 0x63066CD9, 0xFA0F3D63, 0x8D080DF5,
0x3B6E20C8, 0x4C69105E, 0xD56041E4, 0xA2677172, 0x3C03E4D1, 0x4B04D447, 0xD20D85FD, 0xA50AB56B,
0x35B5A8FA, 0x42B2986C, 0xDBBBC9D6, 0xACBCF940, 0x32D86CE3, 0x45DF5C75, 0xDCD60DCF, 0xABD13D59,
0x26D930AC, 0x51DE003A, 0xC8D75180, 0xBFD06116, 0x21B4F4B5, 0x56B3C423, 0xCFBA9599, 0xB8BDA50F,
0x2802B89E, 0x5F058808, 0xC60CD9B2, 0xB10BE924, 0x2F6F7C87, 0x58684C11, 0xC1611DAB, 0xB6662D3D,
0x76DC4190, 0x01DB7106, 0x98D220BC, 0xEFD5102A, 0x71B18589, 0x06B6B51F, 0x9FBFE4A5, 0xE8B8D433,
0x7807C9A2, 0x0F00F934, 0x9609A88E, 0xE10E9818, 0x7F6A0DBB, 0x086D3D2D, 0x91646C97, 0xE6635C01,
0x6B6B51F4, 0x1C6C6162, 0x856530D8, 0xF262004E, 0x6C0695ED, 0x1B01A57B, 0x8208F4C1, 0xF50FC457,
0x65B0D9C6, 0x12B7E950, 0x8BBEB8EA, 0xFCB9887C, 0x62DD1DDF, 0x15DA2D49, 0x8CD37CF3, 0xFBD44C65,
0x4DB26158, 0x3AB551CE, 0xA3BC0074, 0xD4BB30E2, 0x4ADFA541, 0x3DD895D7, 0xA4D1C46D, 0xD3D6F4FB,
0x4369E96A, 0x346ED9FC, 0xAD678846, 0xDA60B8D0, 0x44042D73, 0x33031DE5, 0xAA0A4C5F, 0xDD0D7CC9,
0x5005713C, 0x270241AA, 0xBE0B1010, 0xC90C2086, 0x5768B525, 0x206F85B3, 0xB966D409, 0xCE61E49F,
0x5EDEF90E, 0x29D9C998, 0xB0D09822, 0xC7D7A8B4, 0x59B33D17, 0x2EB40D81, 0xB7BD5C3B, 0xC0BA6CAD,
0xEDB88320, 0x9ABFB3B6, 0x03B6E20C, 0x74B1D29A, 0xEAD54739, 0x9DD277AF, 0x04DB2615, 0x73DC1683,
0xE3630B12, 0x94643B84, 0x0D6D6A3E, 0x7A6A5AA8, 0xE40ECF0B, 0x9309FF9D, 0x0A00AE27, 0x7D079EB1,
0xF00F9344, 0x8708A3D2, 0x1E01F268, 0x6906C2FE, 0xF762575D, 0x806567CB, 0x196C3671, 0x6E6B06E7,
0xFED41B76, 0x89D32BE0, 0x10DA7A5A, 0x67DD4ACC, 0xF9B9DF6F, 0x8EBEEFF9, 0x17B7BE43, 0x60B08ED5,
0xD6D6A3E8, 0xA1D1937E, 0x38D8C2C4, 0x4FDFF252, 0xD1BB67F1, 0xA6BC5767, 0x3FB506DD, 0x48B2364B,
0xD80D2BDA, 0xAF0A1B4C, 0x36034AF6, 0x41047A60, 0xDF60EFC3, 0xA867DF55, 0x316E8EEF, 0x4669BE79,
0xCB61B38C, 0xBC66831A, 0x256FD2A0, 0x5268E236, 0xCC0C7795, 0xBB0B4703, 0x220216B9, 0x5505262F,
0xC5BA3BBE, 0xB2BD0B28, 0x2BB45A92, 0x5CB36A04, 0xC2D7FFA7, 0xB5D0CF31, 0x2CD99E8B, 0x5BDEAE1D,
0x9B64C2B0, 0xEC63F226, 0x756AA39C, 0x026D930A, 0x9C0906A9, 0xEB0E363F, 0x72076785, 0x05005713,
0x95BF4A82, 0xE2B87A14, 0x7BB12BAE, 0x0CB61B38, 0x92D28E9B, 0xE5D5BE0D, 0x7CDCEFB7, 0x0BDBDF21,
0x86D3D2D4, 0xF1D4E242, 0x68DDB3F8, 0x1FDA836E, 0x81BE16CD, 0xF6B9265B, 0x6FB077E1, 0x18B74777,
0x88085AE6, 0xFF0F6A70, 0x66063BCA, 0x11010B5C, 0x8F659EFF, 0xF862AE69, 0x616BFFD3, 0x166CCF45,
0xA00AE278, 0xD70DD2EE, 0x4E048354, 0x3903B3C2, 0xA7672661, 0xD06016F7, 0x4969474D, 0x3E6E77DB,
0xAED16A4A, 0xD9D65ADC, 0x40DF0B66, 0x37D83BF0, 0xA9BCAE53, 0xDEBB9EC5, 0x47B2CF7F, 0x30B5FFE9,
0xBDBDF21C, 0xCABAC28A, 0x53B39330, 0x24B4A3A6, 0xBAD03605, 0xCDD70693, 0x54DE5729, 0x23D967BF,
0xB3667A2E, 0xC4614AB8, 0x5D681B02, 0x2A6F2B94, 0xB40BBE37, 0xC30C8EA1, 0x5A05DF1B, 0x2D02EF8D
};
unsigned int crc = 0xFFFFFFFF;
while (data_size--)
{
crc = (crc >> 8) ^ crc32_table[(crc ^ *data) & 255];
data++;
}
return crc^0xFFFFFFFF;
}
uint16_t crc16(uint8_t *data, uint32_t data_size)
{
/*Table of CRC values for high order byte*/
static unsigned char auchCRCHi[]=
{
0x00,0xC1,0x81,0x40,0x01,0xC0,0x80,0x41,0x01,0xC0,0x80,0x41,0x00,0xC1,0x81,0x40,
0x01,0xC0,0x80,0x41,0x00,0xC1,0x81,0x40,0x00,0xC1,0x81,0x40,0x01,0xC0,0x80,0x41,
0x01,0xC0,0x80,0x41,0x00,0xC1,0x81,0x40,0x00,0xC1,0x81,0x40,0x01,0xC0,0x80,0x41,
0x00,0xC1,0x81,0x40,0x01,0xC0,0x80,0x41,0x01,0xC0,0x80,0x41,0x00,0xC1,0x81,0x40,
0x01,0xC0,0x80,0x41,0x00,0xC1,0x81,0x40,0x00,0xC1,0x81,0x40,0x01,0xC0,0x80,0x41,
0x00,0xC1,0x81,0x40,0x01,0xC0,0x80,0x41,0x01,0xC0,0x80,0x41,0x00,0xC1,0x81,0x40,
0x00,0xC1,0x81,0x40,0x01,0xC0,0x80,0x41,0x01,0xC0,0x80,0x41,0x00,0xC1,0x81,0x40,
0x01,0xC0,0x80,0x41,0x00,0xC1,0x81,0x40,0x00,0xC1,0x81,0x40,0x01,0xC0,0x80,0x41,
0x01,0xC0,0x80,0x41,0x00,0xC1,0x81,0x40,0x00,0xC1,0x81,0x40,0x01,0xC0,0x80,0x41,
0x00,0xC1,0x81,0x40,0x01,0xC0,0x80,0x41,0x01,0xC0,0x80,0x41,0x00,0xC1,0x81,0x40,
0x00,0xC1,0x81,0x40,0x01,0xC0,0x80,0x41,0x01,0xC0,0x80,0x41,0x00,0xC1,0x81,0x40,
0x01,0xC0,0x80,0x41,0x00,0xC1,0x81,0x40,0x00,0xC1,0x81,0x40,0x01,0xC0,0x80,0x41,
0x00,0xC1,0x81,0x40,0x01,0xC0,0x80,0x41,0x01,0xC0,0x80,0x41,0x00,0xC1,0x81,0x40,
0x01,0xC0,0x80,0x41,0x00,0xC1,0x81,0x40,0x00,0xC1,0x81,0x40,0x01,0xC0,0x80,0x41,
0x01,0xC0,0x80,0x41,0x00,0xC1,0x81,0x40,0x00,0xC1,0x81,0x40,0x01,0xC0,0x80,0x41,
0x00,0xC1,0x81,0x40,0x01,0xC0,0x80,0x41,0x01,0xC0,0x80,0x41,0x00,0xC1,0x81,0x40,
};
/*Table of CRC values for low order byte*/
static char auchCRCLo[] =
{
0x00,0xC0,0xC1,0x01,0xC3,0x03,0x02,0xC2,0xC6,0x06,0x07,0xC7,0x05,0xC5,0xC4,0x04,
0xCC,0x0C,0x0D,0xCD,0x0F,0xCF,0xCE,0x0E,0x0A,0xCA,0xCB,0x0B,0xC9,0x09,0x08,0xC8,
0xD8,0x18,0x19,0xD9,0x1B,0xDB,0xDA,0x1A,0x1E,0xDE,0xDF,0x1F,0xDD,0x1D,0x1C,0xDC,
0x14,0xD4,0xD5,0x15,0xD7,0x17,0x16,0xD6,0xD2,0x12,0x13,0xD3,0x11,0xD1,0xD0,0x10,
0xF0,0x30,0x31,0xF1,0x33,0xF3,0xF2,0x32,0x36,0xF6,0xF7,0x37,0xF5,0x35,0x34,0xF4,
0x3C,0xFC,0xFD,0x3D,0xFF,0x3F,0x3E,0xFE,0xFA,0x3A,0x3B,0xFB,0x39,0xF9,0xF8,0x38,
0x28,0xE8,0xE9,0x29,0xEB,0x2B,0x2A,0xEA,0xEE,0x2E,0x2F,0xEF,0x2D,0xED,0xEC,0x2C,
0xE4,0x24,0x25,0xE5,0x27,0xE7,0xE6,0x26,0x22,0xE2,0xE3,0x23,0xE1,0x21,0x20,0xE0,
0xA0,0x60,0x61,0xA1,0x63,0xA3,0xA2,0x62,0x66,0xA6,0xA7,0x67,0xA5,0x65,0x64,0xA4,
0x6C,0xAC,0xAD,0x6D,0xAF,0x6F,0x6E,0xAE,0xAA,0x6A,0x6B,0xAB,0x69,0xA9,0xA8,0x68,
0x78,0xB8,0xB9,0x79,0xBB,0x7B,0x7A,0xBA,0xBE,0x7E,0x7F,0xBF,0x7D,0xBD,0xBC,0x7C,
0xB4,0x74,0x75,0xB5,0x77,0xB7,0xB6,0x76,0x72,0xB2,0xB3,0x73,0xB1,0x71,0x70,0xB0,
0x50,0x90,0x91,0x51,0x93,0x53,0x52,0x92,0x96,0x56,0x57,0x97,0x55,0x95,0x94,0x54,
0x9C,0x5C,0x5D,0x9D,0x5F,0x9F,0x9E,0x5E,0x5A,0x9A,0x9B,0x5B,0x99,0x59,0x58,0x98,
0x88,0x48,0x49,0x89,0x4B,0x8B,0x8A,0x4A,0x4E,0x8E,0x8F,0x4F,0x8D,0x4D,0x4C,0x8C,
0x44,0x84,0x85,0x45,0x87,0x47,0x46,0x86,0x82,0x42,0x43,0x83,0x41,0x81,0x80,0x40,
};
uchCRCHi = 0xFF;
uchCRCLo = 0xFF;
/* CRC Generation Function */
while( data_size--) /* pass through message buffer */
{
uIndex = uchCRCHi ^ *data++; /* calculate the CRC */
uchCRCHi = uchCRCLo ^ auchCRCHi[uIndex];
uchCRCLo = auchCRCLo[uIndex];
}
return uchCRCHi | uchCRCLo<<8;
}

9
Code/Modbus/crc_algs.h
View File

@ -1,9 +0,0 @@
#include "main.h"
// extern here to use in bootloader.c
extern uint32_t CRC_calc;
extern uint32_t CRC_ref;
uint16_t crc16(uint8_t *data, uint32_t data_size);
uint32_t crc32(uint8_t *data, uint32_t data_size);

864
Code/Modbus/modbus.c
View File

@ -1,864 +0,0 @@
/********************************MODBUS*************************************
Данный файл содержит базовые функции для реализации MODBUS.
//-------------------Функции-------------------//
@func user
- MB_SetCoil
- MB_ResetCoil
@func process message
- MB_DefineRegistersAddress Определение "начального" адреса регистров
- MB_DefineCoilsAddress Определение "начального" адреса коилов
- MB_Check_Address_For_Arr принадлежит ли адресс Addr конкретному массиву
- Modbus_Command_x Обработка команды x
@func RS functions
- Parse_Message/Collect_Message Заполнение структуры сообщения и буфера
- RS_Response Ответ на комманду
- RS_Define_Size_of_RX_Message Определение размера принимаемых данных
- RS_Init Инициализация периферии и modbus handler
@func initialization
- MB_Init Инициализация modbus
//--------------Данные для модбас--------------//
@registers Holding/Input Registers
Регистры представляют собой 16-битные числа (слова). В обработке комманд
находится адресс "начального" регистра и записывается в указатель. Доступ к
остальным регистрам осуществляется через указатель. Таким образом, сами
регистры могут представлять собой как массив так и структуру.
- sine_log - массив регистров на 500 элементов
- sine_log - массив регистров на 500 элементов
@coils Coils
Коилы представляют собой биты, упакованные в 16-битные регистры. В обработке
комманд находится адресс "начального" регистра запрашиваемого коила. Доступ к
остальным коилам осуществляется через маску и указатель. Таким образом, сами
коилы могут представлять собой как массив так и структуру.
@example SLAVE RECEIVE
//--------------Настройка модбас--------------//
// create handles and settings
Create_MODBUS_Handles(modbus1);
// set up UART for modbus
modbus1_suart.huart = &modbus1_huart;
modbus1_suart.huart->Instance = USED_MODBUS_UART;
modbus1_suart.huart->Init.BaudRate = 38400;
modbus1_suart.GPIOx = MODBUS_GPIOX;
modbus1_suart.GPIO_PIN_RX = MODBUS_GPIO_PIN_RX;
modbus1_suart.GPIO_PIN_TX = MODBUS_GPIO_PIN_TX;
// set up timeout TIM for modbus
modbus1_stim.htim = &modbus1_htim;
modbus1_stim.htim.Instance = USED_MODBUS_TIM;
modbus1_stim.htim.Init.Prescaler = 36000; // set this to 0.5 ms
modbus1_stim.TIM_MODE = TIM_IT_CONF;
// set up modbus: MB_RX_Size_NotConst and Timeout enable
hmodbus1.ID = 1;
hmodbus1.sRS_RX_Size_Mode = RS_RX_Size_NotConst;
hmodbus1.sRS_Timeout = 100;
hmodbus1.sRS_Mode = SLAVE_ALWAYS_WAIT;
hmodbus1.RS_STATUS = RS_Init(&hmodbus1, &modbus1_suart, &modbus1_stim, 0);
//----------------Прием модбас----------------//
RS_MsgTypeDef MODBUS_MSG;
RS_Receive_IT(&hmodbus1, &MODBUS_MSG);
***************************************************************************/
#include "rs_message.h"
uint32_t dbg_temp, dbg_temp2, dbg_temp3; // for debug
uint32_t err_cnt = 0;
/* EXTERN MODBUS HANDLES */
extern UART_SettingsTypeDef modbus1_suart;
extern TIM_SettingsTypeDef modbus1_stim;
extern RS_HandleTypeDef hmodbus1;
/* DEFINE REGISTERS/COILS */
uint16_t sine_log[R_SINE_LOG_QNT]; // start from 0x0000
uint16_t pwm_log[R_PWM_LOG_QNT]; // start from 500 (0x1F4)
uint16_t cnt_log[R_CNT_LOG_QNT]; // start from 100 (0x3E8)
uint16_t time_log[R_TIME_LOG_QNT]; // start from 1500 (0x5DC)
uint16_t pwm_ctrl[R_PWM_CTRL_QNT]; // start from 2000 (0x7D0)
uint16_t log_ctrl[R_PWM_CTRL_QNT]; // start from 2008 (0x7D0)
uint16_t uart_ctrl[R_UART_CTRL_QNT];
uint16_t coils_regs[C_CTRL_COILS_QNT];
//-------------------------------------------------------------------
//-----------------------------FOR USER------------------------------
/**
* @brief First set up of MODBUS.
* @note Первый инит модбас. Заполняет структуры и инициализирует таймер и юарт для общения по модбас.
* Скважность ШИМ меняется по закону синусоиды, каждый канал генерирует свой полупериод синуса (от -1 до 0 И от 0 до 1)
* ШИМ генерируется на одном канале.
* @note This called from main
*/
void MODBUS_FirstInit(void)
{
//-----------SETUP MODBUS-------------
// set up UART for modbus
modbus1_suart.huart.Instance = USED_MODBUS_UART;
modbus1_suart.huart.Init.BaudRate = PROJSET.MB_SPEED;
modbus1_suart.GPIOx = (GPIO_TypeDef *)PROJSET.MB_GPIOX;
modbus1_suart.GPIO_PIN_RX = PROJSET.MB_GPIO_PIN_RX;
modbus1_suart.GPIO_PIN_TX = PROJSET.MB_GPIO_PIN_TX;
// set up timeout TIM for modbus
modbus1_stim.htim.Instance = USED_MODBUS_TIM;
modbus1_stim.sTimAHBFreqMHz = PROJSET.MB_TIM_AHB_FREQ;
modbus1_stim.sTimMode = TIM_IT_CONF;
// set up modbus: MB_RX_Size_NotConst and Timeout enable
hmodbus1.ID = PROJSET.MB_DEVICE_ID;
hmodbus1.sRS_Timeout = PROJSET.MB_MAX_TIMEOUT;
hmodbus1.sRS_Mode = SLAVE_ALWAYS_WAIT;
hmodbus1.sRS_RX_Size_Mode = RS_RX_Size_NotConst;
// INIT
hmodbus1.RS_STATUS = RS_Init(&hmodbus1, &modbus1_suart, &modbus1_stim, 0);
}
/**
* @brief Set or Reset Coil at its global address.
* @param Addr - адрес коила.
* @param WriteVal - Что записать в коил: 0 или 1.
* @return ExceptionCode - Код исключения если коила по адресу не существует, и NO_ERRORS если все ок.
*
* @note Позволяет обратиться к любому коилу по его глобальному адрессу.
Вне зависимости от того как коилы размещены в памяти.
*/
MB_ExceptionTypeDef MB_Write_Coil_Global(uint16_t Addr, MB_CoilsOpTypeDef WriteVal)
{
//---------CHECK FOR ERRORS----------
MB_ExceptionTypeDef Exception = NO_ERRORS;
uint16_t *coils;
uint16_t start_shift = 0; // shift in coils register
//------------WRITE COIL-------------
Exception = MB_DefineCoilsAddress(&coils, Addr, 1, &start_shift, 1);
if(Exception == NO_ERRORS)
{
switch(WriteVal)
{
case SET_COIL:
*coils |= (1<<start_shift);
break;
case RESET_COIL:
*coils &= ~(1<<start_shift);
break;
case TOOGLE_COIL:
*coils ^= (1<<start_shift);
break;
}
}
return Exception;
}
/**
* @brief Read Coil at its global address.
* @param Addr - адрес коила.
* @param Exception - Указатель на переменную для кода исключения, в случа неудачи при чтении.
* @return uint16_t - Возвращает весь регистр с маской на запрошенном коиле.
*
* @note Позволяет обратиться к любому коилу по его глобальному адрессу.
Вне зависимости от того как коилы размещены в памяти.
*/
uint16_t MB_Read_Coil_Global(uint16_t Addr, MB_ExceptionTypeDef *Exception)
{
//---------CHECK FOR ERRORS----------
MB_ExceptionTypeDef Exception_tmp;
if(Exception == NULL) // if exception is not given to func fill it
Exception = &Exception_tmp;
uint16_t *coils;
uint16_t start_shift = 0; // shift in coils register
//------------READ COIL--------------
*Exception = MB_DefineCoilsAddress(&coils, Addr, 1, &start_shift, 0);
if(*Exception == NO_ERRORS)
{
return ((*coils)&(1<<start_shift));
}
else
{
return 0;
}
}
//-------------------------------------------------------------------
//----------------FUNCTIONS FOR PROCESSING MESSAGE-------------------
/**
* @brief Define Address Origin for Input/Holding Registers
* @param pRegs - указатель на указатель регистров.
* @param Addr - адрес начального регистра.
* @param Qnt - количество запрашиваемых регистров.
* @param WriteFlag - флаг регистр нужны для чтения или записи.
* @return ExceptionCode - Код исключения если есть, и NO_ERRORS если нет.
*
* @note Определение адреса начального регистра.
* @note WriteFlag пока не используется.
*/
MB_ExceptionTypeDef MB_DefineRegistersAddress(uint16_t **pRegs, uint16_t Addr, uint16_t Qnt, uint8_t WriteFlag)
{
/* check quantity error */
if (Qnt > 125)
{
return ILLEGAL_DATA_VALUE; // return exception code
}
// sensors array
if(MB_Check_Address_For_Arr(Addr, Qnt, R_SINE_LOG_ADDR, R_SINE_LOG_QNT) == NO_ERRORS)
{
*pRegs = MB_Set_Register_Ptr(&sine_log, Addr); // начало регистров хранения/входных
}
// PWM array
else if(MB_Check_Address_For_Arr(Addr, Qnt, R_PWM_LOG_ADDR, R_PWM_LOG_QNT) == NO_ERRORS)
{
*pRegs = MB_Set_Register_Ptr(&pwm_log, Addr - R_PWM_LOG_ADDR); // начало регистров хранения/входных
}
// counter array
else if(MB_Check_Address_For_Arr(Addr, Qnt, R_CNT_LOG_ADDR, R_CNT_LOG_QNT) == NO_ERRORS)
{
*pRegs = MB_Set_Register_Ptr(&cnt_log, Addr - R_CNT_LOG_ADDR); // начало регистров хранения/входных
}
// time array
else if(MB_Check_Address_For_Arr(Addr, Qnt, R_TIME_LOG_ADDR, R_TIME_LOG_QNT) == NO_ERRORS)
{
*pRegs = MB_Set_Register_Ptr(&time_log, Addr - R_TIME_LOG_ADDR); // начало регистров хранения/входных
}
// PWM array
else if(MB_Check_Address_For_Arr(Addr, Qnt, R_PWM_CTRL_ADDR, R_PWM_CTRL_QNT) == NO_ERRORS)
{
*pRegs = MB_Set_Register_Ptr(&pwm_ctrl, Addr - R_PWM_CTRL_ADDR); // начало регистров хранения/входных
}
// log array
else if(MB_Check_Address_For_Arr(Addr, Qnt, R_LOG_CTRL_ADDR, R_LOG_CTRL_QNT) == NO_ERRORS)
{
*pRegs = MB_Set_Register_Ptr(&log_ctrl, Addr - R_LOG_CTRL_ADDR); // начало регистров хранения/входных
}
// uart settings array
else if(MB_Check_Address_For_Arr(Addr, Qnt, R_UART_CTRL_ADDR, R_UART_CTRL_QNT) == NO_ERRORS)
{
*pRegs = MB_Set_Register_Ptr(&uart_ctrl, Addr - R_UART_CTRL_ADDR); // начало регистров хранения/входных
}
// if address doesnt match any array - return illegal data address response
else
{
return ILLEGAL_DATA_ADDRESS;
}
// if found requeried array return no err
return NO_ERRORS; // return no errors
}
/**
* @brief Define Address Origin for coils
* @param pCoils - указатель на указатель коилов.
* @param Addr - адресс начального коила.
* @param Qnt - количество запрашиваемых коилов.
* @param start_shift - указатель на переменную содержащую сдвиг внутри регистра для начального коила.
* @param WriteFlag - флаг коилы нужны для чтения или записи.
* @return ExceptionCode - Код исключения если есть, и NO_ERRORS если нет.
*
* @note Определение адреса начального регистра запрашиваемых коилов.
* @note WriteFlag используется для определния регистров GPIO: ODR или IDR.
*/
MB_ExceptionTypeDef MB_DefineCoilsAddress(uint16_t **pCoils, uint16_t Addr, uint16_t Qnt, uint16_t *start_shift, uint8_t WriteFlag)
{
/* check quantity error */
if (Qnt > 2000)
{
return ILLEGAL_DATA_VALUE; // return exception code
}
// gpiod coils
if(MB_Check_Address_For_Arr(Addr, Qnt, C_GPIOD_ADDR, C_GPIOD_QNT) == NO_ERRORS)
{
if(WriteFlag) // if write set odr
*pCoils = MB_Set_Coil_Reg_Ptr(&GPIOD->ODR, Addr);
else // if read set idr
*pCoils = MB_Set_Coil_Reg_Ptr(&GPIOD->IDR, Addr);
}
// peripheral control coils
else if(MB_Check_Address_For_Arr(Addr, Qnt, C_CTRL_COILS_ADDR, C_CTRL_COILS_QNT) == NO_ERRORS)
{
*pCoils = MB_Set_Coil_Reg_Ptr(&coils_regs, Addr-C_CTRL_COILS_ADDR);
}
// if address doesnt match any array - return illegal data address response
else
{
return ILLEGAL_DATA_ADDRESS;
}
*start_shift = Addr % 16; // set shift to requested coil
// if found requeried array return no err
return NO_ERRORS; // return no errors
}
/**
* @brief Check is address valid for certain array.
* @param Addr - начальный адресс.
* @param Qnt - количество запрашиваемых элементов.
* @param R_ARR_ADDR - начальный адресс массива R_ARR.
* @param R_ARR_NUMB - количество элементов в массиве R_ARR.
* @return ExceptionCode - ILLEGAL DATA ADRESS если адресс недействителен, и NO_ERRORS если все ок.
*
* @note Позволяет определить, принадлежит ли адресс Addr массиву R_ARR:
* Если адресс Addr находится в диапазоне адрессов массива R_ARR, то возвращаем NO_ERROR.
* Если адресс Addr находится за пределами адрессов массива R_ARR - ILLEGAL_DATA_ADDRESSю.
*/
MB_ExceptionTypeDef MB_Check_Address_For_Arr(uint16_t Addr, uint16_t Qnt, uint16_t R_ARR_ADDR, uint16_t R_ARR_NUMB)
{
// if address from this array
if(Addr >= R_ARR_ADDR)
{
// if quantity too big return error
if ((Addr - R_ARR_ADDR) + Qnt > R_ARR_NUMB)
{
return ILLEGAL_DATA_ADDRESS; // return exception code
}
// if all ok - return no errors
return NO_ERRORS;
}
// if address isnt from this array return error
else
return ILLEGAL_DATA_ADDRESS; // return exception code
}
/**
* @brief Proccess command Read Coils (01 - 0x01).
* @param modbus_msg - указатель на структуру собщения modbus.
* @return fMessageHandled - статус о результате обработки комманды.
* @note Обработка команды Read Coils.
*/
uint8_t MB_Read_Coils(RS_MsgTypeDef *modbus_msg)
{
//---------CHECK FOR ERRORS----------
uint16_t *coils;
uint16_t start_shift = 0; // shift in coils register
modbus_msg->Except_Code = MB_DefineCoilsAddress(&coils, modbus_msg->Addr, modbus_msg->Qnt, &start_shift, 0);
if(modbus_msg->Except_Code != NO_ERRORS)
return 0;
//-----------READING COIL------------
// setup output message data size
modbus_msg->ByteCnt = Divide_Up(modbus_msg->Qnt, 8);
// create mask for coils
uint16_t mask_for_coils = 0; // mask for coils that've been chosen
uint16_t setted_coils = 0; // value of setted coils
uint16_t temp_reg = 0; // temp register for saving coils that hasnt been chosen
uint16_t coil_cnt = 0; // counter for processed coils
// cycle until all registers with requered coils would be processed
int shift = start_shift; // set shift to first coil in first register
int ind = 0; // index for coils registers and data
for(; ind <= Divide_Up(start_shift + modbus_msg->Qnt, 16); ind++)
{
//----SET MASK FOR COILS REGISTER----
mask_for_coils = 0;
for(; shift < 0x10; shift++)
{
mask_for_coils |= 1<<(shift); // choose certain coil
if(++coil_cnt >= modbus_msg->Qnt)
break;
}
shift = 0; // set shift to zero for the next step
//-----------READ COILS--------------
modbus_msg->DATA[ind] = (*(coils+ind)&mask_for_coils) >> start_shift;
if(ind > 0)
modbus_msg->DATA[ind-1] |= ((*(coils+ind)&mask_for_coils) << 16) >> start_shift;
}
// т.к. DATA 16-битная, для 8-битной передачи, надо поменять местами верхний и нижний байты
for(; ind >= 0; --ind)
modbus_msg->DATA[ind] = ByteSwap16(modbus_msg->DATA[ind]);
return 1;
}
/**
* @brief Proccess command Read Holding Registers (03 - 0x03).
* @param modbus_msg - указатель на структуру собщения modbus.
* @return fMessageHandled - статус о результате обработки комманды.
* @note Обработка команды Read Holding Registers.
*/
uint8_t MB_Read_Hold_Regs(RS_MsgTypeDef *modbus_msg)
{
//---------CHECK FOR ERRORS----------
// get origin address for data
uint16_t *pHoldRegs;
modbus_msg->Except_Code = MB_DefineRegistersAddress(&pHoldRegs, modbus_msg->Addr, modbus_msg->Qnt, NULL); // определение адреса регистров
if(modbus_msg->Except_Code != NO_ERRORS)
return 0;
//-----------READING REGS------------
// setup output message data size
modbus_msg->ByteCnt = modbus_msg->Qnt*2; // *2 because we transmit 8 bits, not 16 bits
// read data
int i;
for (i = 0; i<modbus_msg->Qnt; i++)
{
modbus_msg->DATA[i] = *(pHoldRegs++);
}
return 1;
}
/**
* @brief Proccess command Write Single Coils (05 - 0x05).
* @param modbus_msg - указатель на структуру собщения modbus.
* @return fMessageHandled - статус о результате обработки комманды.
* @note Обработка команды Write Single Coils.
*/
uint8_t MB_Write_Single_Coil(RS_MsgTypeDef *modbus_msg)
{
//---------CHECK FOR ERRORS----------
if ((modbus_msg->Qnt != 0x0000) && (modbus_msg->Qnt != 0xFF00))
{
modbus_msg->Except_Code = ILLEGAL_DATA_VALUE;
return 0;
}
// define position of coil
uint16_t *coils;
uint16_t start_shift = 0; // shift in coils register
modbus_msg->Except_Code = MB_DefineCoilsAddress(&coils, modbus_msg->Addr, 0, &start_shift, 1);
if(modbus_msg->Except_Code != NO_ERRORS)
return 0;
//----------WRITTING COIL------------
if(modbus_msg->Qnt == 0xFF00)
*(coils) |= 1<<start_shift; // write flags corresponding to received data
else
*(coils) &= ~(1<<start_shift); // write flags corresponding to received data
return 1;
}
/**
* @brief Proccess command Write Single Register (06 - 0x06).
* @param modbus_msg - указатель на структуру собщения modbus.
* @return fMessageHandled - статус о результате обработки комманды.
* @note Обработка команды Write Single Register.
*/
uint8_t MB_Write_Single_Reg(RS_MsgTypeDef *modbus_msg)
{
// get origin address for data
uint16_t *pInputRegs;
modbus_msg->Except_Code = MB_DefineRegistersAddress(&pInputRegs, modbus_msg->Addr, 1, NULL); // определение адреса регистров
if(modbus_msg->Except_Code != NO_ERRORS)
return 0;
//-----------WRITTING REG------------
*(pInputRegs) = modbus_msg->Qnt;
return 1;
}
/**
* @brief Proccess command Write Multiple Coils (15 - 0x0F).
* @param modbus_msg - указатель на структуру собщения modbus.
* @return fMessageHandled - статус о результате обработки комманды.
* @note Обработка команды Write Multiple Coils.
*/
uint8_t MB_Write_Miltuple_Coils(RS_MsgTypeDef *modbus_msg)
{
//---------CHECK FOR ERRORS----------
if (modbus_msg->ByteCnt != Divide_Up(modbus_msg->Qnt, 8))
{ // if quantity too large OR if quantity and bytes count arent match
modbus_msg->Except_Code = ILLEGAL_DATA_VALUE;
return 0;
}
// define position of coil
uint16_t *coils; // pointer to coils
uint16_t start_shift = 0; // shift in coils register
modbus_msg->Except_Code = MB_DefineCoilsAddress(&coils, modbus_msg->Addr, modbus_msg->Qnt, &start_shift, 1);
if(modbus_msg->Except_Code != NO_ERRORS)
return 0;
//----------WRITTING COILS-----------
// create mask for coils
uint16_t mask_for_coils = 0; // mask for coils that've been chosen
uint32_t setted_coils = 0; // value of setted coils
uint16_t temp_reg = 0; // temp register for saving coils that hasnt been chosen
uint16_t coil_cnt = 0; // counter for processed coils
// cycle until all registers with requered coils would be processed
int shift = start_shift; // set shift to first coil in first register
for(int ind = 0; ind <= Divide_Up(start_shift + modbus_msg->Qnt, 16); ind++)
{
//----SET MASK FOR COILS REGISTER----
mask_for_coils = 0;
for(; shift < 0x10; shift++)
{
mask_for_coils |= 1<<(shift); // choose certain coil
if(++coil_cnt >= modbus_msg->Qnt)
break;
}
shift = 0; // set shift to zero for the next step
//-----------WRITE COILS-------------
// get current coils
temp_reg = *(coils+ind);
// set coils
setted_coils = ByteSwap16(modbus_msg->DATA[ind]) << start_shift;
if(ind > 0)
{
setted_coils |= ((ByteSwap16(modbus_msg->DATA[ind-1]) << start_shift) >> 16);
}
// write coils
*(coils+ind) = setted_coils & mask_for_coils;
// restore untouched coils
*(coils+ind) |= temp_reg&(~mask_for_coils);
if(coil_cnt >= modbus_msg->Qnt) // if all coils written - break cycle
break; // *kind of unnecessary
}
return 1;
}
/**
* @brief Proccess command Write Multiple Registers (16 - 0x10).
* @param modbus_msg - указатель на структуру собщения modbus.
* @return fMessageHandled - статус о результате обработки комманды.
* @note Обработка команды Write Multiple Registers.
*/
uint8_t MB_Write_Miltuple_Regs(RS_MsgTypeDef *modbus_msg)
{
//---------CHECK FOR ERRORS----------
if (modbus_msg->Qnt*2 != modbus_msg->ByteCnt)
{ // if quantity and bytes count arent match
modbus_msg->Except_Code = 3;
return 0;
}
// get origin address for data
uint16_t *pInputRegs;
modbus_msg->Except_Code = MB_DefineRegistersAddress(&pInputRegs, modbus_msg->Addr, modbus_msg->Qnt, NULL); // определение адреса регистров
if(modbus_msg->Except_Code != NO_ERRORS)
return 0;
//-----------WRITTING REGS-----------
for (int i = 0; i<modbus_msg->Qnt; i++)
{
*(pInputRegs++) = modbus_msg->DATA[i];
}
return 1;
}
/**
* @brief Respond accord to received message.
* @param hRS - указатель на хендлер RS.
* @param RS_msg - указатель на структуру сообщения.
* @return RS_RES - статус о результате ответа на комманду.
* @note Обработка принятой комманды и ответ на неё.
*/
RS_StatusTypeDef RS_Response(RS_HandleTypeDef *hmodbus, RS_MsgTypeDef *modbus_msg)
{
RS_StatusTypeDef MB_RES = 0;
hmodbus->fMessageHandled = 0;
hmodbus->fEchoResponse = 0;
RS_Reset_TX_Flags(hmodbus); // reset flag for correct transmit
if(modbus_msg->Func_Code < ERR_VALUES_START)// if no errors after parsing
{
switch (modbus_msg->Func_Code)
{
// Read Coils
case MB_R_COILS:
hmodbus->fMessageHandled = MB_Read_Coils(hmodbus->pMessagePtr);
break;
// case MB_R_DISC_IN: break;
// Read Hodling Registers
case MB_R_HOLD_REGS:
case MB_R_IN_REGS:
hmodbus->fMessageHandled = MB_Read_Hold_Regs(hmodbus->pMessagePtr);
break;
// Write Single Coils
case MB_W_COIL:
hmodbus->fMessageHandled = MB_Write_Single_Coil(hmodbus->pMessagePtr);
if(hmodbus->fMessageHandled) hmodbus->fEchoResponse = 1; // echo response if write ok
break;
case MB_W_IN_REG:
hmodbus->fMessageHandled = MB_Write_Single_Reg(hmodbus->pMessagePtr);
if(hmodbus->fMessageHandled) hmodbus->fEchoResponse = 1; // echo response if write ok
break;
// Write Multiple Coils
case MB_W_COILS:
hmodbus->fMessageHandled = MB_Write_Miltuple_Coils(hmodbus->pMessagePtr);
if(hmodbus->fMessageHandled) hmodbus->fEchoResponse = 1; hmodbus->RS_Message_Size = 6; // echo response if write ok (withous data bytes)
break;
// Write Multiple Registers
case MB_W_IN_REGS:
hmodbus->fMessageHandled = MB_Write_Miltuple_Regs(hmodbus->pMessagePtr);
if(hmodbus->fMessageHandled) hmodbus->fEchoResponse = 1; hmodbus->RS_Message_Size = 6; // echo response if write ok (withous data bytes)
break;
/* unknown func code */
default: modbus_msg->Except_Code = 0x01; /* set exception code: illegal function */
}
if(hmodbus->fMessageHandled == 0)
modbus_msg->Func_Code += ERR_VALUES_START;
}
// if we need response - check that transmit isnt busy
if( RS_Is_TX_Busy(hmodbus) )
RS_Abort(hmodbus, ABORT_TX); // if tx busy - set it free
// Transmit right there, or sets (fDeferredResponse) to transmit response in main code
MB_RES = RS_Handle_Transmit_Start(hmodbus, modbus_msg);
hmodbus->RS_STATUS = MB_RES;
return MB_RES;
}
/**
* @brief Collect message in buffer to transmit it.
* @param hRS - указатель на хендлер RS.
* @param RS_msg - указатель на структуру сообщения.
* @param msg_uart_buff - указатель на буффер UART.
* @return RS_RES - статус о результате заполнения буфера.
* @note Заполнение буффера UART из структуры сообщения.
*/
RS_StatusTypeDef Collect_Message(RS_HandleTypeDef *hmodbus, RS_MsgTypeDef *modbus_msg, uint8_t *modbus_uart_buff)
{
int ind = 0; // ind for modbus-uart buffer
if(hmodbus->fEchoResponse && hmodbus->fMessageHandled) // if echo response need
ind = hmodbus->RS_Message_Size;
else
{
//------INFO ABOUT DATA/MESSAGE------
//-----------[first bytes]-----------
// set ID of message/user
modbus_uart_buff[ind++] = modbus_msg->MbAddr;
// set dat or err response
modbus_uart_buff[ind++] = modbus_msg->Func_Code;
if (modbus_msg->Func_Code < ERR_VALUES_START) // if no error occur
{
// set size of received data
if (modbus_msg->ByteCnt <= DATA_SIZE*2) // if ByteCnt less than DATA_SIZE
modbus_uart_buff[ind++] = modbus_msg->ByteCnt;
else // otherwise return data_size err
return RS_COLLECT_MSG_ERR;
//---------------DATA----------------
//-----------[data bytes]------------
uint16_t *tmp_data_addr = (uint16_t *)modbus_msg->DATA;
for(int i = 0; i < modbus_msg->ByteCnt; i++) // filling buffer with data
{ // set data
if (i%2 == 0) // HI byte
modbus_uart_buff[ind++] = (*tmp_data_addr)>>8;
else // LO byte
{
modbus_uart_buff[ind++] = *tmp_data_addr;
tmp_data_addr++;
}
}
}
else // if some error occur
{ // send expection code
modbus_uart_buff[ind++] = modbus_msg->Except_Code;
}
}
//---------------CRC----------------
//---------[last 16 bytes]----------
// calc crc of received data
uint16_t CRC_VALUE = crc16(modbus_uart_buff, ind);
// write crc to message structure and modbus-uart buffer
modbus_msg->MB_CRC = CRC_VALUE;
modbus_uart_buff[ind++] = CRC_VALUE;
modbus_uart_buff[ind++] = CRC_VALUE >> 8;
hmodbus->RS_Message_Size = ind;
return RS_OK; // returns ok
}
/**
* @brief Parse message from buffer to process it.
* @param hRS - указатель на хендлер RS.
* @param RS_msg - указатель на структуру сообщения.
* @param msg_uart_buff - указатель на буффер UART.
* @return RS_RES - статус о результате заполнения структуры.
* @note Заполнение структуры сообщения из буффера UART.
*/
RS_StatusTypeDef Parse_Message(RS_HandleTypeDef *hmodbus, RS_MsgTypeDef *modbus_msg, uint8_t *modbus_uart_buff)
{
uint32_t check_empty_buff;
int ind = 0; // ind for modbus-uart buffer
//-----INFO ABOUT DATA/MESSAGE-------
//-----------[first bits]------------
// get ID of message/user
modbus_msg->MbAddr = modbus_uart_buff[ind++];
if(modbus_msg->MbAddr != hmodbus->ID)
return RS_SKIP;
// get dat or err response
modbus_msg->Func_Code = modbus_uart_buff[ind++];
// get address from CMD
modbus_msg->Addr = modbus_uart_buff[ind++] << 8;
modbus_msg->Addr |= modbus_uart_buff[ind++];
// get address from CMD
modbus_msg->Qnt = modbus_uart_buff[ind++] << 8;
modbus_msg->Qnt |= modbus_uart_buff[ind++];
if(hmodbus->fRX_Half == 0) // if all message received
{
//---------------DATA----------------
// (optional)
if (modbus_msg->ByteCnt != 0)
{
ind++; // increment ind for data_size byte
//check that data size is correct
if (modbus_msg->ByteCnt > DATA_SIZE)
{
// hmodbus->MB_RESPONSE = MB_DATA_SIZE_ERR; // set func code - error data size more than maximumif yes, set func code - error about empty message
modbus_msg->Func_Code += ERR_VALUES_START;
return RS_PARSE_MSG_ERR;
}
uint16_t *tmp_data_addr = (uint16_t *)modbus_msg->DATA;
for(int i = 0; i < modbus_msg->ByteCnt; i++) // /2 because we transmit 8 bits, not 16 bits
{ // set data
if (i%2 == 0)
*tmp_data_addr = ((uint16_t)modbus_uart_buff[ind++] << 8);
else
{
*tmp_data_addr |= modbus_uart_buff[ind++];
tmp_data_addr++;
}
}
}
//---------------CRC----------------
//----------[last 16 bits]----------
// calc crc of received data
uint16_t CRC_VALUE = crc16(modbus_uart_buff, ind);
// get crc of received data
modbus_msg->MB_CRC = modbus_uart_buff[ind++];
modbus_msg->MB_CRC |= modbus_uart_buff[ind++] << 8;
// compare crc
if (modbus_msg->MB_CRC != CRC_VALUE)
modbus_msg->Func_Code += ERR_VALUES_START;
// hmodbus->MB_RESPONSE = MB_CRC_ERR; // set func code - error about wrong crc
// check is buffer empty
check_empty_buff = 0;
for(int i=0; i<ind;i++)
check_empty_buff += modbus_uart_buff[i];
// if(check_empty_buff == 0)
// hmodbus->MB_RESPONSE = MB_EMPTY_MSG; //
}
return RS_OK;
}
/**
* @brief Define size of RX Message that need to be received.
* @param hRS - указатель на хендлер RS.
* @param rx_data_size - указатель на переменную для записи кол-ва байт для принятия.
* @return RS_RES - статус о корректности рассчета кол-ва байт для принятия.
* @note Определение сколько байтов надо принять по протоколу.
*/
RS_StatusTypeDef RS_Define_Size_of_RX_Message(RS_HandleTypeDef *hmodbus, uint32_t *rx_data_size)
{
RS_StatusTypeDef MB_RES = 0;
MB_RES = Parse_Message(hmodbus, hmodbus->pMessagePtr, hmodbus->pBufferPtr);
if(MB_RES == RS_SKIP) // if message not for us
return MB_RES; // return
if ((hmodbus->pMessagePtr->Func_Code & ~ERR_VALUES_START) < 0x0F)
{
hmodbus->pMessagePtr->ByteCnt = 0;
*rx_data_size = 1;
}
else
{
hmodbus->pMessagePtr->ByteCnt = hmodbus->pBufferPtr[RX_FIRST_PART_SIZE-1]; // get numb of data in command
// +1 because that defines is size, not ind.
*rx_data_size = hmodbus->pMessagePtr->ByteCnt + 2;
}
hmodbus->RS_Message_Size = RX_FIRST_PART_SIZE + *rx_data_size; // size of whole message
return RS_OK;
}
//-----------------------------FOR USER------------------------------
//-------------------------------------------------------------------
//-------------------------------------------------------------------
//-------------------------HANDLERS FUNCTION-------------------------
#if (MODBUS_UART_NUMB == 1) // choose handler for UART
void USART1_IRQHandler(void)
#elif (MODBUS_UART_NUMB == 2)
void USART2_IRQHandler(void)
#elif (MODBUS_UART_NUMB == 3)
void USART3_IRQHandler(void)
#elif (MODBUS_UART_NUMB == 4)
void USART4_IRQHandler(void)
#elif (MODBUS_UART_NUMB == 5)
void USART5_IRQHandler(void)
#elif (MODBUS_UART_NUMB == 6)
void USART6_IRQHandler(void)
#endif
{
Trace_MB_UART_Enter();
RS_UART_Handler(&hmodbus1);
Trace_MB_UART_Exit();
}
#if (MODBUS_TIM_NUMB == 1) || (MODBUS_TIM_NUMB == 10) // choose handler for TIM
void TIM1_UP_TIM10_IRQHandler(void)
#elif (MODBUS_TIM_NUMB == 2)
void TIM2_IRQHandler(void)
#elif (MODBUS_TIM_NUMB == 3)
void TIM3_IRQHandler(void)
#elif (MODBUS_TIM_NUMB == 4)
void TIM4_IRQHandler(void)
#elif (MODBUS_TIM_NUMB == 5)
void TIM5_IRQHandler(void)
#elif (MODBUS_TIM_NUMB == 6)
void TIM6_DAC_IRQHandler(void)
#elif (MODBUS_TIM_NUMB == 7)
void TIM7_IRQHandler(void)
#elif (MODBUS_TIM_NUMB == 8) || (MODBUS_TIM_NUMB == 13)
void TIM8_UP_TIM13_IRQHandler(void)
#elif (MODBUS_TIM_NUMB == 1) || (MODBUS_TIM_NUMB == 9)
void TIM1_BRK_TIM9_IRQHandler(void)
#elif (MODBUS_TIM_NUMB == 1) || (MODBUS_TIM_NUMB == 11)
void TIM1_TRG_COM_TIM11_IRQHandler(void)
#elif (MODBUS_TIM_NUMB == 8) || (MODBUS_TIM_NUMB == 12)
void TIM8_BRK_TIM12_IRQHandler(void)
#elif (MODBUS_TIM_NUMB == 8) || (MODBUS_TIM_NUMB == 14)
void TIM8_TRG_COM_TIM14_IRQHandler(void)
#endif
{
Trace_MB_TIM_Enter();
RS_TIM_Handler(&hmodbus1);
Trace_MB_TIM_Exit();
}
//-------------------------HANDLERS FUNCTION-------------------------
//-------------------------------------------------------------------

418
Code/Modbus/modbus.h
View File

@ -1,418 +0,0 @@
/********************************MODBUS*************************************
Данный файл содержит объявления базовых функции и дефайны для реализации
MODBUS.
Данный файл необходимо подключить в rs_message.h. После подключать rs_message.h
к основному проекту.
***************************************************************************/
#ifndef __MODBUS_H_
#define __MODBUS_H_
#include "stm32f4xx_hal.h"
#include "modbus_data.h"
#include "settings.h" // for modbus settings
/////////////////////////////////////////////////////////////////////
//////////////////////////---SETTINGS---/////////////////////////////
////----------DEFINES FOR MODBUS SETTING--------------
//#define MODBUS_UART_NUMB 3 // number of used uart
//#define MODBUS_SPEED 115200
//#define MODBUS_GPIOX GPIOB
//#define MODBUS_GPIO_PIN_RX GPIO_PIN_11
//#define MODBUS_GPIO_PIN_TX GPIO_PIN_10
///* accord to this define sets define USED_MB_UART = USARTx */
//#define MODBUS_TIM_NUMB 7 // number of used uart
//#define MODBUS_TIM_AHB_FREQ 72
///* accord to this define sets define USED_MB_TIM = TIMx */
///* defines for modbus behaviour */
//#define MODBUS_DEVICE_ID 1 // number of used uart
//#define MODBUS_MAX_TIMEOUT 5000 // is ms
//// custom define for size of receive message
////--------------------------------------------------
//---------------MODBUS DEVICE DATA-----------------
/* EXTERN REGISTERS/COILS */
extern uint16_t sine_log[R_SINE_LOG_QNT]; // start from 0x0000
extern uint16_t pwm_log[R_PWM_LOG_QNT]; // start from 500 (0x1F4)
extern uint16_t cnt_log[R_CNT_LOG_QNT]; // start from 100 (0x3E8)
extern uint16_t time_log[R_TIME_LOG_QNT]; // start from 1500 (0x5DC)
extern uint16_t pwm_ctrl[R_PWM_CTRL_QNT]; // start from 2000 (0x7D0)
extern uint16_t log_ctrl[R_LOG_CTRL_QNT]; // start from 2008 (0x7D0)
extern uint16_t uart_ctrl[R_UART_CTRL_QNT];
extern uint16_t coils_regs[C_CTRL_COILS_QNT]; // start from 0x0001 (16th bit)
//--------------------------------------------------
//////////////////////////---SETTINGS---/////////////////////////////
/////////////////////////////////////////////////////////////////////
/////////////////////---USER MESSAGE DEFINES---//////////////////////
//-------------DEFINES FOR STRUCTURE----------------
/* defines for structure of modbus message */
#define MbAddr_SIZE 1 // size of (MbAddr)
#define Func_Code_SIZE 1 // size of (Func_Code)
#define Addr_SIZE 2 // size of (Addr)
#define Qnt_SIZE 2 // size of (Qnt)
#define ByteCnt_SIZE 1 // size of (ByteCnt)
#define DATA_SIZE 125 // maximum number of data: DWORD (NOT MESSAGE SIZE)
#define CRC_SIZE 2 // size of (MB_CRC) in bytes
/* size of info */
#define INFO_SIZE_MAX (MbAddr_SIZE+Func_Code_SIZE+Addr_SIZE+Qnt_SIZE+ByteCnt_SIZE)
/* size of first part of message that will be received
first receive info part of message, than defines size of rest message*/
#define RX_FIRST_PART_SIZE INFO_SIZE_MAX
/* size of buffer: max size of whole message */
#define MSG_SIZE_MAX (INFO_SIZE_MAX + DATA_SIZE*2 + CRC_SIZE) // max possible size of message
/* Structure for modbus exception codes */
typedef enum //MB_ExceptionTypeDef
{
// reading
NO_ERRORS = 0x00, // no errors
ILLEGAL_FUNCTION = 0x01, // function cannot be processed
ILLEGAL_DATA_ADDRESS = 0x02, // data at this address is not available
ILLEGAL_DATA_VALUE = 0x03, // uncorrect data value (quantity too big and cannot be returned or value for coil is incorrect)
SLAVE_DEVICE_FAILURE = 0x04, // idk
ACKNOWLEDGE = 0x05, // idk
SLAVE_DEVICE_BUSY = 0x06, // idk
MEMORY_PARITY_ERROR = 0x08, // idk
}MB_ExceptionTypeDef;
/* Structure for modbus func codes */
typedef enum //MB_FunctonTypeDef
{
// reading
MB_R_COILS = 0x01,
MB_R_DISC_IN = 0x02,
MB_R_IN_REGS = 0x03,
MB_R_HOLD_REGS = 0x04,
// writting
MB_W_COIL = 0x05,
MB_W_IN_REG = 0x06,
MB_W_COILS = 0x0F,
MB_W_IN_REGS = 0x10,
}MB_FunctonTypeDef;
#define ERR_VALUES_START 0x80U // from this value starts error func codes
/* Structure for modbus messsage */
typedef struct // RS_MsgTypeDef
{
uint8_t MbAddr;
MB_FunctonTypeDef Func_Code;
uint16_t Addr;
uint16_t Qnt;
uint8_t ByteCnt;
uint16_t DATA[DATA_SIZE];
MB_ExceptionTypeDef Except_Code;
uint16_t MB_CRC;
}RS_MsgTypeDef;
//--------------------------------------------------
/////////////////////---USER MESSAGE DEFINES---//////////////////////
/////////////////////////////////////////////////////////////////////
/////////////////////---GENERAL MODBUS STUFF---//////////////////////
/* Structure for coils operation */
typedef enum
{
// READ_COIL,
SET_COIL,
RESET_COIL,
TOOGLE_COIL,
}MB_CoilsOpTypeDef;
//------------DEFINES FOR PROCESS DATA--------------
/**
* @brief Calc dividing including remainder
* @param _val_ - делимое.
* @param _div_ - делитель.
* @note Если результат деления без остатка: он возвращается как есть
Если с остатком - округляется вверх
*/
//#define Divide_Up(_val_, _div_) (((_val_)%(_div_))? (_val_)/(_div_)+1 : (_val_)/_div_) /* через тернарный оператор */
#define Divide_Up(_val_, _div_) ((_val_ - 1) / _div_) + 1 /* через мат выражение */
/**
* @brief Swap between Little Endian and Big Endian
* @param v - Переменная для свапа.
* @return v (new) - Свапнутая переменная.
* @note Переключения между двумя типами хранения слова: HI-LO байты и LO-HI байты.
*/
#define ByteSwap16(v) (((v&0xFF00) >> (8)) | ((v&0x00FF) << (8)))
//--------------------------------------------------
//-----------DEFINES FOR ACCESS TO DATA-------------
/**
* @brief Macros to set pointer to 16-bit array
* @param _arr_ - массив слов (16-бит).
*/
#define MB_Set_Arr16_Ptr(_arr_) ((uint16_t*)(&(_arr_)))
/**
* @brief Macros to set pointer to register
* @param _parr_ - массив регистров.
* @param _addr_ - Номер регистра (его индекс) от начала массива _arr_.
*/
#define MB_Set_Register_Ptr(_parr_, _addr_) ((uint16_t *)(_parr_)+(_addr_))
/**
* @brief Macros to set pointer to a certain register that contains certain coil
* @param _parr_ - массив коилов.
* @param _coil_ - Номер коила от начала массива _arr_.
* @note Пояснение выражений
* (_coil_/16) - get index (address shift) of register that contain certain coil
* (16*(_coil_/16) - how many coils we need to skip. e.g. (16*30/16) - skip 16 coils from first register
* _coil_-(16*(_coil_/16)) - shift to certain coil in certain register
* e.g. Coil(30) gets in register[1] (30/16 = 1) coil №14 (30 - (16*30/16) = 30 - 16 = 14)
*
* Visual explanation:
* xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxCx
* |register[0]----| |register[1]----|
* |skip this------| |get this-------|
* |shift to 14 bit|
*/
#define MB_Set_Coil_Reg_Ptr(_parr_, _coil_) ((uint16_t *)(_parr_)+((_coil_)/16))
#define MB_Set_Coil_Mask(_coil_) (1 << ( _coil_ - (16*((_coil_)/16)) ))
/**
* @brief Read Coil at its local address.
* @param _parr_ - массив коилов.
* @param _coil_ - Номер коила от начала массива _arr_.
* @return uint16_t - Возвращает весь регистр с маской на запрошенном коиле.
*
* @note Позволяет обратиться к коилу по адресу относительно _arr_.
*/
#define MB_Read_Coil_Local(_parr_, _coil_) (( *MB_Set_Coil_Reg_Ptr(_parr_, _coil_) & MB_Set_Coil_Mask(_coil_) ) >> _coil_)
/**
* @brief Set Coil at its local address.
* @param _parr_ - указатель на массив коилов.
* @param _coil_ - Номер коила от начала массива _arr_.
*
* @note Позволяет обратиться к коилу по адресу относительно _arr_.
*/
#define MB_Set_Coil_Local(_parr_, _coil_) *MB_Set_Coil_Reg_Ptr(_parr_, _coil_) |= MB_Set_Coil_Mask(_coil_)
/**
* @brief Reset Coil at its local address.
* @param _parr_ - указатель на массив коилов.
* @param _coil_ - Номер коила от начала массива _arr_.
*
* @note Позволяет обратиться к коилу по адресу относительно _arr_.
*/
#define MB_Reset_Coil_Local(_parr_, _coil_) *MB_Set_Coil_Reg_Ptr(_parr_, _coil_) &= ~(MB_Set_Coil_Mask(_coil_))
/**
* @brief Set Coil at its local address.
* @param _parr_ - указатель на массив коилов.
* @param _coil_ - Номер коила от начала массива _arr_.
*
* @note Позволяет обратиться к коилу по адресу относительно _arr_.
*/
#define MB_Toogle_Coil_Local(_parr_, _coil_) *MB_Set_Coil_Reg_Ptr(_parr_, _coil_) ^= MB_Set_Coil_Mask(_coil_)
//--------------------------------------------------
//------------------OTHER DEFINES-------------------
// create hadnles and settings for uart, tim, rs with _modbus_ name
#define CONCAT(a,b) a##b
#define Create_MODBUS_Handles(_modbus_) \
UART_SettingsTypeDef CONCAT(_modbus_, _suart); \
UART_HandleTypeDef CONCAT(_modbus_, _huart); \
TIM_SettingsTypeDef CONCAT(_modbus_, _stim); \
TIM_HandleTypeDef CONCAT(_modbus_, _htim); \
RS_HandleTypeDef CONCAT(h, _modbus_)
//--------------------------------------------------
///////////////////---MODBUS & MESSAGE DEFINES---////////////////////
/////////////////////////////////////////////////////////////////////
////////////////////---FUNCTIONS FOR USER---/////////////////////////
/**
* @brief First set up of MODBUS.
* @note Первый инит модбас. Заполняет структуры и инициализирует таймер и юарт для общения по модбас.
* Скважность ШИМ меняется по закону синусоиды, каждый канал генерирует свой полупериод синуса (от -1 до 0 И от 0 до 1)
* ШИМ генерируется на одном канале.
* @note This called from main
*/
void MODBUS_FirstInit(void);
/**
* @brief Set or Reset Coil at its global address.
* @param Addr - адрес коила.
* @param WriteVal - Что записать в коил: 0 или 1.
* @return ExceptionCode - Код исключения если коила по адресу не существует, и NO_ERRORS если все ок.
*
* @note Позволяет обратиться к любому коилу по его глобальному адрессу.
Вне зависимости от того как коилы размещены в памяти.
*/
MB_ExceptionTypeDef MB_Write_Coil_Global(uint16_t Addr, MB_CoilsOpTypeDef WriteVal);
/**
* @brief Read Coil at its global address.
* @param Addr - адрес коила.
* @param Exception - Указатель на переменную для кода исключения, в случа неудачи при чтении.
* @return uint16_t - Возвращает весь регистр с маской на запрошенном коиле.
*
* @note Позволяет обратиться к любому коилу по его глобальному адрессу.
Вне зависимости от того как коилы размещены в памяти.
*/
uint16_t MB_Read_Coil_Global(uint16_t Addr, MB_ExceptionTypeDef *Exception);
////////////////////---FUNCTIONS FOR USER---/////////////////////////
/////////////////////////////////////////////////////////////////////
/////////////---PROCESS MODBUS COMMAND FUNCTIONS---//////////////////
/**
* @brief Check is address valid for certain array.
* @param Addr - начальный адресс.
* @param Qnt - количество запрашиваемых элементов.
* @param R_ARR_ADDR - начальный адресс массива R_ARR.
* @param R_ARR_NUMB - количество элементов в массиве R_ARR.
* @return ExceptionCode - ILLEGAL DATA ADRESS если адресс недействителен, и NO_ERRORS если все ок.
*
* @note Позволяет определить, брать ли данные по адрессу Addr из массива R_ARR.
* Если адресс Addr находится в диапазоне адрессов массива R_ARR, то возвращаем NO_ERROR.
* Если адресс Addr находится за пределами адрессов массива R_ARR - ILLEGAL_DATA_ADDRESSю.
*/
MB_ExceptionTypeDef MB_Check_Address_For_Arr(uint16_t Addr, uint16_t Qnt, uint16_t R_ARR_ADDR, uint16_t R_ARR_NUMB);
/**
* @brief Define Address Origin for Input/Holding Registers
* @param pRegs - указатель на указатель регистров.
* @param Addr - адрес начального регистра.
* @param Qnt - количество запрашиваемых регистров.
* @param WriteFlag - флаг регистр нужны для чтения или записи.
* @return ExceptionCode - Код исключения если есть, и NO_ERRORS если нет.
*
* @note Определение адреса начального регистра.
* @note WriteFlag пока не используется.
*/
MB_ExceptionTypeDef MB_DefineRegistersAddress(uint16_t **pRegs, uint16_t Addr, uint16_t Qnt, uint8_t WriteFlag);
/**
* @brief Define Address Origin for coils
* @param pCoils - указатель на указатель коилов.
* @param Addr - адресс начального коила.
* @param Qnt - количество запрашиваемых коилов.
* @param start_shift - указатель на переменную содержащую сдвиг внутри регистра для начального коила.
* @param WriteFlag - флаг коилы нужны для чтения или записи.
* @return ExceptionCode - Код исключения если есть, и NO_ERRORS если нет.
*
* @note Определение адреса начального регистра запрашиваемых коилов.
* @note WriteFlag используется для определния регистров GPIO: ODR или IDR.
*/
MB_ExceptionTypeDef MB_DefineCoilsAddress(uint16_t **pCoils, uint16_t Addr, uint16_t Qnt, uint16_t *start_shift, uint8_t WriteFlag);
/**
* @brief Proccess command Read Coils (01 - 0x01).
* @param modbus_msg - указатель на структуру собщения modbus.
* @return fMessageHandled - статус о результате обработки комманды.
* @note Обработка команды Read Coils.
*/
uint8_t MB_Read_Coils(RS_MsgTypeDef *modbus_msg);
/**
* @brief Proccess command Read Holding Registers (03 - 0x03).
* @param modbus_msg - указатель на структуру собщения modbus.
* @return fMessageHandled - статус о результате обработки комманды.
* @note Обработка команды Read Holding Registers.
*/
uint8_t MB_Read_Hold_Regs(RS_MsgTypeDef *modbus_msg);
/**
* @brief Proccess command Write Single Coils (05 - 0x05).
* @param modbus_msg - указатель на структуру собщения modbus.
* @return fMessageHandled - статус о результате обработки комманды.
* @note Обработка команды Write Single Coils.
*/
uint8_t MB_Write_Single_Coil(RS_MsgTypeDef *modbus_msg);
/**
* @brief Proccess command Write Multiple Coils (15 - 0x0F).
* @param modbus_msg - указатель на структуру собщения modbus.
* @return fMessageHandled - статус о результате обработки комманды.
* @note Обработка команды Write Multiple Coils.
*/
uint8_t MB_Write_Miltuple_Coils(RS_MsgTypeDef *modbus_msg);
/**
* @brief Proccess command Write Multiple Register (16 - 0x10).
* @param modbus_msg - указатель на структуру собщения modbus.
* @return fMessageHandled - статус о результате обработки комманды.
* @note Обработка команды Write Multiple Register.
*/
uint8_t MB_Write_Miltuple_Regs(RS_MsgTypeDef *modbus_msg);
/////////////---PROCESS MODBUS COMMAND FUNCTIONS---//////////////////
/////////////////////////////////////////////////////////////////////
/////////////////////////---CALC DEFINES---//////////////////////////
/* set USART_TypeDef for choosen numb of usart */
#if (MODBUS_UART_NUMB == 1)
#define USED_MODBUS_UART USART1
#define USE_USART1
#elif (MODBUS_UART_NUMB == 2)
#define USED_MODBUS_UART USART2
#define USE_USART2
#elif (MODBUS_UART_NUMB == 3)
#define USED_MODBUS_UART USART3
#define USE_USART3
#elif (MODBUS_UART_NUMB == 4)
#define USED_MODBUS_UART UART4
#define USE_UART4
#elif (MODBUS_UART_NUMB == 5)
#define USED_MODBUS_UART UART5
#define USE_UART6
#elif (MODBUS_UART_NUMB == 6)
#define USED_MODBUS_UART USART6
#define USE_USART6
#endif
#if (MODBUS_TIM_NUMB == 1)
#define USED_MODBUS_TIM TIM1
#define USE_TIM1
#elif (MODBUS_TIM_NUMB == 2)
#define USED_MODBUS_TIM TIM2
#define USE_TIM2
#elif (MODBUS_TIM_NUMB == 3)
#define USED_MODBUS_TIM TIM3
#define USE_TIM3
#elif (MODBUS_TIM_NUMB == 4)
#define USED_MODBUS_TIM TIM4
#define USE_TIM4
#elif (MODBUS_TIM_NUMB == 5)
#define USED_MODBUS_TIM TIM5
#define USE_TIM5
#elif (MODBUS_TIM_NUMB == 6)
#define USED_MODBUS_TIM TIM6
#define USE_TIM6
#elif (MODBUS_TIM_NUMB == 7)
#define USED_MODBUS_TIM TIM7
#define USE_TIM7
#elif (MODBUS_TIM_NUMB == 8)
#define USED_MODBUS_TIM TIM8
#define USE_TIM8
#elif (MODBUS_TIM_NUMB == 9)
#define USED_MODBUS_TIM TIM9
#define USE_TIM9
#elif (MODBUS_TIM_NUMB == 10)
#define USED_MODBUS_TIM TIM10
#define USE_TIM10
#elif (MODBUS_TIM_NUMB == 11)
#define USED_MODBUS_TIM TIM11
#define USE_TIM11
#elif (MODBUS_TIM_NUMB == 12)
#define USED_MODBUS_TIM TIM12
#define USE_TIM12
#elif (MODBUS_TIM_NUMB == 13)
#define USED_MODBUS_TIM TIM13
#define USE_TIM13
#elif (MODBUS_TIM_NUMB == 14)
#define USED_MODBUS_TIM TIM14
#define USE_TIM14
#endif
#endif //__MODBUS_H_

71
Code/Modbus/modbus_data.h
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@ -1,71 +0,0 @@
//-----------MODBUS DEVICE DATA SETTING-------------
//--------------DEFINES FOR REGISTERS---------------
// DEFINES FOR ARRAYS
#define LOG_SIZE 500
#define R_SINE_LOG_ADDR 0
#define R_SINE_LOG_QNT LOG_SIZE
#define R_PWM_LOG_ADDR 500
#define R_PWM_LOG_QNT LOG_SIZE
#define R_CNT_LOG_ADDR 1000
#define R_CNT_LOG_QNT LOG_SIZE
#define R_TIME_LOG_ADDR 1500
#define R_TIME_LOG_QNT LOG_SIZE
#define R_SETTINGS_START_ADDR 20000
#define R_PWM_CTRL_ADDR R_SETTINGS_START_ADDR
#define R_PWM_CTRL_QNT 8
#define R_LOG_CTRL_ADDR (R_SETTINGS_START_ADDR+8)
#define R_LOG_CTRL_QNT 8
#define R_UART_CTRL_ADDR R_SETTINGS_START_ADDR+16
#define R_UART_CTRL_QNT 8
// DEFINES FOR REGISTERS
#define R_PWM_CTRL_PWM_VALUE 0 // PWM value: sin freq OR pwm duty
#define R_PWM_CTRL_PWM_HZ 1 // frequency of PWM Timer
#define R_PWM_CTRL_MIN_PULSE_DUR 2 // duration of shortest pulse in sine PWM
#define R_PWM_CTRL_DEAD_TIME 3 // duration between between switches half waves (channels)
#define R_PWM_CTRL_SIN_TABLE_SIZE 4 // size of sinus table
#define R_LOG_CTRL_LOG_SIZE 0 // size of number elements in log
#define R_LOG_CTRL_LOG_PWM_NUMB 1 // number of PWM periods in log
#define R_LOG_CTRL_LOG_HZ 2 // frequency of log Timer
#define R_UART_CTRL_SPEED 0 // sin frequency
//----------------DEFINES FOR COILS-----------------
// DEFINES FOR ARRAYS
#define C_GPIOD_ADDR 0
#define C_GPIOD_QNT 16 // minimum 16
#define C_CTRL_COILS_ADDR 0x10
#define C_CTRL_COILS_QNT 160 // minimum 16
// DEFINES FOR COILS
#define COIL_GPIOD_LED1 12
#define COIL_GPIOD_LED2 13
#define COIL_GPIOD_LED3 14
#define COIL_GPIOD_LED4 15
#define COIL_GPIOD_LED1_GLOBAL (C_GPIOD_ADDR+COIL_GPIOD_LED1)
#define COIL_GPIOD_LED2_GLOBAL (C_GPIOD_ADDR+COIL_GPIOD_LED2)
#define COIL_GPIOD_LED3_GLOBAL (C_GPIOD_ADDR+COIL_GPIOD_LED3)
#define COIL_GPIOD_LED4_GLOBAL (C_GPIOD_ADDR+COIL_GPIOD_LED4)
#define COIL_UART_CTRL (0)
#define COIL_UART_CTRL_GLOBAL (C_CTRL_COILS_ADDR+COIL_UART_CTRL)
#define COIL_PWM_DC_MODE (1)
#define COIL_PWM_DC_MODE_GLOBAL (C_CTRL_COILS_ADDR+COIL_PWM_DC_MODE)
#define COIL_PWM_CH_MODE (2)
#define COIL_PWM_CH_MODE_GLOBAL (C_CTRL_COILS_ADDR+COIL_PWM_CH_MODE)
#define COIL_PWM_PHASE_MODE (3)
#define COIL_PWM_PHASE_MODE_GLOBAL (C_CTRL_COILS_ADDR+COIL_PWM_PHASE_MODE)

502
Code/Modbus/rs_message.c
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@ -1,502 +0,0 @@
/**********************************RS***************************************
Данный файл содержит базовые функции для реализации протоколов по RS/UART.
//-------------------Функции-------------------//
@func users
- Parse_Message/Collect_Message Заполнение структуры сообщения и буфера
- RS_Response Ответ на сообщение
- RS_Define_Size_of_RX_Message Определение размера принимаемых данных
@func general
- RS_Receive_IT Ожидание комманды и ответ на неё
- RS_Transmit_IT Отправление комманды и ожидание ответа
- RS_Init Инициализация переферии и структуры для RS
- RS_ReInit_UART Реинициализация UART для RS
- RS_Abort Отмена приема/передачи по ЮАРТ
- RS_Init Инициализация периферии и modbus handler
@func callback/handler
- RS_Handle_Receive_Start Функция для запуска приема или остановки RS
- RS_Handle_Transmit_Start Функция для запуска передачи или остановки RS
- RS_UART_RxCpltCallback Коллбек при окончании приема или передачи
RS_UART_TxCpltCallback
- RS_UART_Handler Обработчик прерывания для UART
- RS_TIM_Handler Обработчик прерывания для TIM
@func uart initialize (это было в отдельных файлах, мб надо обратно разнести)
- UART_Base_Init Инициализация UART для RS
- RS_UART_GPIO_Init Инициализация GPIO для RS
- UART_DMA_Init Инициализация DMA для RS
- UART_MspInit Аналог HAL_MspInit для RS
- UART_MspDeInit Аналог HAL_MspDeInit для RS
//-------------------Общее--------------------//
@note Для настройки RS/UART под нужный протокол, необходимо:
- Определить структуру сообщения RS_MsgTypeDef и
дефайны RX_FIRST_PART_SIZE и MSG_SIZE_MAX.
- Подключить этот файл в раздел USER SETTINGS rs_message.h.
- Определить функции для обработки сообщения @func users.
- Добавить UART/TIM Handler в Хендлер используемых UART/TIM.
***************************************************************************/
#include "rs_message.h"
uint8_t RS_Buffer[MSG_SIZE_MAX]; // uart buffer
//-------------------------------------------------------------------
//-------------------------GENERAL FUNCTIONS-------------------------
/**
* @brief Start receive IT.
* @param hRS - указатель на хендлер RS.
* @param RS_msg - указатель на структуру сообщения.
* @return RS_RES - статус о состоянии RS после инициализации приема.
*/
RS_StatusTypeDef RS_Receive_IT(RS_HandleTypeDef *hRS, RS_MsgTypeDef *RS_msg)
{
RS_StatusTypeDef RS_RES = 0;
HAL_StatusTypeDef uart_res = 0;
//-------------CHECK RS LINE----------------
// check that receive isnt busy
if( RS_Is_RX_Busy(hRS) ) // if tx busy - return busy status
return RS_BUSY;
//-----------INITIALIZE RECEIVE-------------
// if all OK: start receiving
RS_Set_Busy(hRS); // set RS busy
RS_Set_RX_Flags(hRS); // initialize flags for receive
hRS->pMessagePtr = RS_msg; // set pointer to message structire for filling it from UARTHandler fucntions
// start receiving
uart_res = HAL_UART_Receive_IT(hRS->huart, hRS->pBufferPtr, RX_FIRST_PART_SIZE); // receive until ByteCnt+1 byte,
// then in Callback restart receive for rest bytes
// if receive isnt started - abort RS
if(uart_res != HAL_OK)
{
RS_RES = RS_Abort(hRS, ABORT_RS);
}
else
RS_RES = RS_OK;
hRS->RS_STATUS = RS_RES;
return RS_RES; // returns result of receive init
}
/**
* @brief Start transmit IT.
* @param hRS - указатель на хендлер RS.
* @param RS_msg - указатель на структуру сообщения.
* @return RS_RES - статус о состоянии RS после инициализации передачи.
*/
RS_StatusTypeDef RS_Transmit_IT(RS_HandleTypeDef *hRS, RS_MsgTypeDef *RS_msg)
{
RS_StatusTypeDef RS_RES = 0;
HAL_StatusTypeDef uart_res = 0;
//-------------CHECK RS LINE----------------
// check that transmit isnt busy
if( RS_Is_TX_Busy(hRS) ) // if tx busy - return busy status
return RS_BUSY;
// check receive line
//------------COLLECT MESSAGE---------------
RS_RES = Collect_Message(hRS, RS_msg, hRS->pBufferPtr);
if (RS_RES != RS_OK) // if message isnt collect - stop RS and return error in RS_RES
{// need collect message status, so doesnt write abort to RS_RES
RS_Abort(hRS, ABORT_RS);
RS_Handle_Receive_Start(hRS, hRS->pMessagePtr); // restart receive
}
else // if collect successful
{
//----------INITIALIZE TRANSMIT-------------
RS_Set_Busy(hRS); // set RS busy
RS_Set_TX_Flags(hRS); // initialize flags for transmit IT
hRS->pMessagePtr = RS_msg; // set pointer for filling given structure from UARTHandler fucntion
// if all OK: start transmitting
uart_res = HAL_UART_Transmit_IT(hRS->huart, hRS->pBufferPtr, hRS->RS_Message_Size);
// if transmit isnt started - abort RS
if(uart_res != HAL_OK)
{
RS_RES = RS_Abort(hRS, ABORT_RS);
}
else
RS_RES = RS_OK;
}
hRS->RS_STATUS = RS_RES;
return RS_RES; // returns result of transmit init
}
/**
* @brief Initialize UART and handle RS stucture.
* @param hRS - указатель на хендлер RS.
* @param suart - указатель на структуру с настройками UART.
* @param stim - указатель на структуру с настройками таймера.
* @param pRS_BufferPtr - указатель на буффер для приема-передачи по UART. Если он NULL, то поставиться библиотечный буфер.
* @return RS_RES - статус о состоянии RS после инициализации.
* @note Инициализация перефирии и структуры для приема-передачи по RS.
*/
RS_StatusTypeDef RS_Init(RS_HandleTypeDef *hRS, UART_SettingsTypeDef *suart, TIM_SettingsTypeDef *stim, uint8_t *pRS_BufferPtr)
{
// check that hRS is defined
if (hRS == NULL)
return RS_ERR;
// check that huart is defined
if ((suart->huart.Instance == NULL) || (suart->huart.Init.BaudRate == NULL))
return RS_ERR;
// init uart
UART_Base_Init(suart);
hRS->huart = &suart->huart;
// check that timeout in interrupt needed
if (hRS->sRS_Timeout)
{
if (stim->htim.Instance == NULL) // check is timer defined
return RS_ERR;
// calc frequency corresponding to timeout and tims 1ms tickbase
stim->sTickBaseMHz = TIM_TickBase_1MS;
stim->htim.Init.Period = hRS->sRS_Timeout;
TIM_Base_Init(stim);
hRS->htim = &stim->htim;
}
if (hRS->sRS_RX_Size_Mode == NULL)
return RS_ERR;
// check that buffer is defined
if (hRS->pBufferPtr == NULL)
{
hRS->pBufferPtr = RS_Buffer; // if no - set default
}
else
hRS->pBufferPtr = pRS_BufferPtr; // if yes - set by user
return RS_OK;
}
/**
* @brief ReInitialize UART and RS receive.
* @param hRS - указатель на хендлер RS.
* @param suart - указатель на структуру с настройками UART.
* @return RS_RES - статус о состоянии RS после инициализации.
* @note Реинициализация UART и приема по RS.
*/
HAL_StatusTypeDef RS_ReInit_UART(RS_HandleTypeDef *hRS, UART_SettingsTypeDef *suart)
{
HAL_StatusTypeDef RS_RES;
hRS->fReInit_UART = 0;
// check is settings are valid
if(Check_UART_Init_Struct(suart) != HAL_OK)
return HAL_ERROR;
RS_Abort(hRS, ABORT_RS);
UART_MspDeInit(&suart->huart);
RS_RES = UART_Base_Init(suart);
RS_Receive_IT(hRS, hRS->pMessagePtr);
return RS_RES;
}
/**
* @brief Abort RS/UART.
* @param hRS - указатель на хендлер RS.
* @param AbortMode - выбор, что надо отменить.
- ABORT_TX: Отмена передачи по ЮАРТ, с очищением флагов TX,
- ABORT_RX: Отмена приема по ЮАРТ, с очищением флагов RX,
- ABORT_RX_TX: Отмена приема и передачи по ЮАРТ,
- ABORT_RS: Отмена приема-передачи RS, с очищением всей структуры.
* @return RS_RES - статус о состоянии RS после аборта.
* @note Отмена работы UART в целом или отмена приема/передачи RS.
Также очищается хендл hRS.
*/
RS_StatusTypeDef RS_Abort(RS_HandleTypeDef *hRS, RS_AbortTypeDef AbortMode)
{
HAL_StatusTypeDef uart_res = 0;
hRS->htim->Instance->CNT = 0;
__HAL_TIM_CLEAR_IT(hRS->htim, TIM_IT_UPDATE);
if(hRS->sRS_Timeout) // if timeout setted
HAL_TIM_Base_Stop_IT(hRS->htim); // stop timeout
if((AbortMode&ABORT_RS) == 0x00)
{
if((AbortMode&ABORT_RX) == ABORT_RX)
{
uart_res = HAL_UART_AbortReceive(hRS->huart); // abort receive
RS_Reset_RX_Flags(hRS);
}
if((AbortMode&ABORT_TX) == ABORT_TX)
{
uart_res = HAL_UART_AbortTransmit(hRS->huart); // abort transmit
RS_Reset_TX_Flags(hRS);
}
}
else
{
uart_res = HAL_UART_Abort(hRS->huart);
RS_Clear_All(hRS);
}
hRS->RS_STATUS = RS_ABORTED;
return RS_ABORTED;
}
//-------------------------GENERAL FUNCTIONS-------------------------
//-------------------------------------------------------------------
//-------------------------------------------------------------------
//--------------------CALLBACK/HANDLER FUNCTIONS---------------------
/**
* @brief Handle for starting receive.
* @param hRS - указатель на хендлер RS.
* @param RS_msg - указатель на структуру сообщения.
* @return RS_RES - статус о состоянии RS после инициализации приема или окончания общения.
* @note Определяет начинать прием команды/ответа или нет.
*/
RS_StatusTypeDef RS_Handle_Receive_Start(RS_HandleTypeDef *hRS, RS_MsgTypeDef *RS_msg)
{
RS_StatusTypeDef RS_RES = 0;
switch(hRS->sRS_Mode)
{
case SLAVE_ALWAYS_WAIT: // in slave mode with permanent waiting
RS_RES = RS_Receive_IT(hRS, RS_msg); break; // start receiving again
case SLAVE_TIMEOUT_WAIT: // in slave mode with timeout waiting (start receiving cmd by request)
RS_Set_Free(hRS); RS_RES = RS_OK; break; // end RS communication (set RS unbusy)
}
return RS_RES;
}
/**
* @brief Handle for starting transmit.
* @param hRS - указатель на хендлер RS.
* @param RS_msg - указатель на структуру сообщения.
* @return RS_RES - статус о состоянии RS после инициализации передачи.
* @note Определяет отвечать ли на команду или нет.
*/
RS_StatusTypeDef RS_Handle_Transmit_Start(RS_HandleTypeDef *hRS, RS_MsgTypeDef *RS_msg)
{
RS_StatusTypeDef RS_RES = 0;
switch(hRS->sRS_Mode)
{
case SLAVE_ALWAYS_WAIT: // in slave mode always response
case SLAVE_TIMEOUT_WAIT: // transmit response
RS_RES = RS_Transmit_IT(hRS, RS_msg); break;
}
return RS_RES;
}
/**
* @brief UART RX Callback: define behaviour after receiving parts of message.
* @param hRS - указатель на хендлер RS.
* @return RS_RES - статус о состоянии RS после обработки приема.
* @note Контролирует прием сообщения: определяет размер принимаемой посылки и обрабатывает его.
*/
RS_StatusTypeDef RS_UART_RxCpltCallback(RS_HandleTypeDef *hRS)
{
RS_StatusTypeDef RS_RES = 0;
HAL_StatusTypeDef uart_res = 0;
// if we had received bytes before ByteCnt
if((hRS->sRS_RX_Size_Mode == RS_RX_Size_NotConst) && (hRS->fRX_Half == 0)) // if data size isnt constant and its first half, and
{ // First receive part of message, then define size of rest of message, and start receive it
hRS->fRX_Half = 1;
//---------------FIND DATA SIZE-----------------
uint32_t NuRS_of_Rest_Bytes = 0;
RS_RES = RS_Define_Size_of_RX_Message(hRS, &NuRS_of_Rest_Bytes);
// if there is no bytes to receive OR we need to skip this message - restart receive
if ((NuRS_of_Rest_Bytes == 0) || (RS_RES == RS_SKIP))
{
RS_Abort(hRS, ABORT_RX);
RS_RES = RS_Handle_Receive_Start(hRS, hRS->pMessagePtr);
return RS_RES;
}
//-------------START UART RECEIVE---------------
uart_res = HAL_UART_Receive_IT(hRS->huart, (hRS->pBufferPtr + RX_FIRST_PART_SIZE), NuRS_of_Rest_Bytes);
if(uart_res != HAL_OK)
{// need uart status, so doesnt write abort to RS_RES
RS_RES = RS_Abort(hRS, ABORT_RS);
}
else
RS_RES = RS_OK;
}
else // if we had received whole message
{
hRS->fRX_Half = 0;
//---------PROCESS DATA & ENDING RECEIVING--------
RS_Set_RX_End(hRS);
if(hRS->sRS_Timeout) // if timeout setted
HAL_TIM_Base_Stop_IT(hRS->htim); // stop timeout
// parse received data
RS_RES = Parse_Message(hRS, hRS->pMessagePtr, hRS->pBufferPtr); // parse message
// RESPONSE
RS_RES = RS_Response(hRS, hRS->pMessagePtr);
}
return RS_RES;
}
/**
* @brief UART TX Callback: define behaviour after transmiting message.
* @param hRS - указатель на хендлер RS.
* @return RS_RES - статус о состоянии RS после обработки приема.
* @note Определяет поведение RS после передачи сообщения.
*/
RS_StatusTypeDef RS_UART_TxCpltCallback(RS_HandleTypeDef *hRS)
{
RS_StatusTypeDef RS_RES = RS_OK;
HAL_StatusTypeDef uart_res = 0;
//--------------ENDING TRANSMITTING-------------
RS_Set_TX_End(hRS);
//-----------START RECEIVING or END RS----------
RS_RES = RS_Handle_Receive_Start(hRS, hRS->pMessagePtr);
return RS_RES;
}
/**
* @brief Handler for UART.
* @param hRS - указатель на хендлер RS.
* @note Обрабатывает ошибки если есть и вызывает RS Коллбеки.
* Добавить вызов этой функции в UARTx_IRQHandler().
*/
void RS_UART_Handler(RS_HandleTypeDef *hRS)
{
HAL_UART_IRQHandler(hRS->huart);
//-------------CALL RS CALLBACKS------------
/* IF NO ERROR OCCURS */
if(hRS->huart->ErrorCode == 0)
{
hRS->htim->Instance->CNT = 0; // reset cnt;
/* Start timeout */
if(hRS->sRS_Timeout) // if timeout setted
if((hRS->huart->RxXferCount+1 == hRS->huart->RxXferSize) && RS_Is_RX_Busy(hRS)) // if first byte is received and receive is active
HAL_TIM_Base_Start_IT(hRS->htim);
/* RX Callback */
if (( hRS->huart->RxXferCount == 0U) && RS_Is_RX_Busy(hRS) && // if all bytes are received and receive is active
hRS->huart->RxState != HAL_UART_STATE_BUSY_RX) // also check that receive "REALLY" isnt busy
RS_UART_RxCpltCallback(hRS);
/* TX Callback */
if (( hRS->huart->TxXferCount == 0U) && RS_Is_TX_Busy(hRS) && // if all bytes are transmited and transmit is active
hRS->huart->gState != HAL_UART_STATE_BUSY_TX) // also check that receive "REALLY" isnt busy
RS_UART_TxCpltCallback(hRS);
}
//----------------ERRORS HANDLER----------------
else
{
/* de-init uart transfer */
RS_Abort(hRS, ABORT_RS);
RS_Handle_Receive_Start(hRS, hRS->pMessagePtr);
// later, maybe, will be added specific handlers for err
}
}
/**
* @brief Handler for TIM.
* @param hRS - указатель на хендлер RS.
* @note Попадание сюда = таймаут и перезапуск RS приема
* Добавить вызов этой функции в TIMx_IRQHandler().
*/
void RS_TIM_Handler(RS_HandleTypeDef *hRS)
{
HAL_TIM_IRQHandler(hRS->htim);
HAL_TIM_Base_Stop_IT(hRS->htim);
RS_Abort(hRS, ABORT_RS);
RS_Handle_Receive_Start(hRS, hRS->pMessagePtr);
}
//--------------------CALLBACK/HANDLER FUNCTIONS---------------------
//-------------------------------------------------------------------
//-------------------------------------------------------------------
//--------------WEAK PROTOTYPES FOR PROCESSING MESSAGE---------------
///**
// * @brief Respond accord to received message.
// * @param hRS - указатель на хендлер RS.
// * @param RS_msg - указатель на структуру сообщения.
// * @return RS_RES - статус о результате ответа на комманду.
// * @note Обработка принятой комманды и ответ на неё.
// */
//__weak RS_StatusTypeDef RS_Response(RS_HandleTypeDef *hRS, RS_MsgTypeDef *RS_msg)
//{
// /* Redefine function for user purposes */
// return RS_ERR;
//}
//
///**
// * @brief Collect message in buffer to transmit it.
// * @param hRS - указатель на хендлер RS.
// * @param RS_msg - указатель на структуру сообщения.
// * @param msg_uart_buff - указатель на буффер UART.
// * @return RS_RES - статус о результате заполнения буфера.
// * @note Заполнение буффера UART из структуры сообщения.
// */
//__weak RS_StatusTypeDef Collect_Message(RS_HandleTypeDef *hRS, RS_MsgTypeDef *RS_msg, uint8_t *msg_uart_buff)
//{
// /* Redefine function for user purposes */
// return RS_ERR;
//}
//
///**
// * @brief Parse message from buffer to process it.
// * @param hRS - указатель на хендлер RS.
// * @param RS_msg - указатель на структуру сообщения.
// * @param msg_uart_buff - указатель на буффер UART.
// * @return RS_RES - статус о результате заполнения структуры.
// * @note Заполнение структуры сообщения из буффера UART.
// */
//__weak RS_StatusTypeDef Parse_Message(RS_HandleTypeDef *hRS, RS_MsgTypeDef *RS_msg, uint8_t *msg_uart_buff)
//{
// /* Redefine function for user purposes */
// return RS_ERR;
//}
//
///**
// * @brief Define size of RX Message that need to be received.
// * @param hRS - указатель на хендлер RS.
// * @param rx_data_size - указатель на переменную для записи кол-ва байт для принятия.
// * @return RS_RES - статус о корректности рассчета кол-ва байт для принятия.
// * @note Определение сколько байтов надо принять по протоколу.
// */
//__weak RS_StatusTypeDef RS_Define_Size_of_RX_Message(RS_HandleTypeDef *hRS, uint32_t *rx_data_size)
//{
// /* Redefine function for user purposes */
// return RS_ERR;
//}
//--------------WEAK PROTOTYPES FOR PROCESSING MESSAGE---------------
//-------------------------------------------------------------------

297
Code/Modbus/rs_message.h
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@ -1,297 +0,0 @@
/**********************************RS***************************************
Данный файл содержит объявления базовых функции и дефайны для реализации
протоколов по RS/UART.
***************************************************************************/
#ifndef __RS_LIB_H_
#define __RS_LIB_H_
#include "modbus.h"
#include "periph_general.h"
#include "crc_algs.h"
/////////////////////////////////////////////////////////////////////
////////////////////////////---DEFINES---////////////////////////////
/* Check that all defines required by RS are defined */
#ifndef MSG_SIZE_MAX
#error Define MSG_SIZE_MAX (Maximum size of message). This is necessary to create buffer for UART.
#endif
#ifndef RX_FIRST_PART_SIZE
#error Define RX_FIRST_PART_SIZE (Size of first part of message). This is necessary to receive the first part of the message, from which determine the size of the remaining part of the message.
#endif
/* Clear message-uart buffer */
#define RS_Clear_Buff(_buff_) for(int i=0; i<MSG_SIZE_MAX;i++) _buff_[i] = NULL
/* Set/Reset flags */
#define RS_Set_Free(_hRS_) _hRS_->fRS_Busy = 0
#define RS_Set_Busy(_hRS_) _hRS_->fRS_Busy = 1
#define RS_Set_RX_Flags(_hRS_) _hRS_->fRX_Busy = 1; _hRS_->fRX_Done = 0; _hRS_->fRX_Half = 0
#define RS_Set_TX_Flags(_hRS_) _hRS_->fTX_Busy = 1; _hRS_->fTX_Done = 0
#define RS_Reset_RX_Flags(_hRS_) _hRS_->fRX_Busy = 0; _hRS_->fRX_Done = 0; _hRS_->fRX_Half = 0
#define RS_Reset_TX_Flags(_hRS_) _hRS_->fTX_Busy = 0; _hRS_->fTX_Done = 0
#define RS_Set_RX_End_Flag(_hRS_) _hRS_->fRX_Done = 1
#define RS_Set_TX_End_Flag(_hRS_) _hRS_->fTX_Done = 1
#define RS_Set_RX_End(_hRS_) RS_Reset_RX_Flags(_hRS_); RS_Set_RX_End_Flag(_hRS_)
#define RS_Set_TX_End(_hRS_) RS_Reset_TX_Flags(_hRS_); RS_Set_TX_End_Flag(_hRS_)
/* Clear all RS stuff */
#define RS_Clear_All(_hRS_) RS_Clear_Buff(_hRS_->pBufferPtr); RS_Reset_RX_Flags(_hRS_); RS_Reset_TX_Flags(_hRS_);
//#define MB_Is_RX_Busy(_hRS_) ((_hRS_->huart->gState&HAL_USART_STATE_BUSY_RX) == HAL_USART_STATE_BUSY_RX)
//#define MB_Is_TX_Busy(_hRS_) ((_hRS_->huart->gState&HAL_USART_STATE_BUSY_RX) == HAL_USART_STATE_BUSY_TX)
#define RS_Is_RX_Busy(_hRS_) (_hRS_->fRX_Busy == 1)
#define RS_Is_TX_Busy(_hRS_) (_hRS_->fTX_Busy == 1)
////////////////////////////---DEFINES---////////////////////////////
/////////////////////////////////////////////////////////////////////
///////////////////////---STRUCTURES & ENUMS---//////////////////////
//------------------ENUMERATIONS--------------------
/* Enums for respond CMD about RS status*/
typedef enum // RS_StatusTypeDef
{
/* IN-CODE STATUS (start from 0x01, and goes up)*/
/*0x01*/ RS_OK = 0x01,
/*0x02*/ RS_ERR,
/*0x03*/ RS_ABORTED,
/*0x04*/ RS_BUSY,
/*0x05*/ RS_SKIP,
/*0x06*/ RS_COLLECT_MSG_ERR,
/*0x07*/ RS_PARSE_MSG_ERR,
// reserved values
// /*0x00*/ RS_UNKNOWN_ERR = 0x00, // reserved for case, if no one error founded (nothing changed response from zero)
}RS_StatusTypeDef;
/* Enums for RS Modes */
typedef enum // RS_ModeTypeDef
{
SLAVE_ALWAYS_WAIT = 0x01, // Slave mode with infinity waiting
SLAVE_TIMEOUT_WAIT = 0x02, // Slave mode with waiting with timeout
// MASTER = 0x03, // Master mode
}RS_ModeTypeDef;
/* Enums for RS UART Modes */
typedef enum // RS_ITModeTypeDef
{
BLCK_MODE = 0x00, // Blocking mode
IT_MODE = 0x01, // Interrupt mode
}RS_ITModeTypeDef;
/* Enums for Abort modes */
typedef enum // RS_AbortTypeDef
{
ABORT_TX = 0x01, // Abort transmit
ABORT_RX = 0x02, // Abort receive
ABORT_RX_TX = 0x03, // Abort receive and transmit
ABORT_RS = 0x04, // Abort uart and reset RS structure
}RS_AbortTypeDef;
/* Enums for RX Size modes */
typedef enum // RS_RXSizeTypeDef
{
RS_RX_Size_Const = 0x01, // size of receiving message is constant
RS_RX_Size_NotConst = 0x02, // size of receiving message isnt constant
}RS_RXSizeTypeDef;
//-----------STRUCTURE FOR HANDLE RS------------
/**
* @brief Handle for RS communication.
* @note Prefixes: h - handle, s - settings, f - flag
*/
typedef struct // RS_HandleTypeDef
{
/* MESSAGE */
uint8_t ID; // ID of RS "channel"
RS_MsgTypeDef *pMessagePtr; // pointer to message struct
uint8_t *pBufferPtr; // pointer to message buffer
uint32_t RS_Message_Size; // size of whole message, not only data
/* HANDLERS and SETTINGS */
UART_HandleTypeDef *huart; // handler for used uart
TIM_HandleTypeDef *htim; // handler for used tim
RS_ModeTypeDef sRS_Mode; // setting: slave or master @ref RS_ModeTypeDef
RS_ITModeTypeDef sRS_IT_Mode; // setting: 1 - IT mode, 0 - Blocking mode
uint16_t sRS_Timeout; // setting: timeout in ms
RS_RXSizeTypeDef sRS_RX_Size_Mode; // setting: 1 - not const, 0 - const
/* FLAGS */
// These flags for controling receive/transmit
unsigned fRX_Half:1; // flag: 0 - receiving msg before ByteCnt, 0 - receiving msg after ByteCnt
unsigned fRS_Busy:1; // flag: 1 - RS is busy, 0 - RS isnt busy
unsigned fRX_Busy:1; // flag: 1 - receiving is active, 0 - receiving isnt active
unsigned fTX_Busy:1; // flag: 1 - transmiting is active, 0 - transmiting isnt active
unsigned fRX_Done:1; // flag: 1 - receiving is done, 0 - receiving isnt done
unsigned fTX_Done:1; // flag: 1 - transmiting is done, 0 - transmiting isnt done
// setted by user
unsigned fMessageHandled:1; // flag: 1 - RS command is handled, 0 - RS command isnt handled yet
unsigned fEchoResponse:1; // flag: 1 - response with received msg, 0 - response with own msg
unsigned fDeferredResponse:1; // flag: 1 - response not in interrupt, 0 - response in interrupt
unsigned fReInit_UART:1; // flag: 1 - need to reinitialize uart, 0 - nothing
/* RS STATUS */
RS_StatusTypeDef RS_STATUS; // RS status
}RS_HandleTypeDef;
///////////////////////---STRUCTURES & ENUMS---//////////////////////
/////////////////////////////////////////////////////////////////////
///////////////////////////---FUNCTIONS---///////////////////////////
//----------------FUNCTIONS FOR PROCESSING MESSAGE-------------------
/*--------------------Defined by users purposes--------------------*/
/**
* @brief Respond accord to received message.
* @param hRS - указатель на хендлер RS.
* @param RS_msg - указатель на структуру сообщения.
* @return RS_RES - статус о результате ответа на комманду.
* @note Обработка принятой комманды и ответ на неё.
*/
RS_StatusTypeDef RS_Response(RS_HandleTypeDef *hRS, RS_MsgTypeDef *RS_msg);
/**
* @brief Collect message in buffer to transmit it.
* @param hRS - указатель на хендлер RS.
* @param RS_msg - указатель на структуру сообщения.
* @param msg_uart_buff - указатель на буффер UART.
* @return RS_RES - статус о результате заполнения буфера.
* @note Заполнение буффера UART из структуры сообщения.
*/
RS_StatusTypeDef Collect_Message(RS_HandleTypeDef *hRS, RS_MsgTypeDef *RS_msg, uint8_t *msg_uart_buff);
/**
* @brief Parse message from buffer to process it.
* @param hRS - указатель на хендлер RS.
* @param RS_msg - указатель на структуру сообщения.
* @param msg_uart_buff - указатель на буффер UART.
* @return RS_RES - статус о результате заполнения структуры.
* @note Заполнение структуры сообщения из буффера UART.
*/
RS_StatusTypeDef Parse_Message(RS_HandleTypeDef *hRS, RS_MsgTypeDef *RS_msg, uint8_t *msg_uart_buff);
/**
* @brief Define size of RX Message that need to be received.
* @param hRS - указатель на хендлер RS.
* @param rx_data_size - указатель на переменную для записи кол-ва байт для принятия.
* @return RS_RES - статус о корректности рассчета кол-ва байт для принятия.
* @note Определение сколько байтов надо принять по протоколу.
*/
RS_StatusTypeDef RS_Define_Size_of_RX_Message(RS_HandleTypeDef *hRS, uint32_t *rx_data_size);
//-------------------------GENERAL FUNCTIONS-------------------------
/*-----------------Should be called from main code-----------------*/
/**
* @brief Start receive IT.
* @param hRS - указатель на хендлер RS.
* @param RS_msg - указатель на структуру сообщения.
* @return RS_RES - статус о состоянии RS после инициализации приема.
*/
RS_StatusTypeDef RS_Receive_IT(RS_HandleTypeDef *hRS, RS_MsgTypeDef *RS_msg);
/**
* @brief Start transmit IT.
* @param hRS - указатель на хендлер RS.
* @param RS_msg - указатель на структуру сообщения.
* @return RS_RES - статус о состоянии RS после инициализации передачи.
*/
RS_StatusTypeDef RS_Transmit_IT(RS_HandleTypeDef *hRS, RS_MsgTypeDef *RS_msg);
/**
* @brief Initialize UART and handle RS stucture.
* @param hRS - указатель на хендлер RS.
* @param suart - указатель на структуру с настройками UART.
* @param stim - указатель на структуру с настройками таймера.
* @param pRS_BufferPtr - указатель на буффер для приема-передачи по UART. Если он NULL, то поставиться библиотечный буфер.
* @return RS_RES - статус о состоянии RS после инициализации.
*/
RS_StatusTypeDef RS_Init(RS_HandleTypeDef *hRS, UART_SettingsTypeDef *suart, TIM_SettingsTypeDef *stim, uint8_t *pRS_BufferPtr);
/**
* @brief ReInitialize UART and RS receive.
* @param hRS - указатель на хендлер RS.
* @param suart - указатель на структуру с настройками UART.
* @return RS_RES - статус о состоянии RS после инициализации.
*/
HAL_StatusTypeDef RS_ReInit_UART(RS_HandleTypeDef *hRS, UART_SettingsTypeDef *suart);
/**
* @brief Abort RS/UART.
* @param hRS - указатель на хендлер RS.
* @param AbortMode - выбор, что надо отменить.
- ABORT_TX: Отмена передачи по ЮАРТ, с очищением флагов TX,
- ABORT_RX: Отмена приема по ЮАРТ, с очищением флагов RX,
- ABORT_RX_TX: Отмена приема и передачи по ЮАРТ,
- ABORT_RS: Отмена приема-передачи RS, с очищением всей структуры.
* @return RS_RES - статус о состоянии RS после аборта.
* @note Отмена работы UART в целом или отмена приема/передачи RS.
Также очищается хендл hRS.
*/
RS_StatusTypeDef RS_Abort(RS_HandleTypeDef *hRS, RS_AbortTypeDef AbortMode);
//-------------------------GENERAL FUNCTIONS-------------------------
//-------------------------------------------------------------------
//--------------------CALLBACK/HANDLER FUNCTIONS---------------------
/**
* @brief Handle for starting receive.
* @param hRS - указатель на хендлер RS.
* @param RS_msg - указатель на структуру сообщения.
* @return RS_RES - статус о состоянии RS после инициализации приема или окончания общения.
* @note Определяет начинать прием команды/ответа или нет.
*/
RS_StatusTypeDef RS_Handle_Receive_Start(RS_HandleTypeDef *hRS, RS_MsgTypeDef *RS_msg);
/**
* @brief Handle for starting transmit.
* @param hRS - указатель на хендлер RS.
* @param RS_msg - указатель на структуру сообщения.
* @return RS_RES - статус о состоянии RS после инициализации передачи.
* @note Определяет отвечать ли на команду или нет.
*/
RS_StatusTypeDef RS_Handle_Transmit_Start(RS_HandleTypeDef *hRS, RS_MsgTypeDef *RS_msg);
/**
* @brief UART RX Callback: define behaviour after receiving parts of message.
* @param hRS - указатель на хендлер RS.
* @return RS_RES - статус о состоянии RS после обработки приема.
* @note Контролирует прием сообщения: определяет размер принимаемой посылки и обрабатывает его.
*/
RS_StatusTypeDef RS_UART_RxCpltCallback(RS_HandleTypeDef *hRS);
/**
* @brief UART TX Callback: define behaviour after transmiting message.
* @param hRS - указатель на хендлер RS.
* @return RS_RES - статус о состоянии RS после обработки приема.
* @note Определяет поведение RS после передачи сообщения.
*/
RS_StatusTypeDef RS_UART_TxCpltCallback(RS_HandleTypeDef *hRS);
/**
* @brief Handler for UART.
* @param hRS - указатель на хендлер RS.
* @note Обрабатывает ошибки если есть и вызывает RS Коллбеки.
* Добавить вызов этой функции в UARTx_IRQHandler().
*/
void RS_UART_Handler(RS_HandleTypeDef *hRS);
/**
* @brief Handler for TIM.
* @param hRS - указатель на хендлер RS.
* @note Попадание сюда = таймаут и перезапуск RS приема
* Добавить вызов этой функции в TIMx_IRQHandler().
*/
void RS_TIM_Handler(RS_HandleTypeDef *hRS);
//--------------------CALLBACK/HANDLER FUNCTIONS---------------------
///////////////////////////---FUNCTIONS---///////////////////////////
#endif // __RS_LIB_H_

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Code/PWM/control.c
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#include "pwm.h"
TIM_SettingsTypeDef TIM_CTRL = {0};
// variables for filling arrays
int Numb_Of_Peroids = 2; // number of periods
int Samples_Per_Peroid = 0; // how many samples in one period
int Size_Of_Log = 0; // size of written data to log
int log_ind = 0; // index of log arrays
int cnt_to_cnt_log = 0; // counter for log_cnt
int sine_ind_prev = 0;
/**
* @brief Filling logs.
* @note Заполнение логов: синус, шим, пила.
* @note This called from TIM_CTRL_Handler
*/
void Fill_Logs_with_Data(void)
{
// calc pwm duty from timer
float PWM_Duty;
if(PWM_Get_Mode(&hpwm1, PWM_DC_MODE) == 0) // if sinus need to be written
{
if(PWM_Get_Mode(&hpwm1, PWM_CH_MODE)) // if its signed sine mode (two channels)
{
if(hpwm1.Duty_Table_Ind < hpwm1.Duty_Table_Size/2) // first half get from channel 1
PWM_Duty = (((float)PWM_Get_Compare1(&hpwm1))/(PWM_Get_Autoreload(&hpwm1)))+1;
else // second half get from channel 2
PWM_Duty = 1-(((float)PWM_Get_Compare2(&hpwm1))/(PWM_Get_Autoreload(&hpwm1)));
}
else // if its unsigned sine mode (single channel)
{ // just get current pwm duty
PWM_Duty = ((float)PWM_Get_Compare1(&hpwm1)/PWM_Get_Autoreload(&hpwm1));
}
}
else // if its dc pwm mode
{ // just get current pwm duty
if(PWM_Get_Mode(&hpwm1, PWM_CH_MODE)) // if its second channels mode
PWM_Duty = ((float)PWM_Get_Compare2(&hpwm1)/PWM_Get_Autoreload(&hpwm1));
else // if its first channel mode
PWM_Duty = ((float)PWM_Get_Compare1(&hpwm1)/PWM_Get_Autoreload(&hpwm1));
}
// WRITE SINUS TO WHOLE ARRAY
// sine_log[log_ind] = sin_val;
if(PWM_Get_Mode(&hpwm1,PWM_DC_MODE) == 0) // in table mode write PWM Duty (write sine) with scale 1/2 from sin table max value (0xFFFF/2)
sine_log[log_ind] = PWM_Duty*(0x8000-1);
else // in dc mode write PWM Duty (write sine)
sine_log[log_ind] = 0;
// WRITE PWM
if(PWM_Get_Mode(&hpwm1,PWM_DC_MODE)) // in DC mode
{
// write 1 - if log_ind < Size_Of_Period*PWM_Dury
// write 0 - otherwise
pwm_log[log_ind] = (log_ind%(Size_Of_Log/Numb_Of_Peroids) < (Size_Of_Log/Numb_Of_Peroids+1)*hpwm1.PWM_Value/100)? 1: 0;
}
else // in table mode
{
// write fill whole pwm array at one interrupt
int PWM_Period_End_Ind = (Size_Of_Log/Numb_Of_Peroids);
int PWM_Step_End_Ind;
if(PWM_Get_Mode(&hpwm1,PWM_CH_MODE))
PWM_Step_End_Ind = PWM_Period_End_Ind*fabs(PWM_Duty-1);
else
PWM_Step_End_Ind = PWM_Period_End_Ind*PWM_Duty;
for(int i = 0; i <= PWM_Step_End_Ind; i++)
{
for (int j = 0; j < Numb_Of_Peroids; j++)
pwm_log[i+j*PWM_Period_End_Ind] = 1;
}
for(int i = PWM_Step_End_Ind+1; i < PWM_Period_End_Ind; i++)
for (int j = 0; j < Numb_Of_Peroids; j++)
pwm_log[i+j*PWM_Period_End_Ind] = 0;
}
// WRITE COUNTER
cnt_log[log_ind] = cnt_to_cnt_log;
cnt_to_cnt_log++;
if(cnt_to_cnt_log>=Size_Of_Log/2)
cnt_to_cnt_log = 0;
// INCREMENT AND RESET COUNTER
log_ind++;
if(PWM_Get_Mode(&hpwm1,PWM_DC_MODE) == 0) // if its PWM table mode
{
// SYNCHRONIZE PERIOD OF SIN IN LOG
// (это надо, чтобы данные не съезжали из-за несинхронизированного периода)
// wait until period ended
if(log_ind>Size_Of_Log-1) // if logs are filled
{
if((unsigned)hpwm1.Duty_Table_Ind < sine_ind_prev) // and if new period started
{
log_ind = 0; // reset counter
sine_ind_prev = (unsigned)hpwm1.Duty_Table_Ind;
}
}
// update prev variable only if log currently writing
else
sine_ind_prev = (unsigned)hpwm1.Duty_Table_Ind;
}
else // if its PWM DC mode
{
// if logs are filled
if(log_ind>Size_Of_Log-1)
log_ind = 0;
}
// if its overflow log array size - reset log_ind
if(log_ind>LOG_SIZE-1)
{
log_ind = 0;
sine_ind_prev = (unsigned)hpwm1.Duty_Table_Ind;
}
}
/**
* @brief Update log parameters.
* @note Проверка надо ли обновлять параметры логов, и если надо - обновляет их.
* @note This called from TIM_CTRL_Handler
*/
void Update_Params_For_Log(void)
{
unsigned UpdateLog = 0;
// READ NUMB OF PERIOD IN LOGS
if(Numb_Of_Peroids != log_ctrl[R_LOG_CTRL_LOG_PWM_NUMB])
{
Numb_Of_Peroids = log_ctrl[R_LOG_CTRL_LOG_PWM_NUMB];
// update logs params
UpdateLog = 1;
}
// READ SIZE OF LOGS
if(Size_Of_Log != log_ctrl[R_LOG_CTRL_LOG_SIZE])
{
Size_Of_Log = log_ctrl[R_LOG_CTRL_LOG_SIZE];
// update logs params
UpdateLog = 1;
}
// UPDATE LOG PARAMS
if(UpdateLog)
{
// set logs params
Set_Log_Params();
}
}
/**
* @brief Set up log parameters.
* @note Устанавливает настройки логов и проверяет их на корректность.
*/
void Set_Log_Params(void)
{
// SET LOG PARAMS
log_ind = 0;
Samples_Per_Peroid = TIM_CTRL.sTimFreqHz/hpwm1.PWM_Value;
if(Size_Of_Log > LOG_SIZE) // if its too much data in log
{
Numb_Of_Peroids = (LOG_SIZE/Samples_Per_Peroid);
log_ctrl[R_LOG_CTRL_LOG_SIZE] = Numb_Of_Peroids;
Size_Of_Log = Numb_Of_Peroids*Samples_Per_Peroid;
}
// clear logs arrays
for(int i = Size_Of_Log; i < LOG_SIZE; i++)
{
sine_log[i] = 0;
pwm_log[i] = 0;
cnt_log[i] = 0;
}
}
/**
* @brief reInitialization of control timer.
* @note Перенастраивает таймер согласно принятным настройкам в log_ctrl.
* @note This called from main while
*/
void Control_Timer_ReInit(TIM_SettingsTypeDef *stim)
{
TIM_Base_MspDeInit(&stim->htim);
hpwm1.stim.sTickBaseMHz = PROJSET.TIM_CTRL_TICKBASE;
TIM_Base_Init(stim);
HAL_TIM_Base_Start_IT(&stim->htim); // timer for sinus
HAL_NVIC_SetPriority(TIM8_BRK_TIM12_IRQn, 1, 1);
}
/**
* @brief First initialization of Control Timer.
* @note Первый управляющего таймера. Таймер записывает логи и обновляет параметры ШИМ.
* @note This called from main
*/
void Control_Timer_FirstInit(void)
{
//-------CONTROL TIMER INIT----------
// tim settings
TIM_CTRL.htim.Instance = TIM12;
TIM_CTRL.sTimMode = TIM_IT_MODE;
TIM_CTRL.sTickBaseMHz = PROJSET.TIM_CTRL_TICKBASE;
TIM_CTRL.sTimAHBFreqMHz = PROJSET.TIM_CTRL_AHB_FREQ;
TIM_CTRL.sTimFreqHz = HZ_TIMER_CTRL;
TIM_Base_Init(&TIM_CTRL);
HAL_NVIC_SetPriority(TIM8_BRK_TIM12_IRQn, 1, 1);
HAL_TIM_Base_Start_IT(&TIM_CTRL.htim); // timer for sinus
// FILL TIME ARRAY WITH TIME
for(int i = 0; i <= R_TIME_LOG_QNT; i++)
time_log[i] = i;
}
//-------------------------------------------------------------------
//------------------------HANDLERS FUNCTIONS-------------------------
//-------------CONTROL TIMER---------------
void TIM8_BRK_TIM12_IRQHandler(void)
{
Trace_CTRL_TIM_Enter();
HAL_TIM_IRQHandler(&TIM_CTRL.htim);
Fill_Logs_with_Data();
Update_Params_For_Log();
Update_Params_For_PWM(&hpwm1);
WriteSettingsToMem();
Trace_CTRL_TIM_Exit();
}

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Code/PWM/control.h
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#ifndef __CONTROL_H_
#define __CONTROL_H_
#include "periph_general.h"
#include "modbus.h"
#include "math.h"
#include "settings.h"
#define M_PI 3.14159265358979323846 /* pi */
extern TIM_SettingsTypeDef TIM_CTRL;
//---------------------this called from TIM_CTRL_Handler()-----------------------
/**
* @brief Update log parameters.
* @note Проверка надо ли обновлять параметры логов, и если надо - обновляет их.
* @note This called from TIM_CTRL_Handler
*/
void Update_Params_For_Log(void);
/**
* @brief Filling logs.
* @note заполнение логов: синус, шим, пила.
* @note this called from TIM_CTRL_Handler
*/
void Fill_Logs_with_Data(void);
/**
* @brief Set up log parameters.
* @note Устанавливает настройки логов и проверяет их на корректность.
*/
void Set_Log_Params(void);
/**
* @brief First initialization of Control Timer.
* @note Первый управляющего таймера. Таймер записывает логи и обновляет параметры ШИМ.
* @note This called from main
*/
void Control_Timer_FirstInit(void);
// this called from main while(1)
/**
* @brief reInitialization of control timer.
* @param stim - указатель на настройки таймера.
* @note Перенастраивает таймер согласно принятным настройкам в log_ctrl.
* @note This called from main while
*/
void Control_Timer_ReInit(TIM_SettingsTypeDef *stim);
#endif // __CONTROL_H_

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#include "pwm.h"
//#include "rng.h"
PWM_HandleTypeDef hpwm1;
PWM_SlaveHandleTypeDef hpwm2;
PWM_SlaveHandleTypeDef hpwm3;
uint32_t sin_table[SIN_TABLE_SIZE_MAX];
unsigned ActiveChannelSHDW_Master;
float DeadTimeCnt_Master;
unsigned ActiveChannelSHDW_Slave2;
float DeadTimeCnt_Slave2;
unsigned ActiveChannelSHDW_Slave3;
float DeadTimeCnt_Slave3;
/**
* @brief First set up of PWM.
* @note Первый инит ШИМ. Заполняет структуры и инициализирует таймер для генерации синуоидального ШИМ.
* Скважность ШИМ меняется по закону синусоиды, каждый канал генерирует свой полупериод синуса (от -1 до 0 И от 0 до 1)
* ШИМ генерируется на одном канале.
* @note This called from main
*/
void PWM_Sine_FirstInit(void)
{
hpwm1.pDuty_Table_Origin = SIN_TABLE_ORIGIN;
//---------PWM TIMER1 INIT------------
// channels settings
hpwm1.sConfigOC.OCMode = TIM_OCMODE_PWM1;
hpwm1.sConfigOC.Pulse = 0;
hpwm1.sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
hpwm1.sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
// tim1 settings
hpwm1.stim.htim.Instance = TIMER_PWM1_INSTANCE;
hpwm1.stim.sTimMode = TIM_IT_MODE;
hpwm1.stim.sTimFreqHz = HZ_TIMER_PWM;
hpwm1.stim.sTickBaseMHz = PROJSET.TIM_PWM_TICKBASE;
hpwm1.stim.sTimAHBFreqMHz = PROJSET.TIM_PWM_AHB_FREQ;
hpwm1.GPIOx = TIMER_PWM1_GPIOx;
hpwm1.GPIO_PIN_X1 = PROJSET.TIM_PWM1_GPIO_PIN_X1;
hpwm1.GPIO_PIN_X2 = PROJSET.TIM_PWM1_GPIO_PIN_X2;
hpwm1.PWM_Channel1 = PROJSET.TIM_PWM1_TIM_CHANNEL1;
hpwm1.PWM_Channel2 = PROJSET.TIM_PWM1_TIM_CHANNEL2;
hpwm1.hpwm2 = (void *)&hpwm2;
hpwm1.hpwm3 = (void *)&hpwm3;
TIM_Base_Init(&hpwm1.stim);
TIM_Output_PWM_Init(&hpwm1.stim.htim, &hpwm1.sConfigOC, hpwm1.PWM_Channel1, hpwm1.GPIOx, hpwm1.GPIO_PIN_X1);
TIM_Output_PWM_Init(&hpwm1.stim.htim, &hpwm1.sConfigOC, hpwm1.PWM_Channel2, hpwm1.GPIOx, hpwm1.GPIO_PIN_X2);
// PWM SLAVES INIT
hpwm2.hMasterPWM = &hpwm1;
hpwm2.stim = hpwm1.stim;
hpwm2.stim.htim.Instance = (TIM_TypeDef *)PROJSET.TIM_PWM2_INSTANCE;
hpwm2.GPIOx = (GPIO_TypeDef *)PROJSET.TIM_PWM2_GPIOx;
hpwm2.GPIO_PIN_X1 = PROJSET.TIM_PWM2_GPIO_PIN_X1;
hpwm2.GPIO_PIN_X2 = PROJSET.TIM_PWM2_GPIO_PIN_X2;
hpwm2.PWM_Channel1 = PROJSET.TIM_PWM2_TIM_CHANNEL1;
hpwm2.PWM_Channel2 = PROJSET.TIM_PWM2_TIM_CHANNEL2;
hpwm2.Duty_Shift_Ratio = (float)2/3;
hpwm3.hMasterPWM = &hpwm1;
hpwm3.stim = hpwm1.stim;
hpwm3.stim.htim.Instance = (TIM_TypeDef *)PROJSET.TIM_PWM3_INSTANCE;
hpwm3.GPIOx = (GPIO_TypeDef *)PROJSET.TIM_PWM3_GPIOx;
hpwm3.GPIO_PIN_X1 = PROJSET.TIM_PWM3_GPIO_PIN_X1;
hpwm3.GPIO_PIN_X2 = PROJSET.TIM_PWM3_GPIO_PIN_X2;
hpwm3.PWM_Channel1 = PROJSET.TIM_PWM3_TIM_CHANNEL1;
hpwm3.PWM_Channel2 = PROJSET.TIM_PWM3_TIM_CHANNEL2;
hpwm3.Duty_Shift_Ratio = (float)-2/3;
PWM_SlavePhase_Init(&hpwm2);
PWM_SlavePhase_Init(&hpwm3);
//----------TIMERS START-------------
HAL_TIM_Base_Start_IT(&hpwm1.stim.htim); // timer for PWM
HAL_TIM_PWM_Start(&hpwm1.stim.htim, hpwm1.PWM_Channel1); // PWM channel 1
HAL_TIM_PWM_Start(&hpwm1.stim.htim, hpwm1.PWM_Channel2); // PWM channel 2
}
/**
* @brief PWM Handler.
* @param hpwm - указатель на хендл ШИМ.
* @note Управляет скважностью ШИМ.
* @note This called from TIM_PWM_Handler
*/
void PWM_Handler(PWM_HandleTypeDef *hpwm)
{
//------------SINUS MODE-------------
if(PWM_Get_Mode(&hpwm1,PWM_DC_MODE) == 0)
{
if(hpwm->PWM_Value != 0) // if there some frequency
{
unsigned sin_ind = PWM_Get_Duty_Table_Ind(hpwm, hpwm->stim.sTimFreqHz);
// overflow check
if(sin_ind >= hpwm->Duty_Table_Size)
sin_ind -= hpwm->Duty_Table_Size;
if(sin_ind >= hpwm->Duty_Table_Size) // if its still overflow reset it
sin_ind = 0;
// if unsigned sine enabled
if(PWM_Get_Mode(hpwm, PWM_CH_MODE) == 0)
{
// set pwm duty
PWM_Set_Duty_From_Table(hpwm, sin_ind); // set first channel
PWM_SlavePhase_Set_DutyTable_Unsigned(PWM_Set_pSlaveHandle(hpwm,hpwm2), sin_ind);
PWM_SlavePhase_Set_DutyTable_Unsigned(PWM_Set_pSlaveHandle(hpwm,hpwm3), sin_ind);
}
// if signed sine enabled
else
{
int Duty = PWM_Get_Table_Element_Signed(hpwm, sin_ind);
if(Duty >= 0)
{
PWM_Set_Compare1(hpwm, Duty); // set first channel
PWM_Set_Compare2(hpwm, 0); // reset second channel
}
else // если это вторая полуволна
{
PWM_Set_Compare1(hpwm, 0); // reset first channel
PWM_Set_Compare2(hpwm, -Duty); // set second channel
}
PWM_SlavePhase_Set_DutyTable_Signed(PWM_Set_pSlaveHandle(hpwm,hpwm2), sin_ind);
PWM_SlavePhase_Set_DutyTable_Signed(PWM_Set_pSlaveHandle(hpwm,hpwm3), sin_ind);
}
}
else // if freq = 0 reset all channels
{
PWM_Set_Compare1(hpwm, 0); // reset first channel
PWM_Set_Compare2(hpwm, 0); // reset second channel
PWM_Set_Compare1(PWM_Set_pSlaveHandle(hpwm,hpwm2), 0); // reset first channel
PWM_Set_Compare2(PWM_Set_pSlaveHandle(hpwm,hpwm2), 0); // reset second channel
PWM_Set_Compare1(PWM_Set_pSlaveHandle(hpwm,hpwm3), 0); // reset first channel
PWM_Set_Compare2(PWM_Set_pSlaveHandle(hpwm,hpwm3), 0); // reset second channel
}
}
//-----------PWM DC MODE-------------
else
{
PWM_Set_Compare1(PWM_Set_pSlaveHandle(hpwm,hpwm2), 0); // reset first channel
PWM_Set_Compare2(PWM_Set_pSlaveHandle(hpwm,hpwm2), 0); // reset second channel
PWM_Set_Compare1(PWM_Set_pSlaveHandle(hpwm,hpwm3), 0); // reset first channel
PWM_Set_Compare2(PWM_Set_pSlaveHandle(hpwm,hpwm3), 0); // reset second channel
// uint32_t pwm_rng = 0;
// HAL_RNG_GenerateRandomNumber(&hrng, &pwm_rng);
// pwm_rng = ((pwm_rng&0xFFFF)/(0xFFFF/PWM_Get_Autoreload(hpwm)))/((float)100/hpwm->PWM_Value);
// if (pwm_rng < PWM_Calc_Min_Duty(hpwm))
// pwm_rng = PWM_Calc_Min_Duty(hpwm);
// if second channel enabled
if(PWM_Get_Mode(hpwm, PWM_CH_MODE))
{
PWM_Set_Compare1(hpwm, 0); // reset first channel
PWM_Set_Duty_From_Percent(hpwm, hpwm->PWM_Channel2); // set second channel
// __HAL_TIM_SET_COMPARE(&(hpwm->stim.htim), TIM_CHANNEL_2, pwm_rng); // set second channel
}
// if first channel enabled
else
{
// __HAL_TIM_SET_COMPARE(&(hpwm->stim.htim), TIM_CHANNEL_1, pwm_rng); // set second channel
PWM_Set_Duty_From_Percent(hpwm, hpwm->PWM_Channel1); // set first channel
PWM_Set_Compare2(hpwm, 0); // reset second channel
}
}
//-----CHECK CHANNELS FOR ERRORS-----
uint16_t min_duty = PWM_Calc_Min_Duty(hpwm);
// IF FIRST CHANNEL IS ACRIVE
if(PWM_Get_Compare1(hpwm) != 0)
{
// Duty shoud be bigger or equeal than min duration
if (PWM_Get_Compare1(hpwm)<min_duty)
PWM_Set_Compare1(hpwm, min_duty);
// Duty shoud be less or equeal than ARR-min duration
if (PWM_Get_Compare1(hpwm)>PWM_Get_Autoreload(hpwm)-min_duty)
PWM_Set_Compare1(hpwm, PWM_Get_Autoreload(hpwm)-min_duty);
}
// IF SECOND CHANNEL IS ACRIVE
else if(PWM_Get_Compare2(hpwm) != 0)
{
// Duty shoud be bigger or equeal than min duration
if (PWM_Get_Compare2(hpwm)<min_duty)
PWM_Set_Compare2(hpwm, min_duty);
// Duty shoud be less or equeal than ARR
if (PWM_Get_Compare2(hpwm)>PWM_Get_Autoreload(hpwm)-min_duty)
PWM_Set_Compare2(hpwm, PWM_Get_Autoreload(hpwm)-min_duty);
}
// IF BOTH CHANNEL IS ACRIVE
if((PWM_Get_Compare1(hpwm) != 0) && (PWM_Get_Compare2(hpwm) != 0))
{
// Only one channel shoud be active so disable all
PWM_Set_Compare1(hpwm, 0);
PWM_Set_Compare2(hpwm, 0);
}
PWM_SlavePhase_Check_Channels(PWM_Set_pSlaveHandle(hpwm,hpwm2));
PWM_SlavePhase_Check_Channels(PWM_Set_pSlaveHandle(hpwm,hpwm3));
if(hpwm->PWM_DeadTime)
{
PWM_CreateDeadTime(hpwm, &DeadTimeCnt_Master, &ActiveChannelSHDW_Master);
PWM_SlavePhase_CreateDeadTime(PWM_Set_pSlaveHandle(hpwm,hpwm2), &DeadTimeCnt_Slave2, &ActiveChannelSHDW_Slave2);
PWM_SlavePhase_CreateDeadTime(PWM_Set_pSlaveHandle(hpwm,hpwm3), &DeadTimeCnt_Slave3, &ActiveChannelSHDW_Slave3);
}
}
/**
* @brief Update PWM parameters.
* @note Проверка надо ли обновлять параметры ШИМ, и если надо - обновляет их.
* @note This called from TIM_CTRL_Handler
*/
void Update_Params_For_PWM(PWM_HandleTypeDef *hpwm)
{
unsigned UpdateModeParams = 0;
unsigned UpdateLog = 0;
// READ PWM_DC_MODE
if(PWM_Get_Mode(hpwm, PWM_DC_MODE) != (MB_Read_Coil_Local(&coils_regs[0], COIL_PWM_DC_MODE) << PWM_DC_MODE_Pos))
{
if(MB_Read_Coil_Local(&coils_regs[0], COIL_PWM_DC_MODE))
{
hpwm->sPWM_Mode |= PWM_DC_MODE;
}
else
{
hpwm->sPWM_Mode &= ~PWM_DC_MODE;
}
// update mode params
UpdateModeParams = 1;
// update logs params
UpdateLog = 1;
}
// READ PWM_CH_MODE
if(PWM_Get_Mode(hpwm, PWM_CH_MODE) != (MB_Read_Coil_Local(&coils_regs[0], COIL_PWM_CH_MODE) << PWM_CH_MODE_Pos))
{
if(MB_Read_Coil_Local(&coils_regs[0], COIL_PWM_CH_MODE))
{
hpwm->sPWM_Mode |= PWM_CH_MODE;
}
else
{
hpwm->sPWM_Mode &= ~PWM_CH_MODE;
}
// update mode params
UpdateModeParams = 1;
// update logs params
UpdateLog = 1;
}
// READ PWM_CH_MODE
if(PWM_Get_Mode(hpwm, PWM_PHASE_MODE) != (MB_Read_Coil_Local(&coils_regs[0], COIL_PWM_PHASE_MODE) << PWM_PHASE_MODE_Pos))
{
if(MB_Read_Coil_Local(&coils_regs[0], COIL_PWM_PHASE_MODE))
{
hpwm->sPWM_Mode |= PWM_PHASE_MODE;
}
else
{
hpwm->sPWM_Mode &= ~PWM_PHASE_MODE;
}
// update mode params
UpdateModeParams = 1;
// update logs params
UpdateLog = 1;
}
// READ PWM_VALUE
if(hpwm->PWM_Value != int_to_percent(pwm_ctrl[R_PWM_CTRL_PWM_VALUE]))
{
hpwm->PWM_Value = int_to_percent(pwm_ctrl[R_PWM_CTRL_PWM_VALUE]);
// update logs params
UpdateLog = 1;
}
// READ TABLE_SIZE
if(hpwm->Duty_Table_Size != pwm_ctrl[R_PWM_CTRL_SIN_TABLE_SIZE])
{
hpwm->Duty_Table_Size = PWM_Fill_Sine_Table(&hpwm1, pwm_ctrl[R_PWM_CTRL_SIN_TABLE_SIZE]);
pwm_ctrl[R_PWM_CTRL_SIN_TABLE_SIZE] = hpwm->Duty_Table_Size;
}
// READ MIN PULSE DURATION
if(hpwm->PWM_MinPulseDur != pwm_ctrl[R_PWM_CTRL_MIN_PULSE_DUR])
{
hpwm->PWM_MinPulseDur = pwm_ctrl[R_PWM_CTRL_MIN_PULSE_DUR];
// update mode params
UpdateModeParams = 1;
// update logs params
UpdateLog = 1;
}
// READ DEAD TIME
if(hpwm->PWM_DeadTime != pwm_ctrl[R_PWM_CTRL_DEAD_TIME])
{
hpwm->PWM_DeadTime = pwm_ctrl[R_PWM_CTRL_DEAD_TIME];
}
// UPDATE PWM PARAMS
if(UpdateModeParams)
{
// UPDATE DUTY TABLE SCALE
PWM_Update_DutyTableScale(hpwm);
// update logs params
UpdateLog = 1;
}
// UPDATE LOG PARAMS
if(UpdateLog)
{
// set logs params
Set_Log_Params();
}
}
/**
* @brief reInitialization of PWM TIM.
* @param hpwm - указатель на хендл ШИМ.
* @note Перенастраивает таймер согласно принятным настройкам в pwm_ctrl
* ШИМ генерируется на одном канале.
*/
void PWM_Sine_ReInit(PWM_HandleTypeDef *hpwm)
{
Trace_PWM_reInit_Enter();
TIM_Base_MspDeInit(&hpwm->stim.htim);
hpwm1.stim.sTickBaseMHz = TIMER_PWM_TICKBASE;
TIM_Base_Init(&hpwm->stim);
TIM_Output_PWM_Init(&hpwm->stim.htim, &hpwm->sConfigOC, hpwm->PWM_Channel1, hpwm->GPIOx, hpwm->GPIO_PIN_X1);
TIM_Output_PWM_Init(&hpwm->stim.htim, &hpwm->sConfigOC, hpwm->PWM_Channel2, hpwm->GPIOx, hpwm->GPIO_PIN_X2);
PWM_Update_DutyTableScale(hpwm);
//----------TIMERS START-------------
HAL_TIM_Base_Start_IT(&hpwm1.stim.htim); // timer for PWM
HAL_TIM_PWM_Start(&hpwm1.stim.htim, hpwm->PWM_Channel1); // PWM channel 1
HAL_TIM_PWM_Start(&hpwm1.stim.htim, hpwm->PWM_Channel2); // PWM channel 2
Trace_PWM_reInit_Exit();
}
/**
* @brief Getting ind for Duty Table.
* @param hpwm - указатель на хендл ШИМ.
* @param FreqTIM - частота таймера ШИМ.
* @note Рассчитывает индекс для таблицы скважностей.
* PWM_Value в hpwm - частота с которой эта таблица должна выводиться на ШИМ
* @note This called from TIM_PWM_Handler
*/
uint32_t PWM_Get_Duty_Table_Ind(PWM_HandleTypeDef *hpwm, float FreqTIM)
{
float sine_ind_step;
uint32_t sine_ind;
// calc ind for sin table
sine_ind_step = hpwm->Duty_Table_Size/(FreqTIM/hpwm->PWM_Value);
hpwm->Duty_Table_Ind += sine_ind_step;
if(hpwm->Duty_Table_Ind >= hpwm->Duty_Table_Size)
hpwm->Duty_Table_Ind -= hpwm->Duty_Table_Size;
// if its too big (e.g. inf)
if(hpwm->Duty_Table_Ind >= 0xFFFF)
hpwm->Duty_Table_Ind = 0;
return hpwm->Duty_Table_Ind;
}
/**
* @brief Create Dead Time when switches channels.
* @param hpwm - указатель на хендл ШИМ.
*/
void PWM_CreateDeadTime(PWM_HandleTypeDef *hpwm, float *LocalDeadTimeCnt, unsigned *LocalActiveChannel)
{
// get current active channel
hpwm->fActiveChannel = (PWM_Get_Compare2(hpwm) != 0); // if channel two is active - write 1, otherwise - 0
// when channels are swithed and no dead time currently active
if(*LocalActiveChannel != hpwm->fActiveChannel)
{ // update active channel
*LocalActiveChannel = hpwm->fActiveChannel;
// set deadtime
*LocalDeadTimeCnt = hpwm->PWM_DeadTime;
Trace_PWM_DeadTime_Enter();
}
// decrement dead time
*LocalDeadTimeCnt -= (PWM_Get_Autoreload(hpwm)+1)*hpwm->stim.sTickBaseMHz;
if(*LocalDeadTimeCnt > 0) // if dead time is still active
{ // reset all channels
// reset channels
PWM_Set_Compare1(hpwm, 0);
PWM_Set_Compare2(hpwm, 0);
}
else // if dead time is done
{ // set it to zero
*LocalDeadTimeCnt = 0;
Trace_PWM_DeadTime_Exit();
}
}
/**
* @brief Filling table with one period of sinus values.
* @param hpwm - указатель на хендл ШИМ.
* @param table_size - размер таблицы.
* @note Формирует таблицу синусов размером table_size.
*/
uint32_t PWM_Fill_Sine_Table(PWM_HandleTypeDef *hpwm, uint32_t table_size)
{
if((hpwm == NULL) || (hpwm->pDuty_Table_Origin == NULL) || (table_size == 0))
{
return 0;
}
if (table_size > SIN_TABLE_SIZE_MAX)
table_size = SIN_TABLE_SIZE_MAX;
hpwm->Duty_Table_Size = table_size;
float pi_step = 2*M_PI/(hpwm->Duty_Table_Size);
float pi_val = 0;
float sin_koef = 0;
uint32_t sin_val = 0;
// fill table with sinus
for(int i = 0; i < hpwm->Duty_Table_Size; i++)
{
// rotate pi
pi_val += pi_step;
// calc sin value
sin_koef = (float)0xFFFF;
sin_val = (sin(pi_val)+1)*sin_koef/2;
sin_table[i] = sin_val;
}
// fill rest of table with zeros
for(int i = hpwm->Duty_Table_Size; i < SIN_TABLE_SIZE_MAX; i++)
sin_table[i] = 0;
// if second channel is enabled
PWM_Update_DutyTableScale(hpwm);
return hpwm->Duty_Table_Size;
}
/**
* @brief Calc and update new Duty Table Scale.
* @param hpwm - указатель на хендл ШИМ.
* @note Используется, когда изменяется значение регистра ARR.
*/
void PWM_Update_DutyTableScale(PWM_HandleTypeDef *hpwm)
{
// UPDATE DUTY TABLE SCALE
if(PWM_Get_Mode(hpwm, PWM_CH_MODE)) // if second channel is enabled
{
hpwm->Duty_Table_Scale = PWM_Calc_Duty_Scale(&hpwm1, 0x8000);
}
else
{
hpwm->Duty_Table_Scale = PWM_Calc_Duty_Scale(&hpwm1, 0xFFFF);
}
// for case if min pulse dur is too big and scale is negative
if (hpwm->Duty_Table_Scale < 0)
hpwm->Duty_Table_Scale = 1;
}
//-------------------------------------------------------------------
//-----------------------THREEPHASE FUNCTIONS------------------------
/**
* @brief Initialization of Slave PWM TIM.
* @param hspwm - указатель на хендл слейв ШИМ.
* @note Вызывает функции инициализации и включения слейв ШИМ.
*/
void PWM_SlavePhase_Init(PWM_SlaveHandleTypeDef *hspwm)
{
TIM_Base_Init(&hspwm->stim);
TIM_Output_PWM_Init(&hspwm->stim.htim, &hspwm->hMasterPWM->sConfigOC, hspwm->PWM_Channel1, hspwm->GPIOx, hspwm->GPIO_PIN_X1);
TIM_Output_PWM_Init(&hspwm->stim.htim, &hspwm->hMasterPWM->sConfigOC, hspwm->PWM_Channel2, hspwm->GPIOx, hspwm->GPIO_PIN_X2);
// if three phase enables
//----------TIMERS START-------------
HAL_TIM_Base_Start(&hspwm->stim.htim);
HAL_TIM_PWM_Start(&hspwm->stim.htim, hspwm->PWM_Channel1); // PWM channel 1
HAL_TIM_PWM_Start(&hspwm->stim.htim, hspwm->PWM_Channel2); // PWM channel 2
if(PWM_Get_Mode(hspwm->hMasterPWM, PWM_PHASE_MODE) == 0) // if three phase disabled
{
PWM_Set_Compare1(hspwm, 0); // reset first channel
PWM_Set_Compare2(hspwm, 0); // reset second channel
}
}
/**
* @brief reInitialization of Slave PWM TIM.
* @param hspwm - указатель на хендл слейв ШИМ.
* @note Перенастраивает таймер согласно принятным настройкам в pwm_ctrl.
*/
void PWM_SlavePhase_reInit(PWM_SlaveHandleTypeDef *hspwm)
{
PWM_Slave_CopyTimSetting(hspwm, sTimFreqHz);
TIM_Base_MspDeInit(&hspwm->stim.htim);
PWM_SlavePhase_Init(hspwm);
}
/**
* @brief Set Duty from table on Slave PWM at one channel by sin_ind of the Master PWM.
* @param hspwm - указатель на хендл слейв ШИМ.
* @param sin_ind - индекс таблицы для Мастер ШИМ.
* @note Индекс для свейл ШИМ расчитывается в самой функции.
*/
void PWM_SlavePhase_Set_DutyTable_Unsigned(PWM_SlaveHandleTypeDef *hspwm, uint16_t sin_ind)
{
// if three phase enables
if (PWM_Get_Mode(hspwm->hMasterPWM, PWM_PHASE_MODE))
{
if(hspwm->Duty_Shift_Ratio > 0)
sin_ind += hspwm->hMasterPWM->Duty_Table_Size*hspwm->Duty_Shift_Ratio;
else
sin_ind += hspwm->hMasterPWM->Duty_Table_Size*(1+hspwm->Duty_Shift_Ratio);
// overflow check
if(sin_ind > hspwm->hMasterPWM->Duty_Table_Size)
sin_ind -= hspwm->hMasterPWM->Duty_Table_Size;
PWM_Set_SlaveDuty_From_Table(hspwm, sin_ind); // set first channel
}
}
/**
* @brief Set Duty from table on Slave PWM at two channel by sin_ind of the Master PWM.
* @param hspwm - указатель на хендл слейв ШИМ.
* @param sin_ind - индекс таблицы для Мастер ШИМ.
* @note Индекс для свейл ШИМ расчитывается в самой функции.
*/
void PWM_SlavePhase_Set_DutyTable_Signed(PWM_SlaveHandleTypeDef *hspwm, uint16_t sin_ind)
{
int Duty;
// if three phase enables
if (PWM_Get_Mode(hspwm->hMasterPWM, PWM_PHASE_MODE))
{
if(hspwm->Duty_Shift_Ratio > 0)
sin_ind += hspwm->hMasterPWM->Duty_Table_Size*hspwm->Duty_Shift_Ratio;
else
sin_ind += hspwm->hMasterPWM->Duty_Table_Size*(1+hspwm->Duty_Shift_Ratio);
// overflow check
if(sin_ind >= hspwm->hMasterPWM->Duty_Table_Size)
sin_ind -= hspwm->hMasterPWM->Duty_Table_Size;
Duty = PWM_Get_Table_Element_Signed(hspwm->hMasterPWM, sin_ind);
// если это первая полуволна
if(Duty > 0)
{
PWM_Set_Compare1(hspwm, Duty+PWM_Calc_Min_Duty(hspwm->hMasterPWM)); // set first channel
PWM_Set_Compare2(hspwm, 0); // reset second channel
}
else // если это вторая полуволна
{
PWM_Set_Compare1(hspwm, 0); // reset first channel
PWM_Set_Compare2(hspwm, (-Duty)+PWM_Calc_Min_Duty(hspwm->hMasterPWM)); // set second channel
}
//if(hspwm == &hpwm2)
//__ASM("");
}
else // if three phase disabled
{
PWM_Set_Compare1(hspwm, 0); // reset first channel
PWM_Set_Compare2(hspwm, 0); // reset second channel
}
}
/**
* @brief Check is all Slave channels works properly.
* @param hspwm - указатель на хендл слейв ШИМ.
* @note Проверка работает ли только один из каналов, и проверка чтобы CCRx <= ARR
* @note В мастере проверка происходит напрямую в PWM_Handler.
*/
void PWM_SlavePhase_Check_Channels(PWM_SlaveHandleTypeDef *hspwm)
{
// if three phase enables
if (PWM_Get_Mode(hspwm->hMasterPWM, PWM_PHASE_MODE))
{
uint16_t min_duty = PWM_Calc_Min_Duty(hspwm->hMasterPWM);
// IF FIRST CHANNEL IS ACRIVE
if(PWM_Get_Compare1(hspwm) != 0)
{
// Duty shoud be bigger or equeal than min duration
if (PWM_Get_Compare1(hspwm)<min_duty)
PWM_Set_Compare1(hspwm, min_duty);
// Duty shoud be less or equeal than ARR-min duration
if (PWM_Get_Compare1(hspwm)>PWM_Get_Autoreload(hspwm)-min_duty)
PWM_Set_Compare1(hspwm, PWM_Get_Autoreload(hspwm)-min_duty);
}
// IF SECOND CHANNEL IS ACRIVE
else if(PWM_Get_Compare2(hspwm) != 0)
// Duty shoud be bigger or equeal than min duration
if (PWM_Get_Compare2(hspwm)<min_duty)
PWM_Set_Compare2(hspwm, min_duty);
// Duty shoud be less or equeal than ARR
if (PWM_Get_Compare2(hspwm)>PWM_Get_Autoreload(hspwm)-min_duty)
PWM_Set_Compare2(hspwm, PWM_Get_Autoreload(hspwm)-min_duty);
// IF BOTH CHANNEL IS ACRIVE
if((PWM_Get_Compare1(hspwm) != 0) && (PWM_Get_Compare2(hspwm) != 0))
{
// Only one channel shoud be active so disable all
PWM_Set_Compare1(hspwm, 0);
PWM_Set_Compare2(hspwm, 0);
}
}
else
{
// reset channels
PWM_Set_Compare1(hspwm, 0); // reset first channel
PWM_Set_Compare2(hspwm, 0); // reset second channel
}
}
/**
* @brief Create Dead Time for Slave PWM when switches channels.
* @param hspwm - указатель на хендл слейв ШИМ.
* @param LocalDeadTimeCnt - указатель на переменную для отсчитывания дедтайма.
* @param LocalActiveChannel - указатель на переменную для отслеживания смены канала.
* @note Аналог функции PWM_CreateDeadTime но для слейв ШИМов.
*/
void PWM_SlavePhase_CreateDeadTime(PWM_SlaveHandleTypeDef *hspwm, float *LocalDeadTimeCnt, unsigned *LocalActiveChannel)
{
// get current active channel
hspwm->fActiveChannel = (PWM_Get_Compare2(hspwm) != 0); // if channel two is active - write 1, otherwise - 0
// when channels are swithed and no dead time currently active
if(*LocalActiveChannel != hspwm->fActiveChannel)
{ // update active channel
*LocalActiveChannel = hspwm->fActiveChannel;
// set deadtime
*LocalDeadTimeCnt = hspwm->hMasterPWM->PWM_DeadTime;
Trace_PWM_DeadTime_Enter();
}
// decrement dead time
*LocalDeadTimeCnt -= (PWM_Get_Autoreload(hspwm)+1)*hspwm->hMasterPWM->stim.sTickBaseMHz;
if(*LocalDeadTimeCnt > 0) // if dead time is still active
{ // reset all channels
// reset channels
PWM_Set_Compare1(hspwm, 0);
PWM_Set_Compare2(hspwm, 0);
}
else // if dead time is done
{ // set it to zero
*LocalDeadTimeCnt = 0;
Trace_PWM_DeadTime_Exit();
}
}
//-------------------------------------------------------------------
//------------------------HANDLERS FUNCTIONS-------------------------
//---------------PWM TIMER-----------------
#if (PWM_MASTER_TIM_NUMB == 1) || (PWM_MASTER_TIM_NUMB == 10) // choose handler for TIM
void TIM1_UP_TIM10_IRQHandler(void)
#elif (PWM_MASTER_TIM_NUMB == 2)
void TIM2_IRQHandler(void)
#elif (PWM_MASTER_TIM_NUMB == 3)
void TIM3_IRQHandler(void)
#elif (PWM_MASTER_TIM_NUMB == 4)
void TIM4_IRQHandler(void)
#elif (PWM_MASTER_TIM_NUMB == 5)
void TIM5_IRQHandler(void)
#elif (PWM_MASTER_TIM_NUMB == 6)
void TIM6_DAC_IRQHandler(void)
#elif (PWM_MASTER_TIM_NUMB == 7)
void TIM7_IRQHandler(void)
#elif (PWM_MASTER_TIM_NUMB == 8) || (PWM_MASTER_TIM_NUMB == 13)
void TIM8_UP_TIM13_IRQHandler(void)
#elif (PWM_MASTER_TIM_NUMB == 1) || (PWM_MASTER_TIM_NUMB == 9)
void TIM1_BRK_TIM9_IRQHandler(void)
#elif (PWM_MASTER_TIM_NUMB == 1) || (PWM_MASTER_TIM_NUMB == 11)
void TIM1_TRG_COM_TIM11_IRQHandler(void)
#elif (PWM_MASTER_TIM_NUMB == 8) || (PWM_MASTER_TIM_NUMB == 12)
void TIM8_BRK_TIM12_IRQHandler(void)
#elif (PWM_MASTER_TIM_NUMB == 8) || (PWM_MASTER_TIM_NUMB == 14)
void TIM8_TRG_COM_TIM14_IRQHandler(void)
#endif
{
Trace_PWM_TIM_Enter();
HAL_TIM_IRQHandler(&hpwm1.stim.htim);
PWM_Handler(&hpwm1);
Trace_PWM_TIM_Exit();
}
//-------------------------------------------------------------------
//-------------------------------------------------------------------
//-----------------------------OUTDATE-------------------------------
#ifdef OUTDATE
/**
* @brief First set up of PWM Single Channel.
* @note Первый инит ШИМ. Заполняет структуры и инициализирует таймер для генерации синуоидального ШИМ.
* Скважность ШИМ меняется по закону синусоиды, сдвинутой в положительную область (от 0 до 2)
* ШИМ генерируется на одном канале.
* @note This called from main
*/
void PWM_SineSingChannel_FirstInit(void)
{
hpwm1.pDuty_Table_Origin = SIN_TABLE_ORIGIN;
//---------PWM TIMER1 INIT------------
// channel settings
hpwm1.sConfigOC.OCMode = TIM_OCMODE_PWM1;
hpwm1.sConfigOC.Pulse = 0;
hpwm1.sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
hpwm1.sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
// tim1 settings
hpwm1.stim.htim.Instance = TIMER_PWM1_INSTANCE;
hpwm1.stim.sTimMode = TIM_IT_MODE;
hpwm1.stim.sTickBaseMHz = TIM_TickBase_1US;
hpwm1.stim.sTimAHBFreqMHz = 72;
hpwm1.stim.sTimFreqHz = HZ_TIMER_PWM;
hpwm1.GPIOx = GPIOD;
hpwm1.GPIO_PIN_X1 = GPIO_PIN_12;
TIM_Base_Init(&hpwm1.stim);
TIM_Output_PWM_Init(&hpwm1.stim.htim, &hpwm1.sConfigOC, hpwm->PWM_Channel1, hpwm1.GPIOx, hpwm1.GPIO_PIN_X1);
//----------TIMERS START-------------
HAL_TIM_PWM_Start_IT(&hpwm1.stim.htim, hpwm->PWM_Channel1); // timer for PWM
}
#ifdef SINE_THREE_PHASE_PWM_ENABLE
//---------PWM TIMER2 INIT------------
// tim2 settings
hpwm2 = hpwm1;
hpwm2.stim.htim.Instance = TIM5;
hpwm2.GPIOx = GPIOA;
hpwm2.GPIO_PIN_X = GPIO_PIN_0;
TIM_Base_Init(&hpwm2.stim);
TIM_Output_PWM_Init(&hpwm2.stim.htim, &hpwm2.sConfigOC, TIM_CHANNEL_1, hpwm2.GPIOx, hpwm2.GPIO_PIN_X);
//---------PWM TIMER3 INIT------------
// tim3 settings
hpwm3 = hpwm2;
hpwm3.stim.htim.Instance = TIM8;
hpwm3.GPIOx = GPIOC;
hpwm3.GPIO_PIN_X = GPIO_PIN_6;
TIM_Base_Init(&hpwm3.stim);
TIM_Output_PWM_Init(&hpwm3.stim.htim, &hpwm3.sConfigOC, TIM_CHANNEL_1, hpwm3.GPIOx, hpwm3.GPIO_PIN_X);
HAL_TIM_PWM_Start(&hpwm2.stim.htim, TIM_CHANNEL_1); // timer for PWM
HAL_TIM_PWM_Start(&hpwm3.stim.htim, TIM_CHANNEL_1); // timer for PWM
#endif // SINE_THREE_PHASE_PWM_ENABLE
void PWM_Threephase_Init(void)
{
#ifdef INTERNAL_THREE_PHASE_PWM_ENABLE
TIM_OC_InitTypeDef sPWMConfigOC = {0};
TIM_OC_InitTypeDef sOCConfigOC = {0};
int us100Time = 10000/TIM_CTRL.sTimFreqHz; // 1/TIM_CTRL.sTimFreqHz * 10^6 - Sample time in us
// PWM CHANNEL SETTINGS
sPWMConfigOC.OCMode = TIM_OCMODE_PWM1;
sPWMConfigOC.Pulse = us100Time/2;
sPWMConfigOC.OCPolarity = TIM_OCPOLARITY_LOW;
sPWMConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
// CC CHANNEL SETTINGS
sOCConfigOC.OCMode = TIM_OCMODE_ACTIVE;
sOCConfigOC.Pulse = (2*us100Time-1) / 3;
sOCConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
// TIMER1 PWM MASTER INIT
TIM_3PWM1.htim = &tim_3pwm1;
TIM_3PWM1.htim->Instance = TIM1;
TIM_3PWM1.htim->Init.Prescaler = 7200-1; // 1 us
TIM_3PWM1.htim->Init.Period = us100Time-1; // period in us = Sample time in us
TIM_3PWM1.sMasterConfig.MasterOutputTrigger = TIM_TRGO_OC2REF;
TIM_3PWM1.sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
TIM_3PWM1.sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
TIM_Base_Init(&TIM_3PWM1);
TIM_Output_PWM_Init(TIM_3PWM1.htim, &sPWMConfigOC, TIM_CHANNEL_1, GPIOE, GPIO_PIN_9);
HAL_TIM_OC_ConfigChannel(TIM_3PWM1.htim, &sOCConfigOC, TIM_CHANNEL_2);
// TIMER2 PWM SLAVE INIT
TIM_3PWM2 = TIM_3PWM1;
TIM_3PWM2.htim = &tim_3pwm2;
*TIM_3PWM2.htim = *TIM_3PWM1.htim;
TIM_3PWM2.htim->Instance = TIM2;
TIM_3PWM1.TIM_MODE = TIM_DEFAULT;
TIM_3PWM2.sSlaveConfig.SlaveMode = TIM_SLAVEMODE_TRIGGER;
TIM_3PWM2.sSlaveConfig.InputTrigger = TIM_TS_ITR0;
TIM_Base_Init(&TIM_3PWM2);
TIM_Output_PWM_Init(TIM_3PWM2.htim, &sPWMConfigOC, TIM_CHANNEL_1, GPIOA, GPIO_PIN_5);
HAL_TIM_OC_ConfigChannel(TIM_3PWM2.htim, &sOCConfigOC, TIM_CHANNEL_2);
// TIMER3 PWM SLAVE INIT
TIM_3PWM3 = TIM_3PWM2;
TIM_3PWM3.htim = &tim_3pwm3;
*TIM_3PWM3.htim = *TIM_3PWM2.htim;
TIM_3PWM3.htim->Instance = TIM3;
TIM_3PWM3.sSlaveConfig.InputTrigger = TIM_TS_ITR1;
TIM_Base_Init(&TIM_3PWM3);
TIM_Output_PWM_Init(TIM_3PWM3.htim, &sPWMConfigOC, TIM_CHANNEL_1, GPIOA, GPIO_PIN_6);
hpwm1.Duty_Table_Size = PWM_Fill_Sine_Table(&sin_table, SIN_TABLE_SIZE_MAX);
// TIMERS START
HAL_TIM_OC_Start(TIM_3PWM3.htim, TIM_CHANNEL_2);
HAL_TIM_PWM_Start(TIM_3PWM3.htim, TIM_CHANNEL_1);
HAL_TIM_PWM_Start(TIM_3PWM2.htim, TIM_CHANNEL_1);
HAL_TIM_OC_Start(TIM_3PWM2.htim, TIM_CHANNEL_2);
HAL_TIM_OC_Start(TIM_3PWM1.htim, TIM_CHANNEL_2);
HAL_TIM_PWM_Start(TIM_3PWM1.htim, TIM_CHANNEL_1);
#endif // INTERNAL_THREE_PHASE_PWM_ENABLE
}
#endif

324
Code/PWM/pwm.h
View File

@ -1,324 +0,0 @@
/********************************MODBUS*************************************
Данный файл содержит объявления базовых функции и дефайны для реализации
MODBUS.
Данный файл необходимо подключить в rs_message.h. После подключать rs_message.h
к основному проекту.
***************************************************************************/
#ifndef __PWM_H_
#define __PWM_H_
#include "control.h"
extern uint32_t sin_table[SIN_TABLE_SIZE_MAX];
#define int_to_percent(_int_) ((float)_int_/100)
/////////////////////////////////////////////////////////////////////
////////////////////////////---DEFINES---////////////////////////////
//----------------------------PWM HANDLE----------------------------//
/**
* @brief Calc duration of minimum pulse in ticks.
* @param _hpwm_ - указатель на хендл pwm.
* @return _val_ - количество тиков кратчайшего импульса.
*/
#define PWM_Calc_Min_Duty(_hpwm_) ((_hpwm_)->PWM_MinPulseDur/(_hpwm_)->stim.sTickBaseMHz)
/**
* @brief Calc Scale Koef for Table & AUTORELOAD REGISTER
* @param _hpwm_ - указатель на хендл pwm.
* @param _scale_ - верхняя граница диапазона значений.
* @return _koef_ - коэффициент для масштабирования.
* @note Данный макрос рассчитывает коэффициент для приведения значений с диапазоном [0,_scale_]
к регистру автозагрузки с диапазоном [0,ARR].
* @note Если задана минимальная длительность импульса в тактах n, она вычитается из ARR: [0, ARR-2*n]
И потом регистр ARR заполняется так, что диапазон его значений будет [n, ARR-n] @ref PWM_Get_Table_Element_Unsigned
*/
#define PWM_Calc_Duty_Scale(_hpwm_, _scale_) ((float)PWM_Get_Autoreload(_hpwm_))/(_scale_)
/**
* @brief Get Table Element Scaled corresponding to TIM ARR register
* @param _hpwm_ - указатель на хендл pwm.
* @param _ind_ - номер элемента из таблицы скважностей.
* @return _val_ - масштабированный под регистры таймера значение.
* @note Если задана минимальная длительность импульса в тактах n,
то регистр ARR заполняется так, что диапазон его значений будет [n, ARR-n]
*/
#define PWM_Get_Table_Element_Unsigned(_hpwm_,_ind_) (*((_hpwm_)->pDuty_Table_Origin+_ind_)*((_hpwm_)->Duty_Table_Scale))
/**
* @brief Get Table Element Scaled and Shifted corresponding to TIM ARR register
* @param _hpwm_ - указатель на хендл pwm.
* @param _ind_ - номер элемента из таблицы скважностей.
* @return _val_ - масштабированный под регистры таймера значение.
* @note По сути такая же как PWM_Get_Table_Element_Unsigned но добавляется сдвиг на одну амплитуду для учитывания знака.
(если точнее, то сдвиг добавляется для компенсации сдвига, который имитирует знак)
* @note 0x8000*(_hpwm_)->Duty_Table_Scale - т.к. первая полуволна находится в диапазоне (0x8000-0xFFFF) вычитаем константу 0x8000 с масштабированием
*/
#define PWM_Get_Table_Element_Signed(_hpwm_,_ind_) ((int)(*((_hpwm_)->pDuty_Table_Origin+_ind_)*((_hpwm_)->Duty_Table_Scale))-0x8000*(_hpwm_)->Duty_Table_Scale)
/**
* @brief Create pointer to slave PWM from pointer to void in PWM_HandleTypeDef.
* @param _hpwm_ - указатель на хендл pwm.
* @param _slavepwm_ - имя слейв pwm.
* @return _pslavepwm_ - указатель на структуру PWM_SlaveHandleTypeDef.
*/
#define PWM_Set_pSlaveHandle(_hpwm_,_slavepwm_) ((PWM_SlaveHandleTypeDef *)_hpwm_->_slavepwm_)
/**
* @brief Copy setting from master TIM_SettingsTypeDef to slave TIM_SettingsTypeDef.
* @param _hpwm_ - указатель на хендл pwm.
* @return _set_ - имя настройки.
*/
#define PWM_Slave_CopyTimSetting(_hspwm_, _set_) ((_hspwm_)->stim._set_ = (_hspwm_)->hMasterPWM->stim._set_)
//---------------------------TIMER REGS----------------------------//
/**
* @brief Set PWM autoreload value (max duty value).
* @param _hpwm_ - указатель на хендл pwm.
* @param _val_ - значение, которое нужно записать в Compare.
*/
#define PWM_Get_Autoreload(_hpwm_) __HAL_TIM_GET_AUTORELOAD(&((_hpwm_)->stim.htim))
/**
* @brief Get PWM Duty on corresponding channel.
* @param _hpwm_ - указатель на хендл pwm.
* @param _val_ - значение, которое нужно записать в Compare.
*/
#define PWM_Get_Compare1(_hpwm_) __HAL_TIM_GET_COMPARE(&((_hpwm_)->stim.htim), (_hpwm_)->PWM_Channel1)
#define PWM_Get_Compare2(_hpwm_) __HAL_TIM_GET_COMPARE(&((_hpwm_)->stim.htim), (_hpwm_)->PWM_Channel2)
/**
* @brief Set PWM Duty on corresponding channel.
* @param _hpwm_ - указатель на хендл pwm.
* @param _val_ - значение, которое нужно записать в Compare.
*/
#define PWM_Set_Compare1(_hpwm_, _val_) __HAL_TIM_SET_COMPARE(&((_hpwm_)->stim.htim), (_hpwm_)->PWM_Channel1, (_val_))
#define PWM_Set_Compare2(_hpwm_, _val_) __HAL_TIM_SET_COMPARE(&((_hpwm_)->stim.htim), (_hpwm_)->PWM_Channel2, (_val_))
/**
* @brief Set PWM Duty From PWM_Value Percent
* @param _hpwm_ - указатель на хендл pwm.
* @param _channel_ - канал для выставления скважности.
* @param _ind_ - номер элемента из таблицы скважностей.
*/
#define PWM_Set_Duty_From_Percent(_hpwm_, _channel_) __HAL_TIM_SET_COMPARE(&((_hpwm_)->stim.htim), _channel_, ((_hpwm_)->PWM_Value/100)*(PWM_Get_Autoreload(_hpwm_)+1))
/**
* @brief Set PWM Duty From table
* @param _hpwm_ - указатель на хендл pwm.
* @param _channel_ - канал для выставления скважности.
* @param _ind_ - номер элемента из таблицы скважностей.
*/
#define PWM_Set_Duty_From_Table(_hpwm_, _ind_) (PWM_Set_Compare1(_hpwm_, (PWM_Get_Table_Element_Unsigned((_hpwm_), (_ind_))+1)))
/**
* @brief Set PWM Duty From table
* @param _hpwm_ - указатель на хендл pwm.
* @param _channel_ - канал для выставления скважности.
* @param _ind_ - номер элемента из таблицы скважностей.
*/
#define PWM_Set_SlaveDuty_From_Table(_hpwm_, _ind_) (PWM_Set_Compare1(_hpwm_, (PWM_Get_Table_Element_Unsigned((_hpwm_)->hMasterPWM, (_ind_))+1)))
// MODE DEFINES
#define PWM_DC_MODE_Pos (0)
#define PWM_CH_MODE_Pos (1)
#define PWM_PHASE_MODE_Pos (2)
#define PWM_DC_MODE (1<<(PWM_DC_MODE_Pos)) // 0 - set pwm duty from table with PWM_Value period, 1 - set pwm duty PWM_Value (in percent)
#define PWM_CH_MODE (1<<(PWM_CH_MODE_Pos))
// DC MODE: 0 - pwm on channel 1, 1 - pwm on channel 2
// TABLE MODE: 0 - signed mode, 1 - unsigned mode
#define PWM_PHASE_MODE (1<<(PWM_PHASE_MODE_Pos))
#define PWM_Get_Mode(_hpwm_, _mode_) ((_hpwm_)->sPWM_Mode&(_mode_))
/* Structure for PWM modes */
typedef enum
{
PWM_TABLE_UNSIGN = 0, /* set pwm duty from table with PWM_Value period */
PWM_TABLE_SIGN = PWM_CH_MODE, /* set pwm duty from table with PWM_Value period on two channels (positive and negative halfes) */
PWM_DC_POS = PWM_DC_MODE, /* set pwm duty PWM_Value (in percent) on first channel */
PWM_DC_NEG = PWM_DC_MODE|PWM_CH_MODE, /* set pwm duty PWM_Value (in percent) on second channel */
PWM_PHASE_UNSIGN = PWM_PHASE_MODE, /* set pwm table duty on three pins, with requested shift */
PWM_PHASE_SIGN = PWM_CH_MODE|PWM_PHASE_MODE, /* set pwm table duty on six pins (two pins = one phase (positive and negative halfes)) */
}PWM_ModeTypeDef;
/**
* @brief Handle for PWM.
* @note Prefixes: h - handle, s - settings, f - flag
*/
typedef struct // PWM_HandleTypeDef
{
/* PWM VARIABLES */
PWM_ModeTypeDef sPWM_Mode; /* PWM Mode: 0 - DC mode, 1 - Table mode */
float PWM_Value; /* DC mode: PWM duty, Table mode: frequency*/
uint32_t PWM_MinPulseDur; /* minimum pulse duration for PWM in us*/
uint32_t PWM_DeadTime; /* dead-Time between switches half waves (channels) in us */
/* SETTINGS FOR TIMER */
TIM_SettingsTypeDef stim; /* settings for TIM */
TIM_OC_InitTypeDef sConfigOC; /* settings for oc channel */
unsigned fActiveChannel; /* flag for active oc channel: 0 - first channel, 1 - second channel */
uint16_t PWM_Channel1; /* instance of first channel */
uint16_t PWM_Channel2; /* instance of second channel */
/* VARIABLES FOR TABLE DUTY PARAMETERS */
uint32_t *pDuty_Table_Origin; /* pointer to table of pwm duties */
uint32_t Duty_Table_Size; /* size of duty table */
float Duty_Table_Ind; /* current ind of duty table */
float Duty_Table_Scale; /* scale for TIM ARR register */
/* SETTIGNS FOR PWM OUTPUT */
GPIO_TypeDef *GPIOx; /* GPIO port for PWM output */
uint32_t GPIO_PIN_X1; /* GPIO pin for PWM output */
uint32_t GPIO_PIN_X2; /* GPIO pin for PWM output (second half wave) */
/* SLAVES PWM */
void *hpwm2;
void *hpwm3;
}PWM_HandleTypeDef;
extern PWM_HandleTypeDef hpwm1;
/**
* @brief Handle for Slave PWM.
* @note Prefixes: h - handle, s - settings, f - flag
*/
typedef struct // PWM_SlaveHandleTypeDef
{
/* MASTER PWM*/
PWM_HandleTypeDef *hMasterPWM; /* master pwm handle */
/* SETTINGS FOR TIMER */
TIM_SettingsTypeDef stim; /* slave tim handle */
unsigned fActiveChannel; /* flag for active oc channel: 0 - first channel, 1 - second channel */
uint16_t PWM_Channel1; /* instance of first channel */
uint16_t PWM_Channel2; /* instance of second channel */
/* VARIABLES FOR TABLE DUTY PARAMETERS */
float Duty_Table_Ind; /* current ind of duty table */
float Duty_Shift_Ratio; /* Ratio of table shift: 0.5 shift - shift = Table_Size/2 */
/* SETTIGNS FOR PWM OUTPUT */
GPIO_TypeDef *GPIOx; /* GPIO port for PWM output */
uint32_t GPIO_PIN_X1; /* GPIO pin for PWM output */
uint32_t GPIO_PIN_X2; /* GPIO pin for PWM output (second half wave) */
}PWM_SlaveHandleTypeDef;
extern PWM_SlaveHandleTypeDef hpwm2;
extern PWM_SlaveHandleTypeDef hpwm3;
//--------------------------------PWM FUNCTIONS----------------------------------
/**
* @brief reInitialization of PWM TIM.
* @param hpwm - указатель на хендл ШИМ.
* @note Перенастраивает таймер согласно принятным настройкам в pwm_ctrl.
*/
void PWM_Sine_ReInit(PWM_HandleTypeDef *hpwm);
/**
* @brief Initialization of Slave PWM TIM.
* @param hspwm - указатель на хендл слейв ШИМ.
* @note Вызывает функции инициализации и включения слейв ШИМ.
*/
void PWM_SlavePhase_Init(PWM_SlaveHandleTypeDef *hspwm);
/**
* @brief reInitialization of Slave PWM TIM.
* @param hspwm - указатель на хендл слейв ШИМ.
* @note Перенастраивает таймер согласно принятным настройкам в pwm_ctrl.
*/
void PWM_SlavePhase_reInit(PWM_SlaveHandleTypeDef *hspwm);
/**
* @brief Filling table with one period of sinus values.
* @param hpwm - указатель на хендл ШИМ.
* @param table_size - размер таблицы.
* @note Формирует таблицу синусов размером table_size.
*/
uint32_t PWM_Fill_Sine_Table(PWM_HandleTypeDef *hpwm, uint32_t table_size);
/**
* @brief Calc and update new Duty Table Scale.
* @param hpwm - указатель на хендл ШИМ.
* @note Используется, когда изменяется значение регистра ARR.
*/
void PWM_Update_DutyTableScale(PWM_HandleTypeDef *hpwm);
//---------------------this called from TIM_PWM_Handler()------------------------
// MASTER PWM FUNCTIONS
/**
* @brief PWM Handler.
* @param hpwm - указатель на хендл ШИМ.
* @note Управляет скважность ШИМ в режиме PWM_TABLE.
* @note This called from TIM_PWM_Handler
*/
void PWM_Handler(PWM_HandleTypeDef *hpwm);
/**
* @brief Getting ind for Duty Table.
* @param hpwm - указатель на хендл ШИМ.
* @param FreqTIM - частота таймера ШИМ.
* @note Рассчитывает индекс для таблицы скважностей.
* PWM_Value в hpwm - частота с которой эта таблица должна выводиться на ШИМ
* @note This called from TIM_PWM_Handler
*/
uint32_t PWM_Get_Duty_Table_Ind(PWM_HandleTypeDef *hpwm, float FreqTIM);
/**
* @brief Create Dead Time when switches channels.
* @param hpwm - указатель на хендл ШИМ.
* @param LocalDeadTimeCnt - указатель на переменную для отсчитывания дедтайма.
* @param LocalActiveChannel - указатель на переменную для отслеживания смены канала.
*/
void PWM_CreateDeadTime(PWM_HandleTypeDef *hpwm, float *LocalDeadTimeCnt, unsigned *LocalActiveChannel);
// SLAVE PWM FUNCTIONS
/**
* @brief Set Duty from table on Slave PWM at one channel by sin_ind of the Master PWM.
* @param hspwm - указатель на хендл слейв ШИМ.
* @param sin_ind - индекс таблицы для Мастер ШИМ.
* @note Индекс для свейл ШИМ расчитывается в самой функции.
*/
void PWM_SlavePhase_Set_DutyTable_Unsigned(PWM_SlaveHandleTypeDef *hspwm, uint16_t sin_ind);
/**
* @brief Set Duty from table on Slave PWM at two channel by sin_ind of the Master PWM.
* @param hspwm - указатель на хендл слейв ШИМ.
* @param sin_ind - индекс таблицы для Мастер ШИМ.
* @note Индекс для свейл ШИМ расчитывается в самой функции.
*/
void PWM_SlavePhase_Set_DutyTable_Signed(PWM_SlaveHandleTypeDef *hspwm, uint16_t sin_ind);
/**
* @brief Check is all Slave channels works properly.
* @param hspwm - указатель на хендл слейв ШИМ.
* @note Проверка работает ли только один из каналов, и проверка чтобы CCRx <= ARR
* @note В мастере проверка происходит напрямую в PWM_Handler.
*/
void PWM_SlavePhase_Check_Channels(PWM_SlaveHandleTypeDef *hspwm);
/**
* @brief Create Dead Time for Slave PWM when switches channels.
* @param hspwm - указатель на хендл слейв ШИМ.
* @param LocalDeadTimeCnt - указатель на переменную для отсчитывания дедтайма.
* @param LocalActiveChannel - указатель на переменную для отслеживания смены канала.
* @note Аналог функции PWM_CreateDeadTime но для слейв ШИМов.
*/
void PWM_SlavePhase_CreateDeadTime(PWM_SlaveHandleTypeDef *hspwm, float *LocalDeadTimeCnt, unsigned *LocalActiveChannel);
//---------------------this called from TIM_CTRL_Handler()-----------------------
/**
* @brief Update PWM parameters.
* @param hpwm - указатель на хендл ШИМ.
* @note Проверка надо ли обновлять параметры ШИМ, и если надо - обновляет их.
* @note This called from TIM_CTRL_Handler
*/
void Update_Params_For_PWM(PWM_HandleTypeDef *hpwm);
//---------------------------this called from main()-----------------------------
/**
* @brief First set up of PWM Two Channel.
* @note Первый инит ШИМ. Заполняет структуры и инициализирует таймер для генерации синуоидального ШИМ.
* Скважность ШИМ меняется по закону синусоиды, каждый канал генерирует свой полупериод синуса (от -1 до 0 И от 0 до 1)
* ШИМ генерируется на одном канале.
* @note This called from main OR by setted coil
*/
void PWM_Sine_FirstInit(void);
#endif // __PWM_H_

265
Code/PWM/settings.c
View File

@ -1,265 +0,0 @@
#include "control.h"
ProjectSettings_TypeDef PROJSET;
uint32_t PageError = 0x00;
uint8_t UpdateSettings = 0;
void WriteSettingsToMem(void)
{
FillStructWithDefines();
//HAL_FLASH_Unlock();
//
//CheckSettingsInFLASH();
//
//if(CheckIsSettingsValid(&PROJSET)) // if new settings are invalid
// PROJSET = *PROJSET_MEM; // take the old settings from mem
//else // if new settings are valid
// SetFlagUpdateSettingsInMem(); // save the new settings in mem (set flag to do this)
//
//HAL_FLASH_Lock();
}
void SetFlagUpdateSettingsInMem(void)
{
//UpdateSettings = 0;
//// MODBUS settings
//if(PROJSET_MEM->MB_DEVICE_ID != PROJSET.MB_DEVICE_ID)
// UpdateSettings = 1;
//if(PROJSET_MEM->MB_SPEED != PROJSET.MB_SPEED)
// UpdateSettings = 1;
//if(PROJSET_MEM->MB_GPIOX != PROJSET.MB_GPIOX)
// UpdateSettings = 1;
//if(PROJSET_MEM->MB_GPIO_PIN_RX != PROJSET.MB_GPIO_PIN_RX)
// UpdateSettings = 1;
//if(PROJSET_MEM->MB_GPIO_PIN_RX != PROJSET.MB_GPIO_PIN_RX)
// UpdateSettings = 1;
//if(PROJSET_MEM->MB_MAX_TIMEOUT != PROJSET.MB_MAX_TIMEOUT)
// UpdateSettings = 1;
//
//// PWM settings
//if(PROJSET_MEM->TIM_PWM_TICKBASE != PROJSET.TIM_PWM_TICKBASE)
// UpdateSettings = 1;
//if(PROJSET_MEM->TIM_PWM_AHB_FREQ != PROJSET.TIM_PWM_AHB_FREQ)
// UpdateSettings = 1;
//
//if(PROJSET_MEM->TIM_PWM1_TIM_CHANNEL1 != PROJSET.TIM_PWM1_TIM_CHANNEL1)
// UpdateSettings = 1;
//if(PROJSET_MEM->TIM_PWM1_TIM_CHANNEL2 != PROJSET.TIM_PWM1_TIM_CHANNEL2)
// UpdateSettings = 1;
//if(PROJSET_MEM->TIM_PWM1_GPIOx != PROJSET.TIM_PWM1_GPIOx)
// UpdateSettings = 1;
//if(PROJSET_MEM->TIM_PWM1_GPIO_PIN_X1 != PROJSET.TIM_PWM1_GPIO_PIN_X1)
// UpdateSettings = 1;
//if(PROJSET_MEM->TIM_PWM1_GPIO_PIN_X2 != PROJSET.TIM_PWM1_GPIO_PIN_X2)
// UpdateSettings = 1;
//
//if(PROJSET_MEM->TIM_PWM2_INSTANCE != PROJSET.TIM_PWM2_INSTANCE)
// UpdateSettings = 1;
//if(PROJSET_MEM->TIM_PWM2_TIM_CHANNEL1 != PROJSET.TIM_PWM2_TIM_CHANNEL1)
// UpdateSettings = 1;
//if(PROJSET_MEM->TIM_PWM2_TIM_CHANNEL2 != PROJSET.TIM_PWM2_TIM_CHANNEL2)
// UpdateSettings = 1;
//if(PROJSET_MEM->TIM_PWM2_GPIOx != PROJSET.TIM_PWM2_GPIOx)
// UpdateSettings = 1;
//if(PROJSET_MEM->TIM_PWM2_GPIO_PIN_X1 != PROJSET.TIM_PWM2_GPIO_PIN_X1)
// UpdateSettings = 1;
//if(PROJSET_MEM->TIM_PWM2_GPIO_PIN_X2 != PROJSET.TIM_PWM2_GPIO_PIN_X2)
// UpdateSettings = 1;
//
//if(PROJSET_MEM->TIM_PWM3_INSTANCE != PROJSET.TIM_PWM3_INSTANCE)
// UpdateSettings = 1;
//if(PROJSET_MEM->TIM_PWM3_TIM_CHANNEL1 != PROJSET.TIM_PWM3_TIM_CHANNEL1)
// UpdateSettings = 1;
//if(PROJSET_MEM->TIM_PWM3_TIM_CHANNEL2 != PROJSET.TIM_PWM3_TIM_CHANNEL2)
// UpdateSettings = 1;
//if(PROJSET_MEM->TIM_PWM3_GPIOx != PROJSET.TIM_PWM3_GPIOx)
// UpdateSettings = 1;
//if(PROJSET_MEM->TIM_PWM3_GPIO_PIN_X1 != PROJSET.TIM_PWM3_GPIO_PIN_X1)
// UpdateSettings = 1;
//if(PROJSET_MEM->TIM_PWM3_GPIO_PIN_X2 != PROJSET.TIM_PWM3_GPIO_PIN_X2)
// UpdateSettings = 1;
//
//// CTRL settings
//if(PROJSET_MEM->TIM_CTRL_TICKBASE != PROJSET.TIM_CTRL_TICKBASE)
// UpdateSettings = 1;
//if(PROJSET_MEM->TIM_CTRL_AHB_FREQ != PROJSET.TIM_CTRL_AHB_FREQ)
// UpdateSettings = 1;
}
void UpdateSettingsInMem(void)
{
//if(UpdateSettings)
//{
// FLASH_EraseInitTypeDef EraseInitStruct;
// PageError = 0x00;
//
// EraseInitStruct.TypeErase = FLASH_TYPEERASE_SECTORS;// erase pages
// EraseInitStruct.Banks = FLASH_BANK_1;
// EraseInitStruct.Sector = FLASH_SECTOR_4; //first sector for erase
// EraseInitStruct.NbSectors = 1;// num of sector that need to be erased
//
// HAL_FLASH_Unlock();
// HAL_FLASHEx_Erase(&EraseInitStruct, &PageError);
//
//
// /* Wait for last operation to be completed */
// if(FLASH_WaitForLastOperation((uint32_t)50000U) == HAL_OK)
// {
// /* If the previous operation is completed, proceed to program the new data */
// CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
// FLASH->CR |= FLASH_PSIZE_WORD;
// FLASH->CR |= FLASH_CR_PG;
// *PROJSET_MEM = PROJSET; // save the new settings in mem
// }
// HAL_FLASH_Lock();
// UpdateSettings = 0;
//}
}
void FillSettingsWithDefines(void)
{
// rewrite all setting corresponding to defines
//FLASH_EraseInitTypeDef EraseInitStruct;
//PageError = 0x00;
//
//EraseInitStruct.TypeErase = FLASH_TYPEERASE_SECTORS;// erase pages
//EraseInitStruct.Banks = FLASH_BANK_1;
//EraseInitStruct.Sector = FLASH_SECTOR_4; //first sector for erase
//EraseInitStruct.NbSectors = 1;// num of sector that need to be erased
//
//HAL_FLASH_Unlock();
//HAL_FLASHEx_Erase(&EraseInitStruct, &PageError);
//// MODBUS settings
//FLASH_WRITE_SETTING(PROJSET_MEM->MB_DEVICE_ID, MODBUS_DEVICE_ID);
//FLASH_WRITE_SETTING(PROJSET_MEM->MB_SPEED, MODBUS_SPEED);
//FLASH_WRITE_SETTING(PROJSET_MEM->MB_GPIOX, (uint32_t)MODBUS_GPIOX);
//FLASH_WRITE_SETTING(PROJSET_MEM->MB_GPIO_PIN_RX, MODBUS_GPIO_PIN_RX);
//FLASH_WRITE_SETTING(PROJSET_MEM->MB_GPIO_PIN_TX, MODBUS_GPIO_PIN_TX);
//FLASH_WRITE_SETTING(PROJSET_MEM->MB_MAX_TIMEOUT, MODBUS_MAX_TIMEOUT);
//FLASH_WRITE_SETTING(PROJSET_MEM->MB_TIM_AHB_FREQ, MODBUS_TIM_AHB_FREQ);
//
//// PWM settings
//FLASH_WRITE_SETTING(PROJSET_MEM->TIM_PWM_TICKBASE, TIMER_PWM_TICKBASE);
//FLASH_WRITE_SETTING(PROJSET_MEM->TIM_PWM_AHB_FREQ, TIMER_PWM_AHB_FREQ);
//
//FLASH_WRITE_SETTING(PROJSET_MEM->TIM_PWM1_TIM_CHANNEL1, TIMER_PWM1_TIM_CHANNEL1);
//FLASH_WRITE_SETTING(PROJSET_MEM->TIM_PWM1_TIM_CHANNEL2, TIMER_PWM1_TIM_CHANNEL2);
//FLASH_WRITE_SETTING(PROJSET_MEM->TIM_PWM1_GPIOx, (uint32_t)TIMER_PWM1_GPIOx);
//FLASH_WRITE_SETTING(PROJSET_MEM->TIM_PWM1_GPIO_PIN_X1, TIMER_PWM1_GPIO_PIN_X1);
//FLASH_WRITE_SETTING(PROJSET_MEM->TIM_PWM1_GPIO_PIN_X2, TIMER_PWM1_GPIO_PIN_X2);
//
//FLASH_WRITE_SETTING(PROJSET_MEM->TIM_PWM2_INSTANCE, (uint32_t)TIMER_PWM2_INSTANCE);
//FLASH_WRITE_SETTING(PROJSET_MEM->TIM_PWM2_TIM_CHANNEL1, TIMER_PWM2_TIM_CHANNEL1);
//FLASH_WRITE_SETTING(PROJSET_MEM->TIM_PWM2_TIM_CHANNEL2, TIMER_PWM2_TIM_CHANNEL2);
//FLASH_WRITE_SETTING(PROJSET_MEM->TIM_PWM2_GPIOx, (uint32_t)TIMER_PWM2_GPIOx);
//FLASH_WRITE_SETTING(PROJSET_MEM->TIM_PWM2_GPIO_PIN_X1, TIMER_PWM2_GPIO_PIN_X1);
//FLASH_WRITE_SETTING(PROJSET_MEM->TIM_PWM2_GPIO_PIN_X2, TIMER_PWM2_GPIO_PIN_X2);
//
//FLASH_WRITE_SETTING(PROJSET_MEM->TIM_PWM3_INSTANCE, (uint32_t)TIMER_PWM3_INSTANCE);
//FLASH_WRITE_SETTING(PROJSET_MEM->TIM_PWM3_TIM_CHANNEL1, TIMER_PWM3_TIM_CHANNEL1);
//FLASH_WRITE_SETTING(PROJSET_MEM->TIM_PWM3_TIM_CHANNEL2, TIMER_PWM3_TIM_CHANNEL2);
//FLASH_WRITE_SETTING(PROJSET_MEM->TIM_PWM3_GPIOx, (uint32_t)TIMER_PWM3_GPIOx);
//FLASH_WRITE_SETTING(PROJSET_MEM->TIM_PWM3_GPIO_PIN_X1, TIMER_PWM3_GPIO_PIN_X1);
//FLASH_WRITE_SETTING(PROJSET_MEM->TIM_PWM3_GPIO_PIN_X2, TIMER_PWM3_GPIO_PIN_X2);
//
//// CTRL settings
//FLASH_WRITE_SETTING(PROJSET_MEM->TIM_CTRL_TICKBASE, TIMER_CTRL_TICKBASE);
//FLASH_WRITE_SETTING(PROJSET_MEM->TIM_CTRL_AHB_FREQ, TIMER_CTRL_AHB_FREQ);
//HAL_FLASH_Lock();
}
void FillStructWithDefines(void)
{
// rewrite all setting corresponding to defines
// MODBUS settings
STRUCT_WRITE_SETTING(PROJSET.MB_DEVICE_ID, MODBUS_DEVICE_ID);
STRUCT_WRITE_SETTING(PROJSET.MB_SPEED, MODBUS_SPEED);
STRUCT_WRITE_SETTING(PROJSET.MB_GPIOX, MODBUS_GPIOX);
STRUCT_WRITE_SETTING(PROJSET.MB_GPIO_PIN_RX, MODBUS_GPIO_PIN_RX);
STRUCT_WRITE_SETTING(PROJSET.MB_GPIO_PIN_TX, MODBUS_GPIO_PIN_TX);
STRUCT_WRITE_SETTING(PROJSET.MB_MAX_TIMEOUT, MODBUS_MAX_TIMEOUT);
STRUCT_WRITE_SETTING(PROJSET.MB_TIM_AHB_FREQ, MODBUS_TIM_AHB_FREQ);
// PWM settings
STRUCT_WRITE_SETTING(PROJSET.TIM_PWM_TICKBASE, TIMER_PWM_TICKBASE);
STRUCT_WRITE_SETTING(PROJSET.TIM_PWM_AHB_FREQ, TIMER_PWM_AHB_FREQ);
STRUCT_WRITE_SETTING(PROJSET.TIM_PWM1_TIM_CHANNEL1, TIMER_PWM1_TIM_CHANNEL1);
STRUCT_WRITE_SETTING(PROJSET.TIM_PWM1_TIM_CHANNEL2, TIMER_PWM1_TIM_CHANNEL2);
STRUCT_WRITE_SETTING(PROJSET.TIM_PWM1_GPIOx, TIMER_PWM1_GPIOx);
STRUCT_WRITE_SETTING(PROJSET.TIM_PWM1_GPIO_PIN_X1, TIMER_PWM1_GPIO_PIN_X1);
STRUCT_WRITE_SETTING(PROJSET.TIM_PWM1_GPIO_PIN_X2, TIMER_PWM1_GPIO_PIN_X2);
STRUCT_WRITE_SETTING(PROJSET.TIM_PWM2_INSTANCE, TIMER_PWM2_INSTANCE);
STRUCT_WRITE_SETTING(PROJSET.TIM_PWM2_TIM_CHANNEL1, TIMER_PWM2_TIM_CHANNEL1);
STRUCT_WRITE_SETTING(PROJSET.TIM_PWM2_TIM_CHANNEL2, TIMER_PWM2_TIM_CHANNEL2);
STRUCT_WRITE_SETTING(PROJSET.TIM_PWM2_GPIOx, TIMER_PWM2_GPIOx);
STRUCT_WRITE_SETTING(PROJSET.TIM_PWM2_GPIO_PIN_X1, TIMER_PWM2_GPIO_PIN_X1);
STRUCT_WRITE_SETTING(PROJSET.TIM_PWM2_GPIO_PIN_X2, TIMER_PWM2_GPIO_PIN_X2);
STRUCT_WRITE_SETTING(PROJSET.TIM_PWM3_INSTANCE, TIMER_PWM3_INSTANCE);
STRUCT_WRITE_SETTING(PROJSET.TIM_PWM3_TIM_CHANNEL1, TIMER_PWM3_TIM_CHANNEL1);
STRUCT_WRITE_SETTING(PROJSET.TIM_PWM3_TIM_CHANNEL2, TIMER_PWM3_TIM_CHANNEL2);
STRUCT_WRITE_SETTING(PROJSET.TIM_PWM3_GPIOx, TIMER_PWM3_GPIOx);
STRUCT_WRITE_SETTING(PROJSET.TIM_PWM3_GPIO_PIN_X1, TIMER_PWM3_GPIO_PIN_X1);
STRUCT_WRITE_SETTING(PROJSET.TIM_PWM3_GPIO_PIN_X2, TIMER_PWM3_GPIO_PIN_X2);
// CTRL settings
STRUCT_WRITE_SETTING(PROJSET.TIM_CTRL_TICKBASE, TIMER_CTRL_TICKBASE);
STRUCT_WRITE_SETTING(PROJSET.TIM_CTRL_AHB_FREQ, TIMER_CTRL_AHB_FREQ);
}
void CheckSettingsInFLASH(void)
{
//if(CheckIsSettingsValid(PROJSET_MEM))
// FillSettingsWithDefines();
//
//PROJSET = *PROJSET_MEM;
}
int CheckIsSettingsValid(ProjectSettings_TypeDef *set_struct)
{
// if some of setting are missing
// chech MODBUS
if((!IS_UART_BAUDRATE(set_struct->MB_SPEED) || (set_struct->MB_SPEED ) == 0) ||
(!IS_GPIO_ALL_INSTANCE((GPIO_TypeDef *)set_struct->MB_GPIOX)) ||
(!IS_GPIO_PIN((GPIO_TypeDef *)set_struct->MB_GPIO_PIN_TX)) ||
(!IS_GPIO_PIN((GPIO_TypeDef *)set_struct->MB_GPIO_PIN_RX)) ||
((set_struct->MB_TIM_AHB_FREQ) == 0))
{
return 1;
}
// chech control tim
if((set_struct->TIM_CTRL_AHB_FREQ) == 0)
{
return 1;
}
// chech PWM tims
if((set_struct->TIM_PWM_AHB_FREQ) == 0 ||
(!IS_GPIO_ALL_INSTANCE((GPIO_TypeDef *)set_struct->TIM_PWM1_GPIOx)) ||
(!IS_GPIO_PIN((GPIO_TypeDef *)set_struct->TIM_PWM1_GPIO_PIN_X1)) ||
(!IS_GPIO_PIN((GPIO_TypeDef *)set_struct->TIM_PWM1_GPIO_PIN_X2)) ||
(!IS_TIM_CHANNELS(set_struct->TIM_PWM1_TIM_CHANNEL1)) ||
(!IS_TIM_CHANNELS(set_struct->TIM_PWM1_TIM_CHANNEL2)) ||
(!IS_TIM_INSTANCE((TIM_TypeDef *)set_struct->TIM_PWM2_INSTANCE)) ||
(!IS_GPIO_ALL_INSTANCE((GPIO_TypeDef *)set_struct->TIM_PWM2_GPIOx)) ||
(!IS_GPIO_PIN((GPIO_TypeDef *)set_struct->TIM_PWM2_GPIO_PIN_X1)) ||
(!IS_GPIO_PIN((GPIO_TypeDef *)set_struct->TIM_PWM2_GPIO_PIN_X2)) ||
(!IS_TIM_CHANNELS(set_struct->TIM_PWM2_TIM_CHANNEL1)) ||
(!IS_TIM_CHANNELS(set_struct->TIM_PWM2_TIM_CHANNEL2)) ||
(!IS_TIM_INSTANCE((TIM_TypeDef *)set_struct->TIM_PWM3_INSTANCE)) ||
(!IS_GPIO_ALL_INSTANCE((GPIO_TypeDef *)set_struct->TIM_PWM3_GPIOx)) ||
(!IS_GPIO_PIN((GPIO_TypeDef *)set_struct->TIM_PWM3_GPIO_PIN_X1)) ||
(!IS_GPIO_PIN((GPIO_TypeDef *)set_struct->TIM_PWM3_GPIO_PIN_X2)) ||
(!IS_TIM_CHANNELS(set_struct->TIM_PWM3_TIM_CHANNEL1)) ||
(!IS_TIM_CHANNELS(set_struct->TIM_PWM3_TIM_CHANNEL2)))
{
return 1;
}
return 0;
}

151
Code/PWM/settings.h
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/********************************MODBUS*************************************
Данный файл содержит объявления базовых функции и дефайны для реализации
MODBUS.
Данный файл необходимо подключить в rs_message.h. После подключать rs_message.h
к основному проекту.
***************************************************************************/
#ifndef __PROJ_SETTINGS_H_
#define __PROJ_SETTINGS_H_
#include "stm32f4xx_hal.h"
//--------DEFINES FOR SETTING OF SETTINGS-----------
#define SETTINGS_FLASH_ADDRESS_SHIFT (0x10000)
#define SETTINGS_FLASH_ADDRESS (FLASH_BASE + SETTINGS_FLASH_ADDRESS_SHIFT)
#define EEPROM_BASE
#define SETTINGS_EEPROM_ADDRESS_SHIFT
#define SETTINGS_EEPROM_ADDRESS (EEPROM_BASE + SETTINGS_EEPROM_ADDRESS_SHIFT)
#ifdef USE_EEPROM
#define SETTINGS_ADDRESS SETTINGS_EEPROM_ADDRESS
#else // USE_EEPROM
#define SETTINGS_ADDRESS (SETTINGS_FLASH_ADDRESS)
#endif // USE_EEPROM
//--------------------------------------------------
//------------DEFINES FOR PWM SETTING---------------
// settings defines
#define HZ_TIMER_CTRL 400
#define HZ_TIMER_PWM 1000
// TIM PWM1 SETTINGS
#define PWM_MASTER_TIM_NUMB 4
#define TIMER_PWM_TICKBASE TIM_TickBase_1US
#define TIMER_PWM_AHB_FREQ 72
#define TIMER_PWM1_INSTANCE TIM4
#define TIMER_PWM1_TIM_CHANNEL1 TIM_CHANNEL_1
#define TIMER_PWM1_TIM_CHANNEL2 TIM_CHANNEL_2
#define TIMER_PWM1_GPIOx GPIOD
#define TIMER_PWM1_GPIO_PIN_X1 GPIO_PIN_12
#define TIMER_PWM1_GPIO_PIN_X2 GPIO_PIN_13
// TIM PWM2 SETTINGS
#define TIMER_PWM2_INSTANCE TIM3
#define TIMER_PWM2_TIM_CHANNEL1 TIM_CHANNEL_3
#define TIMER_PWM2_TIM_CHANNEL2 TIM_CHANNEL_4
#define TIMER_PWM2_GPIOx GPIOB
#define TIMER_PWM2_GPIO_PIN_X1 GPIO_PIN_0
#define TIMER_PWM2_GPIO_PIN_X2 GPIO_PIN_1
// TIM PWM3 SETTINGS
#define TIMER_PWM3_INSTANCE TIM1
#define TIMER_PWM3_TIM_CHANNEL1 TIM_CHANNEL_1
#define TIMER_PWM3_TIM_CHANNEL2 TIM_CHANNEL_2
#define TIMER_PWM3_GPIOx GPIOE
#define TIMER_PWM3_GPIO_PIN_X1 GPIO_PIN_9
#define TIMER_PWM3_GPIO_PIN_X2 GPIO_PIN_11
// TIM CTRL SETTINGS
#define TIMER_CTRL_TICKBASE TIM_TickBase_1US
#define TIMER_CTRL_AHB_FREQ 72
// PWM SETTINGS
#define SIN_TABLE_ORIGIN sin_table
#define SIN_TABLE_SIZE_MAX 1000
//--------------------------------------------------
//----------DEFINES FOR MODBUS SETTING--------------
#define MODBUS_UART_NUMB 3 // number of used uart
#define MODBUS_SPEED 115200
#define MODBUS_GPIOX GPIOB
#define MODBUS_GPIO_PIN_RX GPIO_PIN_11
#define MODBUS_GPIO_PIN_TX GPIO_PIN_10
/* accord to this define sets define USED_MB_UART = USARTx */
#define MODBUS_TIM_NUMB 7 // number of used uart
#define MODBUS_TIM_AHB_FREQ 72
/* accord to this define sets define USED_MB_TIM = TIMx */
/* defines for modbus behaviour */
#define MODBUS_DEVICE_ID 1 // number of used uart
#define MODBUS_MAX_TIMEOUT 5000 // is ms
// custom define for size of receive message
//--------------------------------------------------
typedef struct
{
// ctrl periph settings
uint64_t TIM_CTRL_TICKBASE;
uint64_t TIM_CTRL_AHB_FREQ;
// pwm peripth settings
uint64_t TIM_PWM_TICKBASE;
uint64_t TIM_PWM_AHB_FREQ;
// uint64_t TIM_PWM1_INSTANCE;
uint64_t TIM_PWM1_TIM_CHANNEL1;
uint64_t TIM_PWM1_TIM_CHANNEL2;
uint64_t TIM_PWM1_GPIOx;
uint64_t TIM_PWM1_GPIO_PIN_X1;
uint64_t TIM_PWM1_GPIO_PIN_X2;
uint64_t TIM_PWM2_INSTANCE;
uint64_t TIM_PWM2_TIM_CHANNEL1;
uint64_t TIM_PWM2_TIM_CHANNEL2;
uint64_t TIM_PWM2_GPIOx;
uint64_t TIM_PWM2_GPIO_PIN_X1;
uint64_t TIM_PWM2_GPIO_PIN_X2;
uint64_t TIM_PWM3_INSTANCE;
uint64_t TIM_PWM3_TIM_CHANNEL1;
uint64_t TIM_PWM3_TIM_CHANNEL2;
uint64_t TIM_PWM3_GPIOx;
uint64_t TIM_PWM3_GPIO_PIN_X1;
uint64_t TIM_PWM3_GPIO_PIN_X2;
// modbus peripth settings
uint64_t MB_DEVICE_ID;
uint64_t MB_SPEED;
uint64_t MB_GPIOX;
uint64_t MB_GPIO_PIN_RX;
uint64_t MB_GPIO_PIN_TX;
uint64_t MB_MAX_TIMEOUT;
uint64_t MB_TIM_AHB_FREQ;
// uint32_t MB_UART_NUMB;
// uint32_t MB_TIM_NUMB;
}ProjectSettings_TypeDef;
extern ProjectSettings_TypeDef PROJSET;
//#define PROJSET_MEM ((ProjectSettings_TypeDef *)SETTINGS_ADDRESS)
//#define HAL_FLASH_GET_TYPEPROGRAM(_val_) (sizeof(PROJSET_MEM->MB_DEVICE_ID)/2 - 1)
#define HAL_FLASH_GET_TYPEPROGRAM(_val_) FLASH_TYPEPROGRAM_WORD
#define FLASH_WRITE_SETTING(_setting_, _val_) HAL_FLASH_Program(HAL_FLASH_GET_TYPEPROGRAM(_setting_), (uint32_t)(&_setting_), (uint32_t)_val_);
#define STRUCT_WRITE_SETTING(_setting_, _val_) (_setting_ = _val_)
void FillStructWithDefines(void);
void SetFlagUpdateSettingsInMem(void);
void UpdateSettingsInMem(void);
void WriteSettingsToMem(void);
void FillSettingsWithDefines(void);
void CheckSettingsInFLASH(void);
int CheckIsSettingsValid(ProjectSettings_TypeDef *set_struct);
#endif // __PROJ_SETTINGS_H_

414
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/*
* Copyright (c) 2016, 2019 ARM Limited.
*
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal in the Software without restriction, including without limitation the
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#ifndef __ARM_COMPUTE_NEMATH_H__
#define __ARM_COMPUTE_NEMATH_H__
#if defined(ARM_MATH_NEON)
/** Calculate floor of a vector.
*
* @param[in] val Input vector value in F32 format.
*
* @return The calculated floor vector.
*/
static inline float32x4_t vfloorq_f32(float32x4_t val);
/** Calculate inverse square root.
*
* @param[in] x Input value.
*
* @return The calculated inverse square root.
*/
static inline float32x2_t vinvsqrt_f32(float32x2_t x);
/** Calculate inverse square root.
*
* @param[in] x Input value.
*
* @return The calculated inverse square root.
*/
static inline float32x4_t vinvsqrtq_f32(float32x4_t x);
/** Calculate reciprocal.
*
* @param[in] x Input value.
*
* @return The calculated reciprocal.
*/
static inline float32x2_t vinv_f32(float32x2_t x);
/** Calculate reciprocal.
*
* @param[in] x Input value.
*
* @return The calculated reciprocal.
*/
static inline float32x4_t vinvq_f32(float32x4_t x);
/** Perform a 7th degree polynomial approximation using Estrin's method.
*
* @param[in] x Input vector value in F32 format.
* @param[in] coeffs Polynomial coefficients table. (array of flattened float32x4_t vectors)
*
* @return The calculated approximation.
*/
static inline float32x4_t vtaylor_polyq_f32(float32x4_t x, const float32_t *coeffs);
/** Calculate exponential
*
* @param[in] x Input vector value in F32 format.
*
* @return The calculated exponent.
*/
static inline float32x4_t vexpq_f32(float32x4_t x);
/** Calculate logarithm
*
* @param[in] x Input vector value in F32 format.
*
* @return The calculated logarithm.
*/
static inline float32x4_t vlogq_f32(float32x4_t x);
/** Calculate hyperbolic tangent.
*
* tanh(x) = (e^2x - 1)/(e^2x + 1)
*
* @note We clamp x to [-5,5] to avoid overflowing issues.
*
* @param[in] val Input vector value in F32 format.
*
* @return The calculated Hyperbolic Tangent.
*/
static inline float32x4_t vtanhq_f32(float32x4_t val);
/** Calculate n power of a number.
*
* pow(x,n) = e^(n*log(x))
*
* @param[in] val Input vector value in F32 format.
* @param[in] n Powers to raise the input to.
*
* @return The calculated power.
*/
static inline float32x4_t vpowq_f32(float32x4_t val, float32x4_t n);
#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
/** Calculate hyperbolic tangent.
*
* tanh(x) = (e^2x - 1)/(e^2x + 1)
*
* @note We clamp x to [-5,5] to avoid overflowing issues.
*
* @param[in] val Input vector value in F32 format.
*
* @return The calculated Hyperbolic Tangent.
*/
static inline float16x8_t vtanhq_f16(float16x8_t val);
/** Calculate reciprocal.
*
* @param[in] x Input value.
*
* @return The calculated reciprocal.
*/
static inline float16x4_t vinv_f16(float16x4_t x);
/** Calculate reciprocal.
*
* @param[in] x Input value.
*
* @return The calculated reciprocal.
*/
static inline float16x8_t vinvq_f16(float16x8_t x);
/** Calculate inverse square root.
*
* @param[in] x Input value.
*
* @return The calculated inverse square root.
*/
static inline float16x4_t vinvsqrt_f16(float16x4_t x);
/** Calculate inverse square root.
*
* @param[in] x Input value.
*
* @return The calculated inverse square root.
*/
static inline float16x8_t vinvsqrtq_f16(float16x8_t x);
/** Calculate exponential
*
* @param[in] x Input vector value in F16 format.
*
* @return The calculated exponent.
*/
static inline float16x8_t vexpq_f16(float16x8_t x);
/** Calculate n power of a number.
*
* pow(x,n) = e^(n*log(x))
*
* @param[in] val Input vector value in F16 format.
* @param[in] n Powers to raise the input to.
*
* @return The calculated power.
*/
static inline float16x8_t vpowq_f16(float16x8_t val, float16x8_t n);
#endif /* __ARM_FEATURE_FP16_VECTOR_ARITHMETIC */
/** Exponent polynomial coefficients */
extern const float32_t exp_tab[4*8];
/** Logarithm polynomial coefficients */
extern const float32_t log_tab[4*8];
#ifndef DOXYGEN_SKIP_THIS
inline float32x4_t vfloorq_f32(float32x4_t val)
{
static const float32_t CONST_1[4] = {1.f,1.f,1.f,1.f};
const int32x4_t z = vcvtq_s32_f32(val);
const float32x4_t r = vcvtq_f32_s32(z);
return vbslq_f32(vcgtq_f32(r, val), vsubq_f32(r, vld1q_f32(CONST_1)), r);
}
inline float32x2_t vinvsqrt_f32(float32x2_t x)
{
float32x2_t sqrt_reciprocal = vrsqrte_f32(x);
sqrt_reciprocal = vmul_f32(vrsqrts_f32(vmul_f32(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
sqrt_reciprocal = vmul_f32(vrsqrts_f32(vmul_f32(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
return sqrt_reciprocal;
}
inline float32x4_t vinvsqrtq_f32(float32x4_t x)
{
float32x4_t sqrt_reciprocal = vrsqrteq_f32(x);
sqrt_reciprocal = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
sqrt_reciprocal = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
return sqrt_reciprocal;
}
inline float32x2_t vinv_f32(float32x2_t x)
{
float32x2_t recip = vrecpe_f32(x);
recip = vmul_f32(vrecps_f32(x, recip), recip);
recip = vmul_f32(vrecps_f32(x, recip), recip);
return recip;
}
inline float32x4_t vinvq_f32(float32x4_t x)
{
float32x4_t recip = vrecpeq_f32(x);
recip = vmulq_f32(vrecpsq_f32(x, recip), recip);
recip = vmulq_f32(vrecpsq_f32(x, recip), recip);
return recip;
}
inline float32x4_t vtaylor_polyq_f32(float32x4_t x, const float32_t *coeffs)
{
float32x4_t A = vmlaq_f32(vld1q_f32(&coeffs[4*0]), vld1q_f32(&coeffs[4*4]), x);
float32x4_t B = vmlaq_f32(vld1q_f32(&coeffs[4*2]), vld1q_f32(&coeffs[4*6]), x);
float32x4_t C = vmlaq_f32(vld1q_f32(&coeffs[4*1]), vld1q_f32(&coeffs[4*5]), x);
float32x4_t D = vmlaq_f32(vld1q_f32(&coeffs[4*3]), vld1q_f32(&coeffs[4*7]), x);
float32x4_t x2 = vmulq_f32(x, x);
float32x4_t x4 = vmulq_f32(x2, x2);
float32x4_t res = vmlaq_f32(vmlaq_f32(A, B, x2), vmlaq_f32(C, D, x2), x4);
return res;
}
inline float32x4_t vexpq_f32(float32x4_t x)
{
static const float32_t CONST_LN2[4] = {0.6931471805f,0.6931471805f,0.6931471805f,0.6931471805f}; // ln(2)
static const float32_t CONST_INV_LN2[4] = {1.4426950408f,1.4426950408f,1.4426950408f,1.4426950408f}; // 1/ln(2)
static const float32_t CONST_0[4] = {0.f,0.f,0.f,0.f};
static const int32_t CONST_NEGATIVE_126[4] = {-126,-126,-126,-126};
// Perform range reduction [-log(2),log(2)]
int32x4_t m = vcvtq_s32_f32(vmulq_f32(x, vld1q_f32(CONST_INV_LN2)));
float32x4_t val = vmlsq_f32(x, vcvtq_f32_s32(m), vld1q_f32(CONST_LN2));
// Polynomial Approximation
float32x4_t poly = vtaylor_polyq_f32(val, exp_tab);
// Reconstruct
poly = vreinterpretq_f32_s32(vqaddq_s32(vreinterpretq_s32_f32(poly), vqshlq_n_s32(m, 23)));
poly = vbslq_f32(vcltq_s32(m, vld1q_s32(CONST_NEGATIVE_126)), vld1q_f32(CONST_0), poly);
return poly;
}
inline float32x4_t vlogq_f32(float32x4_t x)
{
static const int32_t CONST_127[4] = {127,127,127,127}; // 127
static const float32_t CONST_LN2[4] = {0.6931471805f,0.6931471805f,0.6931471805f,0.6931471805f}; // ln(2)
// Extract exponent
int32x4_t m = vsubq_s32(vreinterpretq_s32_u32(vshrq_n_u32(vreinterpretq_u32_f32(x), 23)), vld1q_s32(CONST_127));
float32x4_t val = vreinterpretq_f32_s32(vsubq_s32(vreinterpretq_s32_f32(x), vshlq_n_s32(m, 23)));
// Polynomial Approximation
float32x4_t poly = vtaylor_polyq_f32(val, log_tab);
// Reconstruct
poly = vmlaq_f32(poly, vcvtq_f32_s32(m), vld1q_f32(CONST_LN2));
return poly;
}
inline float32x4_t vtanhq_f32(float32x4_t val)
{
static const float32_t CONST_1[4] = {1.f,1.f,1.f,1.f};
static const float32_t CONST_2[4] = {2.f,2.f,2.f,2.f};
static const float32_t CONST_MIN_TANH[4] = {-10.f,-10.f,-10.f,-10.f};
static const float32_t CONST_MAX_TANH[4] = {10.f,10.f,10.f,10.f};
float32x4_t x = vminq_f32(vmaxq_f32(val, vld1q_f32(CONST_MIN_TANH)), vld1q_f32(CONST_MAX_TANH));
float32x4_t exp2x = vexpq_f32(vmulq_f32(vld1q_f32(CONST_2), x));
float32x4_t num = vsubq_f32(exp2x, vld1q_f32(CONST_1));
float32x4_t den = vaddq_f32(exp2x, vld1q_f32(CONST_1));
float32x4_t tanh = vmulq_f32(num, vinvq_f32(den));
return tanh;
}
inline float32x4_t vpowq_f32(float32x4_t val, float32x4_t n)
{
return vexpq_f32(vmulq_f32(n, vlogq_f32(val)));
}
#endif /* DOXYGEN_SKIP_THIS */
#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
/** Exponent polynomial coefficients */
/** Logarithm polynomial coefficients */
#ifndef DOXYGEN_SKIP_THIS
inline float16x8_t vfloorq_f16(float16x8_t val)
{
static const float16_t CONST_1[8] = {1.f,1.f,1.f,1.f,1.f,1.f,1.f,1.f};
const int16x8_t z = vcvtq_s16_f16(val);
const float16x8_t r = vcvtq_f16_s16(z);
return vbslq_f16(vcgtq_f16(r, val), vsubq_f16(r, vld1q_f16(CONST_1)), r);
}
inline float16x4_t vinvsqrt_f16(float16x4_t x)
{
float16x4_t sqrt_reciprocal = vrsqrte_f16(x);
sqrt_reciprocal = vmul_f16(vrsqrts_f16(vmul_f16(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
sqrt_reciprocal = vmul_f16(vrsqrts_f16(vmul_f16(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
return sqrt_reciprocal;
}
inline float16x8_t vinvsqrtq_f16(float16x8_t x)
{
float16x8_t sqrt_reciprocal = vrsqrteq_f16(x);
sqrt_reciprocal = vmulq_f16(vrsqrtsq_f16(vmulq_f16(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
sqrt_reciprocal = vmulq_f16(vrsqrtsq_f16(vmulq_f16(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal);
return sqrt_reciprocal;
}
inline float16x4_t vinv_f16(float16x4_t x)
{
float16x4_t recip = vrecpe_f16(x);
recip = vmul_f16(vrecps_f16(x, recip), recip);
recip = vmul_f16(vrecps_f16(x, recip), recip);
return recip;
}
inline float16x8_t vinvq_f16(float16x8_t x)
{
float16x8_t recip = vrecpeq_f16(x);
recip = vmulq_f16(vrecpsq_f16(x, recip), recip);
recip = vmulq_f16(vrecpsq_f16(x, recip), recip);
return recip;
}
inline float16x8_t vtanhq_f16(float16x8_t val)
{
const float16_t CONST_1[8] = {1.f,1.f,1.f,1.f,1.f,1.f,1.f,1.f};
const float16_t CONST_2[8] = {2.f,2.f,2.f,2.f,2.f,2.f,2.f,2.f};
const float16_t CONST_MIN_TANH[8] = {-10.f,-10.f,-10.f,-10.f,-10.f,-10.f,-10.f,-10.f};
const float16_t CONST_MAX_TANH[8] = {10.f,10.f,10.f,10.f,10.f,10.f,10.f,10.f};
const float16x8_t x = vminq_f16(vmaxq_f16(val, vld1q_f16(CONST_MIN_TANH)), vld1q_f16(CONST_MAX_TANH));
const float16x8_t exp2x = vexpq_f16(vmulq_f16(vld1q_f16(CONST_2), x));
const float16x8_t num = vsubq_f16(exp2x, vld1q_f16(CONST_1));
const float16x8_t den = vaddq_f16(exp2x, vld1q_f16(CONST_1));
const float16x8_t tanh = vmulq_f16(num, vinvq_f16(den));
return tanh;
}
inline float16x8_t vtaylor_polyq_f16(float16x8_t x, const float16_t *coeffs)
{
const float16x8_t A = vaddq_f16(vld1q_f16(&coeffs[8*0]), vmulq_f16(vld1q_f16(&coeffs[8*4]), x));
const float16x8_t B = vaddq_f16(vld1q_f16(&coeffs[8*2]), vmulq_f16(vld1q_f16(&coeffs[8*6]), x));
const float16x8_t C = vaddq_f16(vld1q_f16(&coeffs[8*1]), vmulq_f16(vld1q_f16(&coeffs[8*5]), x));
const float16x8_t D = vaddq_f16(vld1q_f16(&coeffs[8*3]), vmulq_f16(vld1q_f16(&coeffs[8*7]), x));
const float16x8_t x2 = vmulq_f16(x, x);
const float16x8_t x4 = vmulq_f16(x2, x2);
const float16x8_t res = vaddq_f16(vaddq_f16(A, vmulq_f16(B, x2)), vmulq_f16(vaddq_f16(C, vmulq_f16(D, x2)), x4));
return res;
}
inline float16x8_t vexpq_f16(float16x8_t x)
{
// TODO (COMPMID-1535) : Revisit FP16 approximations
const float32x4_t x_high = vcvt_f32_f16(vget_high_f16(x));
const float32x4_t x_low = vcvt_f32_f16(vget_low_f16(x));
const float16x8_t res = vcvt_high_f16_f32(vcvt_f16_f32(vexpq_f32(x_low)), vexpq_f32(x_high));
return res;
}
inline float16x8_t vlogq_f16(float16x8_t x)
{
// TODO (COMPMID-1535) : Revisit FP16 approximations
const float32x4_t x_high = vcvt_f32_f16(vget_high_f16(x));
const float32x4_t x_low = vcvt_f32_f16(vget_low_f16(x));
const float16x8_t res = vcvt_high_f16_f32(vcvt_f16_f32(vlogq_f32(x_low)), vlogq_f32(x_high));
return res;
}
inline float16x8_t vpowq_f16(float16x8_t val, float16x8_t n)
{
// TODO (giaiod01) - COMPMID-1535
float32x4_t n0_f32 = vcvt_f32_f16(vget_low_f16(n));
float32x4_t n1_f32 = vcvt_f32_f16(vget_high_f16(n));
float32x4_t val0_f32 = vcvt_f32_f16(vget_low_f16(val));
float32x4_t val1_f32 = vcvt_f32_f16(vget_high_f16(val));
float32x4_t res0_f32 = vexpq_f32(vmulq_f32(n0_f32, vlogq_f32(val0_f32)));
float32x4_t res1_f32 = vexpq_f32(vmulq_f32(n1_f32, vlogq_f32(val1_f32)));
return vcombine_f16(vcvt_f16_f32(res0_f32), vcvt_f16_f32(res1_f32));
}
#endif /* DOXYGEN_SKIP_THIS */
#endif /* __ARM_FEATURE_FP16_VECTOR_ARITHMETIC */
#endif
#endif /* __ARM_COMPUTE_NEMATH_H__ */

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MIT License
Copyright (c) 2017-2019 ARM Software
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.

55
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/*
* Copyright (c) 2016, 2019 ARM Limited.
*
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal in the Software without restriction, including without limitation the
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#include "arm_math.h"
#include "NEMath.h"
#if defined(ARM_MATH_NEON)
/** Exponent polynomial coefficients */
const float32_t exp_tab[4*8] =
{
1.f,1.f,1.f,1.f,
0.0416598916054f,0.0416598916054f,0.0416598916054f,0.0416598916054f,
0.500000596046f,0.500000596046f,0.500000596046f,0.500000596046f,
0.0014122662833f,0.0014122662833f,0.0014122662833f,0.0014122662833f,
1.00000011921f,1.00000011921f,1.00000011921f,1.00000011921f,
0.00833693705499f,0.00833693705499f,0.00833693705499f,0.00833693705499f,
0.166665703058f,0.166665703058f,0.166665703058f,0.166665703058f,
0.000195780929062f,0.000195780929062f,0.000195780929062f,0.000195780929062f
};
/** Logarithm polynomial coefficients */
const float32_t log_tab[4*8] =
{
-2.29561495781f,-2.29561495781f,-2.29561495781f,-2.29561495781f,
-2.47071170807f,-2.47071170807f,-2.47071170807f,-2.47071170807f,
-5.68692588806f,-5.68692588806f,-5.68692588806f,-5.68692588806f,
-0.165253549814f,-0.165253549814f,-0.165253549814f,-0.165253549814f,
5.17591238022f,5.17591238022f,5.17591238022f,5.17591238022f,
0.844007015228f,0.844007015228f,0.844007015228f,0.844007015228f,
4.58445882797f,4.58445882797f,4.58445882797f,4.58445882797f,
0.0141278216615f,0.0141278216615f,0.0141278216615f,0.0141278216615f
};
#endif

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#ifndef _ARR_DESC_H_
#define _ARR_DESC_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include <stdint.h>
#include <string.h> /* memset() */
#include "../util/util.h" /* CONCAT() */
/*--------------------------------------------------------------------------------*/
/* Type Definitions */
/*--------------------------------------------------------------------------------*/
/**
* Array-descriptor struct.
*/
typedef struct ARR_DESC_struct
{
void * data_ptr; /* Pointer to the array contents. */
int32_t element_count; /* Number of current elements. */
int32_t element_size; /* Size of current elements in bytes. */
int32_t underlying_size; /* Size of underlying array in bytes. */
} ARR_DESC_t;
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
/**
* Prefix of the array variable's name when creating an array and an array
* descriptor at the same time.
*/
#define ARR_DESC_ARR_PREFIX ARR_DESC_ARR_
/**
* Evaluate to the array variable's name when creating an array and an array
* descriptor at the same time.
*/
#define ARR_DESC_ARR_NAME(name) \
CONCAT(ARR_DESC_ARR_PREFIX, name)
/**
* Define an #ARR_DESC_t by itself.
*
* @note The user must supply an array to store the data used by the
* #ARR_DESC_t.
*/
#define ARR_DESC_INTERNAL_DEFINE(name, data_ptr, \
element_count, element_size) \
ARR_DESC_t name = { \
data_ptr, \
element_count, \
element_size, \
element_count * element_size \
} \
/**
* Define both an array and an #ARR_DESC_t that describes it.
*
* @note Use the #CURLY() macro for the content field; it provides the curly
* braces necessary for an array initialization.
*/
#define ARR_DESC_DEFINE(type, name, element_count, content) \
type ARR_DESC_ARR_NAME(name)[element_count] = content; \
ARR_DESC_INTERNAL_DEFINE(name, \
&ARR_DESC_ARR_NAME(name), \
element_count, \
sizeof(type)) /* Note the lacking semicolon */
/**
* Create a #ARR_DESC_t which refers to a subset of the data in another.
*
* The new #ARR_DESC_t shares the same underlying array as the aliased
* #ARR_DESC_t, but only describes a subset of the originals values.
*/
#define ARR_DESC_DEFINE_SUBSET(name, original, element_cnt) \
ARR_DESC_INTERNAL_DEFINE(name, \
&ARR_DESC_ARR_NAME(original), \
element_cnt, \
sizeof(ARR_DESC_ARR_NAME(original)[0]) \
) /* Note the lacking semicolon */
/**
* Creat an #ARR_DESC_t which points to the data in an existing array.
*
* @param start_idx Offset in array_ptr of first element.
* @param element_cnt Number of elements to include in the #ARR_DESC_t.
*
* @example
*
* float my_floats[4] = {0.0f, 1.0f, 2.0f, 3.0f};
*
* ARR_DESC_DEFINE_USING_ARR(my_arr_desc, my_floats, 1, 3);
*
* printf("Element 0: %f\n", ARR_DESC_ELT(float, 0, &my_arr_desc));
* printf("Element 1: %f\n", ARR_DESC_ELT(float, 1, &my_arr_desc));
*
* Outputs:
*
* Element 0: 1.000000
* Element 1: 2.000000
*
* @warning There are no checks in place to catch invalid start indices; This
* is left to the user.
*/
#define ARR_DESC_DEFINE_USING_ARR(type, name, array_ptr, start_idx, element_cnt) \
ARR_DESC_INTERNAL_DEFINE( \
name, \
(type *) (array_ptr + start_idx), \
element_cnt, \
sizeof(type) \
) /* Note the lacking semicolon*/
/**
* Declare an #ARR_DESC_t object.
*/
#define ARR_DESC_DECLARE(name) \
extern ARR_DESC_t name /* Note the lacking semicolon */
/**
* Evaluate to the number of bytes stored in the #ARR_DESC_t.
*/
#define ARR_DESC_BYTES(arr_desc_ptr) \
((arr_desc_ptr)->element_count * (arr_desc_ptr)->element_size)
/**
* Set the contents of #ARR_DESC_t to value.
*/
#define ARR_DESC_MEMSET(arr_desc_ptr, value, bytes) \
do \
{ \
memset((arr_desc_ptr)->data_ptr, \
value, \
BOUND(0, \
(arr_desc_ptr)->underlying_size, \
bytes) \
); \
} while (0)
/**
* Perform a memcpy of 'bytes' bytes from the source #ARR_DESC_t to the
* destination #ARR_DESC_t.
*/
#define ARR_DESC_MEMCPY(arr_desc_dest_ptr, arr_desc_src_ptr, bytes) \
do \
{ \
memcpy((arr_desc_dest_ptr)->data_ptr, \
(arr_desc_src_ptr)->data_ptr, \
BOUND(0, \
(arr_desc_dest_ptr)->underlying_size, \
bytes)); \
} while (0)
/**
* Evaluate to true if the source #ARR_DESC_t contents will fit into the
* destination #ARR_DESC_t and false otherwise.
*/
#define ARR_DESC_COPYABLE(arr_desc_dest_ptr, arr_desc_src_ptr) \
(ARR_DESC_BYTES(arr_desc_src_ptr) <= \
(arr_desc_dest_ptr)->underlying_size)
/**
* Copy all the data from the source #ARR_DESC_t to the destination
* #ARR_DESC_t.
*
* @note If the destination #ARR_DESC_t is too small to fit the source data the
* copy is aborted and nothing happens.
*/
#define ARR_DESC_COPY(arr_desc_dest_ptr, arr_desc_src_ptr) \
do \
{ \
if (ARR_DESC_COPYABLE(arr_desc_dest_ptr, \
arr_desc_src_ptr)) \
{ \
ARR_DESC_MEMCPY(arr_desc_dest_ptr, \
arr_desc_src_ptr, \
ARR_DESC_BYTES(arr_desc_src_ptr)); \
/* Update the properties*/ \
(arr_desc_dest_ptr)->element_count = \
(arr_desc_src_ptr)->element_count; \
(arr_desc_dest_ptr)->element_size = \
(arr_desc_src_ptr)->element_size; \
} \
} while (0)
/**
* Compare the data in two #ARR_DESC_t structs for the specified number of
* bytes.
*/
#define ARR_DESC_MEMCMP(arr_desc_ptr_a, arr_desc_ptr_b, bytes) \
memcmp((arr_desc_ptr_a)->data_ptr, \
(arr_desc_ptr_b)->data_ptr, \
bytes) /* Note the lacking semicolon */ \
/**
* Zero out the contents of the #ARR_DESC_t.
*/
#define ARR_DESC_ZERO(arr_desc_ptr) \
ARR_DESC_MEMSET(arr_desc_ptr, \
0, \
(arr_desc_ptr)->underlying_size)
/**
* Evaluate to the data address in #ARR_DESC_t at offset.
*/
#define ARR_DESC_DATA_ADDR(type, arr_desc_ptr, offset) \
((void*)(((type *) \
((arr_desc_ptr)->data_ptr)) \
+ offset))
/**
* Evaluate to the element in #ARR_DESC_t with type at idx.
*/
#define ARR_DESC_ELT(type, idx, arr_desc_ptr) \
(*((type *) ARR_DESC_DATA_ADDR(type, \
arr_desc_ptr, \
idx)))
#endif /* _ARR_DESC_H_ */

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#ifndef _JTEST_H_
#define _JTEST_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "jtest_fw.h"
#include "jtest_test.h"
#include "jtest_test_define.h"
#include "jtest_test_call.h"
#include "jtest_group.h"
#include "jtest_group_define.h"
#include "jtest_group_call.h"
#include "jtest_cycle.h"
#endif /* _JTEST_H_ */

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#ifndef _JTEST_CYCLE_H_
#define _JTEST_CYCLE_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "jtest_fw.h" /* JTEST_DUMP_STRF() */
#include "jtest_systick.h"
#include "jtest_util.h" /* STR() */
/*--------------------------------------------------------------------------------*/
/* Declare Module Variables */
/*--------------------------------------------------------------------------------*/
extern const char * JTEST_CYCLE_STRF;
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
/**
* Wrap the function call, fn_call, to count execution cycles and display the
* results.
*/
/* skipp function name + param
#define JTEST_COUNT_CYCLES(fn_call) \
do \
{ \
uint32_t __jtest_cycle_end_count; \
\
JTEST_SYSTICK_RESET(SysTick); \
JTEST_SYSTICK_START(SysTick); \
\
fn_call; \
\
__jtest_cycle_end_count = \
JTEST_SYSTICK_VALUE(SysTick); \
\
JTEST_SYSTICK_RESET(SysTick); \
JTEST_DUMP_STRF(JTEST_CYCLE_STRF, \
STR(fn_call), \
(JTEST_SYSTICK_INITIAL_VALUE - \
__jtest_cycle_end_count)); \
} while (0)
*/
#define JTEST_COUNT_CYCLES(fn_call) \
do \
{ \
uint32_t __jtest_cycle_end_count; \
\
JTEST_SYSTICK_RESET(SysTick); \
JTEST_SYSTICK_START(SysTick); \
\
fn_call; \
\
__jtest_cycle_end_count = \
JTEST_SYSTICK_VALUE(SysTick); \
\
JTEST_SYSTICK_RESET(SysTick); \
JTEST_DUMP_STRF(JTEST_CYCLE_STRF, \
(JTEST_SYSTICK_INITIAL_VALUE - \
__jtest_cycle_end_count)); \
} while (0)
#endif /* _JTEST_CYCLE_H_ */

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#ifndef _JTEST_DEFINE_H_
#define _JTEST_DEFINE_H_
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
/**
* Makes a symbol for use as a struct name. Names made this way have two parts;
* the first parts is a prefix common to all structs of that class. The second
* is a specifier which differs for each instance of that struct type.
*/
#define JTEST_STRUCT_NAME(prefix, specifier) \
CONCAT(prefix, specifier)
/**
* Define a struct with type with a name generated by #JTEST_STRUCT_NAME().
*/
#define JTEST_DEFINE_STRUCT(type, struct_name) \
type struct_name
/**
* Declare a struct with type with a name generated by #JTEST_STRUCT_NAME().
*/
#define JTEST_DECLARE_STRUCT(struct_definition) \
extern struct_definition
/**
* Define and initialize a struct (created with JTEST_DEFINE_STRUCT()) and
* initialize it with init_values.
*/
#define JTEST_INIT_STRUCT(struct_definition, init_values) \
struct_definition = { \
init_values \
}
#endif /* _JTEST_DEFINE_H_ */

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#ifndef _JTEST_FW_H_
#define _JTEST_FW_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include <stdint.h> /* int32_t */
#include <string.h> /* strcpy() */
#include <stdio.h> /* sprintf() */
#include "jtest_pf.h" /* Extend JTEST_FW_t with Pass/Fail data */
#include "jtest_group.h"
/*--------------------------------------------------------------------------------*/
/* Type Definitions */
/*--------------------------------------------------------------------------------*/
/**
* A struct used to interface with the Keil Debugger.
*/
typedef struct JTEST_FW_struct
{
/* Action Triggers: The Keil debugger monitors these values for changes. In
* response to a change, the debugger executes code on the host. */
volatile int32_t test_start;
volatile int32_t test_end;
volatile int32_t group_start;
volatile int32_t group_end;
volatile int32_t dump_str;
volatile int32_t dump_data;
volatile int32_t exit_fw;
JTEST_GROUP_t * current_group_ptr;
/* Buffers: The C-code cannot send strings and data directly to the
* debugging framework. Instead, the debugger can be told to read 128 byte
* (by default) chunks of memory. Data received in this manner requires
* post-processing to be legible.*/
char * str_buffer;
char * data_buffer;
/* Pass/Fail Data */
JTEST_PF_MEMBERS;
} JTEST_FW_t;
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
/**
* Default name for the JTEST_FW struct.
*
* Define your own if you want the variable containing the #JTEST_FW_t to have
* a different name.
*/
#ifndef JTEST_FW
#define JTEST_FW JTEST_FW
#endif
/**
* Default name for the JTEST_FW_STR_BUFFER.
*
* Define your own if you want the variable containing the char buffer to have
* a different name.
*/
#ifndef JTEST_FW_STR_BUFFER
#define JTEST_FW_STR_BUFFER JTEST_FW_STR_BUFFER
#endif
/**
* Size of the #JTEST_FW_t, output string-buffer.
*
* If you change this value, make sure the "dump_str_fn" and "dump_data_fn"
* functions in jtest_fns.ini uses the same size. If you aren't sure, read the
* documentation Keil Debugger Command 'DISPLAY'.
*/
#define JTEST_BUF_SIZE 256
/**
* The maximum number of bytes output at once using #JTEST_DUMP_STRF().
*/
#define JTEST_STR_MAX_OUTPUT_SIZE 128
/**
* The maximum number of block transimissions needed to send a string from a
* buffer with JTEST_BUF_SIZE.
*/
#define JTEST_STR_MAX_OUTPUT_SEGMENTS \
(JTEST_BUF_SIZE / JTEST_STR_MAX_OUTPUT_SIZE)
/**
* Initialize the JTEST framework.
*/
#define JTEST_INIT() \
do \
{ \
JTEST_FW.str_buffer = JTEST_FW_STR_BUFFER; \
} while (0)
/* Debugger Action-triggering Macros */
/*--------------------------------------------------------------------------------*/
/**
* Dispatch macro to trigger various actions in the Keil Debugger.
*/
#define JTEST_TRIGGER_ACTION(action_name) \
do \
{ \
action_name(); \
} while (0)
/**
* Trigger the "Test Start" action in the Keil Debugger.
*/
#define JTEST_ACT_TEST_START() \
JTEST_TRIGGER_ACTION(test_start)
/**
* Trigger the "Test End" action in the Keil Debugger.
*/
#define JTEST_ACT_TEST_END() \
JTEST_TRIGGER_ACTION(test_end)
/**
* Trigger the "Group Start" action in the Keil Debugger.
*/
#define JTEST_ACT_GROUP_START() \
JTEST_TRIGGER_ACTION(group_start)
/**
* Trigger the "Group End" action in the Keil Debugger.
*/
#define JTEST_ACT_GROUP_END() \
JTEST_TRIGGER_ACTION(group_end)
/**
* Fill the buffer named buf_name with value and dump it to the Keil debugger
* using action.
*/
#define JTEST_ACT_DUMP(action, buf_name, value) \
do \
{ \
JTEST_CLEAR_BUFFER(buf_name); \
strcpy(JTEST_FW.buf_name, (value)); \
JTEST_TRIGGER_ACTION(action); \
} while (0)
/**
* Trigger the "Exit Framework" action in the Keil Debugger.
*/
#define JTEST_ACT_EXIT_FW() \
do \
{ \
JTEST_TRIGGER_ACTION(exit_fw); \
} while (0)
/* Buffer Manipulation Macros */
/*--------------------------------------------------------------------------------*/
/**
* Clear the JTEST_FW buffer with name buf_name.
*/
#define JTEST_CLEAR_BUFFER(buf_name) \
do \
{ \
memset(JTEST_FW.buf_name, 0, JTEST_BUF_SIZE); \
} while (0)
/**
* Clear the memory needed for the JTEST_FW's string buffer.
*/
#define JTEST_CLEAR_STR_BUFFER() \
JTEST_CLEAR_BUFFER(str_buffer)
/**
* Clear the memory needed for the JTEST_FW's data buffer.
*/
#define JTEST_CLEAR_DATA_BUFFER() \
JTEST_CLEAR_BUFFER(data_buffer)
/**
* Dump the given string to the Keil Debugger.
*/
#define JTEST_DUMP_STR(string) \
JTEST_ACT_DUMP(dump_str, str_buffer, string)
/**
* Dump a formatted string to the Keil Debugger.
*/
#define JTEST_DUMP_STRF(format_str, ... ) \
do \
{ \
JTEST_CLEAR_STR_BUFFER(); \
sprintf(JTEST_FW.str_buffer,format_str, __VA_ARGS__); \
jtest_dump_str_segments(); \
} while (0)
/* Pass/Fail Macros */
/*--------------------------------------------------------------------------------*/
/**
* Increment the number of passed tests in #JTEST_FW.
*/
#define JTEST_FW_INC_PASSED(amount) \
JTEST_PF_INC_PASSED(&JTEST_FW, amount)
/**
* Increment the number of passed tests in #JTEST_FW.
*/
#define JTEST_FW_INC_FAILED(amount) \
JTEST_PF_INC_FAILED(&JTEST_FW, amount)
/* Manipulating the Current Group */
/*--------------------------------------------------------------------------------*/
/**
* Evaluate to the current_group_ptr in #JTEST_FW.
*/
#define JTEST_CURRENT_GROUP_PTR() \
(JTEST_FW.current_group_ptr)
#define JTEST_SET_CURRENT_GROUP(group_ptr) \
do \
{ \
JTEST_CURRENT_GROUP_PTR() = group_ptr; \
} while (0)
/*--------------------------------------------------------------------------------*/
/* Declare Global Variables */
/*--------------------------------------------------------------------------------*/
extern char JTEST_FW_STR_BUFFER[JTEST_BUF_SIZE];
extern volatile JTEST_FW_t JTEST_FW;
/*--------------------------------------------------------------------------------*/
/* Function Prototypes */
/*--------------------------------------------------------------------------------*/
void jtest_dump_str_segments(void);
void test_start (void);
void test_end (void);
void group_start (void);
void group_end (void);
void dump_str (void);
void dump_data (void);
void exit_fw (void);
#endif /* _JTEST_FW_H_ */

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#ifndef _JTEST_GROUP_H_
#define _JTEST_GROUP_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "jtest_pf.h"
#include "jtest_util.h"
/*--------------------------------------------------------------------------------*/
/* Type Definitions */
/*--------------------------------------------------------------------------------*/
/**
* A struct which represents a group of #JTEST_TEST_t structs. This struct is
* used to run the group of tests, and report on their outcomes.
*/
typedef struct JTEST_GROUP_struct
{
void (* group_fn_ptr) (void); /**< Pointer to the test group */
char * name_str; /**< Name of the group */
/* Extend the #JTEST_GROUP_t with Pass/Fail information.*/
JTEST_PF_MEMBERS;
} JTEST_GROUP_t;
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
/**
* Set the name of JTEST_GROUP_t.
*/
#define JTEST_GROUP_SET_NAME(group_ptr, name) \
JTEST_SET_STRUCT_ATTRIBUTE(group_ptr, name_str, name)
#define JTEST_GROUP_SET_FN(group_ptr, fn_ptr) \
JTEST_SET_STRUCT_ATTRIBUTE(group_ptr, group_fn_ptr, fn_ptr)
/**
* Increment the number of tests passed in the JTEST_GROUP_t pointed to by
* group_ptr.
*/
#define JTEST_GROUP_INC_PASSED(group_ptr, amount) \
JTEST_PF_INC_PASSED(group_ptr, amount)
/**
* Increment the number of tests failed in the JTEST_GROUP_t pointed to by
* group_ptr.
*/
#define JTEST_GROUP_INC_FAILED(group_ptr, amount) \
JTEST_PF_INC_FAILED(group_ptr, amount)
/**
* Reset the pass/fail information of the #JTEST_GROUP_t pointed to by
* group_ptr.
*/
#define JTEST_GROUP_RESET_PF(group_ptr) \
do \
{ \
JTEST_PF_RESET_PASSED(group_ptr); \
JTEST_PF_RESET_FAILED(group_ptr); \
} while (0)
#endif /* _JTEST_GROUP_H_ */

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#ifndef _JTEST_GROUP_CALL_H_
#define _JTEST_GROUP_CALL_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "jtest_fw.h"
#include <inttypes.h>
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
/**
* Execute the test in the #JTEST_GROUP_t struct associated witht he identifier
* group_fn.
*/
#define JTEST_GROUP_RUN(group_fn) \
do \
{ \
JTEST_DUMP_STR("Group Name:\n"); \
JTEST_DUMP_STR(JTEST_GROUP_STRUCT_NAME(group_fn).name_str); \
JTEST_GROUP_STRUCT_NAME(group_fn).group_fn_ptr(); \
} while (0)
/**
* Update the enclosing #JTEST_GROUP_t's pass/fail information using the
* current #JTEST_GROUP_t's.
*
* @param group_ptr Pointer to the current #JTEST_GROUP_t.
* @param parent_ptr Pointer to the enclosing #JTEST_GROUP_t.
*
* @warning Only run this if the current #JTEST_GROUP_t is being called within
* the context of another #JTEST_GROUP_t.
*/
#define JTEST_GROUP_UPDATE_PARENT_GROUP_PF(group_ptr, parent_group_ptr) \
do \
{ \
JTEST_GROUP_INC_PASSED(parent_group_ptr, \
(group_ptr)->passed); \
JTEST_GROUP_INC_FAILED(parent_group_ptr, \
(group_ptr)->failed); \
} while (0)
/**
* Update the #JTEST_FW's pass/fail information using the current
* #JTEST_GROUP_t's.
*/
#define JTEST_GROUP_UPDATE_FW_PF(group_ptr) \
do \
{ \
JTEST_FW_INC_PASSED((group_ptr)->passed); \
JTEST_FW_INC_FAILED((group_ptr)->failed); \
} while (0)
/**
* Update the enclosing context with the current #JTEST_GROUP_t's pass/fail
* information. If this group isn't in an enclosing group, it updates the
* #JTEST_FW's pass/fail info by default.
*/
#define JTEST_GROUP_UPDATE_PARENT_GROUP_OR_FW_PF(group_ptr, \
parent_group_ptr) \
do \
{ \
/* Update the pass fail counts in the parent group */ \
if (parent_group_ptr /* Null implies Top*/) \
{ \
JTEST_GROUP_UPDATE_PARENT_GROUP_PF( \
group_ptr, \
parent_group_ptr); \
} else { \
JTEST_GROUP_UPDATE_FW_PF( \
group_ptr); \
} \
} while (0)
/**
* Dump the results of running the #JTEST_GROUP_t to the Keil Debugger.
*/
#define JTEST_GROUP_DUMP_RESULTS(group_ptr) \
do \
{ \
JTEST_DUMP_STRF( \
"Tests Run: %" PRIu32 "\n" \
"----------\n" \
" Passed: %" PRIu32 "\n" \
" Failed: %" PRIu32 "\n", \
(group_ptr)->passed + (group_ptr)->failed, \
(group_ptr)->passed, \
(group_ptr)->failed); \
} while (0)
/**
* Call the #JTEST_GROUP_t associated with the identifier group_fn.
*/
#define JTEST_GROUP_CALL(group_fn) \
do \
{ /* Save the current group from JTEST_FW_t before swapping */ \
/* it to this group (in order to restore it later )*/ \
JTEST_GROUP_t * __jtest_temp_group_ptr = \
JTEST_CURRENT_GROUP_PTR(); \
JTEST_SET_CURRENT_GROUP(&JTEST_GROUP_STRUCT_NAME(group_fn)); \
\
/* Reset this group's pass/fail count. Each group */ \
/* should only remember counts for its last execution. */ \
JTEST_GROUP_RESET_PF(JTEST_CURRENT_GROUP_PTR()); \
\
/* Run the current group */ \
JTEST_ACT_GROUP_START(); \
JTEST_GROUP_RUN(group_fn); \
JTEST_ACT_GROUP_END(); \
\
/* Update the pass fail counts in the parent group (or FW) */ \
JTEST_GROUP_UPDATE_PARENT_GROUP_OR_FW_PF( \
JTEST_CURRENT_GROUP_PTR(), \
__jtest_temp_group_ptr); \
\
JTEST_GROUP_DUMP_RESULTS(JTEST_CURRENT_GROUP_PTR()); \
\
/* Restore the previously current group */ \
JTEST_SET_CURRENT_GROUP(__jtest_temp_group_ptr); \
} while (0)
#endif /* _JTEST_GROUP_CALL_H_ */

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#ifndef _JTEST_GROUP_DEFINE_H_
#define _JTEST_GROUP_DEFINE_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "jtest_util.h"
#include "jtest_define.h"
#include "jtest_group.h"
/* For defining macros with optional arguments */
#include "opt_arg/opt_arg.h"
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
/**
* Prefix for all #JTEST_GROUP_t structs.
*/
#define JTEST_GROUP_STRUCT_NAME_PREFIX G_JTEST_GROUP_STRUCT_
/**
* Define test template used by #JTEST_GROUP_t tests.
*/
#define JTEST_GROUP_FN_TEMPLATE(group_fn) \
void group_fn(void)
#define JTEST_GROUP_FN_PROTOTYPE JTEST_GROUP_FN_TEMPLATE /**< Alias for
#JTEST_GROUP_FN_TEMPLATE. */
/**
* Evaluate to the name of the #JTEST_GROUP_t struct associated with group_fn.
*/
#define JTEST_GROUP_STRUCT_NAME(group_fn) \
JTEST_STRUCT_NAME(JTEST_GROUP_STRUCT_NAME_PREFIX, group_fn)
/**
* Define a #JTEST_GROUP_t struct based on the given group_fn.
*/
#define JTEST_GROUP_DEFINE_STRUCT(group_fn) \
JTEST_DEFINE_STRUCT(JTEST_GROUP_t, \
JTEST_GROUP_STRUCT_NAME(group_fn))
/**
* Declare a #JTEST_GROUP_t struct based on the given group_fn.
*/
#define JTEST_GROUP_DECLARE_STRUCT(group_fn) \
JTEST_DECLARE_STRUCT(JTEST_GROUP_DEFINE_STRUCT(group_fn))
/**
* Contents needed to initialize a JTEST_GROUP_t struct.
*/
#define JTEST_GROUP_STRUCT_INIT(group_fn) \
group_fn, \
STR_NL(group_fn), \
JTEST_PF_MEMBER_INIT
/**
* Initialize the contents of a #JTEST_GROUP_t struct.
*/
#define JTEST_GROUP_INIT(group_fn) \
JTEST_GROUP_DEFINE_STRUCT(group_fn) = { \
JTEST_GROUP_STRUCT_INIT(group_fn) \
}
/* Test Definition Macro */
/*--------------------------------------------------------------------------------*/
/**
* Define a #JTEST_GROUP_t object and a test function.
*/
#define JTEST_DEFINE_GROUP(group_fn) \
JTEST_GROUP_FN_PROTOTYPE(group_fn); \
JTEST_GROUP_INIT(group_fn); \
JTEST_GROUP_FN_PROTOTYPE(group_fn) /* Notice the lacking semicolon */
/**
* Declare a #JTEST_GROUP_t object and a test function prototype.
*/
#define JTEST_DECLARE_GROUP(group_fn) \
JTEST_GROUP_FN_PROTOTYPE(group_fn); \
JTEST_GROUP_DECLARE_STRUCT(group_fn) /* Note the lacking semicolon */
#endif /* _JTEST_GROUP_DEFINE_H_ */

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#ifndef _JTEST_PF_H_
#define _JTEST_PF_H_
/*--------------------------------------------------------------------------------*/
/* Purpose */
/*--------------------------------------------------------------------------------*/
/* jtest_pf.h Contains macros useful for capturing pass/fail data. */
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
/**
* Members that can be added to other structs to extend them pass/fail data and
* corresponding functionality.
*/
#define JTEST_PF_MEMBERS \
uint32_t passed; \
uint32_t failed /* Note the lacking semicolon*/ \
/**
* Used for initializing JTEST_PF_MEMBERS in a struct declaration.
*/
#define JTEST_PF_MEMBER_INIT \
0, \
0
/* Member-Incrementing Macros */
/*--------------------------------------------------------------------------------*/
/**
* Dispatch macro for incrementing #JTEST_PF_MEMBERS.
*
* @param xxx Values: 'passed', 'failed'
*/
#define JTEST_PF_INC_XXX(xxx, struct_pf_ptr, amount) \
do \
{ \
((struct_pf_ptr)->xxx) += (amount); \
} while (0)
/**
* Specialization of the #JTEST_PF_INC_XXX macro to increment the passed
* member.
*/
#define JTEST_PF_INC_PASSED(struct_pf_ptr, amount) \
JTEST_PF_INC_XXX(passed, struct_pf_ptr, amount)
/**
* Specialization of the #JTEST_PF_INC_XXX macro to increment the failed
* member.
*/
#define JTEST_PF_INC_FAILED(struct_pf_ptr, amount) \
JTEST_PF_INC_XXX(failed, struct_pf_ptr, amount)
/* Member-Resetting Macros */
/*--------------------------------------------------------------------------------*/
/**
* Dispatch macro for setting #JTEST_PF_MEMBERS to zero.
*
* @param xxx Values: 'passed', 'failed'
*/
#define JTEST_PF_RESET_XXX(xxx, struct_pf_ptr) \
do \
{ \
((struct_pf_ptr)->xxx) = UINT32_C(0); \
} while (0)
/**
* Specialization of #JTEST_PF_RESET_XXX for the 'passed' member.
*/
#define JTEST_PF_RESET_PASSED(struct_pf_ptr) \
JTEST_PF_RESET_XXX(passed, struct_pf_ptr)
/**
* Specialization of #JTEST_PF_RESET_XXX for the 'failed' member.
*/
#define JTEST_PF_RESET_FAILED(struct_pf_ptr) \
JTEST_PF_RESET_XXX(failed, struct_pf_ptr)
#endif /* _JTEST_PF_H_ */

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#ifndef _JTEST_SYSTICK_H_
#define _JTEST_SYSTICK_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
/* Get access to the SysTick structure. */
#if defined ARMCM0
#include "ARMCM0.h"
#elif defined ARMCM0P
#include "ARMCM0plus.h"
#elif defined ARMCM3
#include "ARMCM3.h"
#elif defined ARMCM4
#include "ARMCM4.h"
#elif defined ARMCM4_FP
#include "ARMCM4_FP.h"
#elif defined ARMCM7
#include "ARMCM7.h"
#elif defined ARMCM7_SP
#include "ARMCM7_SP.h"
#elif defined ARMCM7_DP
#include "ARMCM7_DP.h"
#elif defined ARMSC000
#include "ARMSC000.h"
#elif defined ARMSC300
#include "ARMSC300.h"
#elif defined ARMv8MBL
#include "ARMv8MBL.h"
#elif defined ARMv8MML
#include "ARMv8MML.h"
#elif defined ARMv8MML_DSP
#include "ARMv8MML_DSP.h"
#elif defined ARMv8MML_SP
#include "ARMv8MML_SP.h"
#elif defined ARMv8MML_DSP_SP
#include "ARMv8MML_DSP_SP.h"
#elif defined ARMv8MML_DP
#include "ARMv8MML_DP.h"
#elif defined ARMv8MML_DSP_DP
#include "ARMv8MML_DSP_DP.h"
#else
#warning "no appropriate header file found!"
#endif
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
/**
* Initial value for the SysTick module.
*
* @note This is also the maximum value, important as SysTick is a decrementing
* counter.
*/
#define JTEST_SYSTICK_INITIAL_VALUE 0xFFFFFF
/**
* Reset the SysTick, decrementing timer to it's maximum value and disable it.
*
* This macro should leave the SysTick timer in a state that's ready for cycle
* counting.
*/
#define JTEST_SYSTICK_RESET(systick_ptr) \
do \
{ \
(systick_ptr)->LOAD = JTEST_SYSTICK_INITIAL_VALUE; \
(systick_ptr)->VAL = 1; \
\
/* Disable the SysTick module. */ \
(systick_ptr)->CTRL = UINT32_C(0x000000); \
} while (0)
/**
* Start the SysTick timer, sourced by the processor clock.
*/
#define JTEST_SYSTICK_START(systick_ptr) \
do \
{ \
(systick_ptr)->CTRL = \
SysTick_CTRL_ENABLE_Msk | \
SysTick_CTRL_CLKSOURCE_Msk; /* Internal clk*/ \
} while (0)
/**
* Evaluate to the current value of the SysTick timer.
*/
#define JTEST_SYSTICK_VALUE(systick_ptr) \
((systick_ptr)->VAL)
#endif /* _JTEST_SYSTICK_H_ */

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#ifndef _JTEST_TEST_H_
#define _JTEST_TEST_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include <stdint.h>
#include "jtest_util.h"
#include "jtest_test_ret.h"
/*--------------------------------------------------------------------------------*/
/* Type Definitions */
/*--------------------------------------------------------------------------------*/
/**
* A struct which represents a Test in the JTEST framework. This struct is
* used to enable, run, and describe the test it represents.
*/
typedef struct JTEST_TEST_struct
{
JTEST_TEST_RET_t ( * test_fn_ptr)(void); /**< Pointer to the test function. */
char * test_fn_str; /**< Name of the test function */
char * fut_str; /**< Name of the function under test. */
/**
* Flags that govern how the #JTEST_TEST_t behaves.
*/
union {
struct {
unsigned enabled : 1;
unsigned unused : 7;
} bits;
uint8_t byte; /* Access all flags at once. */
} flags;
} JTEST_TEST_t;
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
/**
* Assign a test function to the #JTEST_TEST_t struct.
*/
#define JTEST_TEST_SET_FN(jtest_test_ptr, fn_ptr) \
JTEST_SET_STRUCT_ATTRIBUTE(jtest_test_ptr, test_fn_ptr, fn_ptr)
/**
* Specify a function under test (FUT) for the #JTEST_TEST_t struct.
*/
#define JTEST_TEST_SET_FUT(jtest_test_ptr, str) \
JTEST_SET_STRUCT_ATTRIBUTE(jtest_test_ptr, fut_str, str)
/* Macros concerning JTEST_TEST_t flags */
/*--------------------------------------------------------------------------------*/
#define JTEST_TEST_FLAG_SET 1 /**< Value of a set #JTEST_TEST_t flag. */
#define JTEST_TEST_FLAG_CLR 0 /**< Value of a cleared #JTEST_TEST_t flag. */
/**
* Evaluate to the flag in #JTEST_TEST_t having flag_name.
*/
#define JTEST_TEST_FLAG(jtest_test_ptr, flag_name) \
((jtest_test_ptr)->flags.bits.flag_name)
/**
* Dispatch macro for setting and clearing #JTEST_TEST_t flags.
*
* @param jtest_test_ptr Pointer to a #JTEST_TEST_t struct.
* @param flag_name Name of the flag to set in #JTEST_TEST_t.flags.bits
* @param xxx Vaid values: "SET" or "CLR"
*
* @note This function depends on JTEST_TEST_FLAG_SET and JTEST_TEST_FLAG_CLR.
*/
#define JTEST_TEST_XXX_FLAG(jtest_test_ptr, flag_name, xxx) \
do \
{ \
JTEST_TEST_FLAG(jtest_test_ptr, flag_name) = JTEST_TEST_FLAG_##xxx ; \
} while (0)
/**
* Specification of #JTEST_TEST_XXX_FLAG to set #JTEST_TEST_t flags.
*/
#define JTEST_TEST_SET_FLAG(jtest_test_ptr, flag_name) \
JTEST_TEST_XXX_FLAG(jtest_test_ptr, flag_name, SET)
/**
* Specification of #JTEST_TEST_XXX_FLAG to clear #JTEST_TEST_t flags.
*/
#define JTEST_TEST_CLR_FLAG(jtest_test_ptr, flag_name) \
JTEST_TEST_XXX_FLAG(jtest_test_ptr, flag_name, CLR)
/**
* Evaluate to true if the #JTEST_TEST_t is enabled.
*/
#define JTEST_TEST_IS_ENABLED(jtest_test_ptr) \
(JTEST_TEST_FLAG(jtest_test_ptr, enabled) == JTEST_TEST_FLAG_SET)
#endif /* _JTEST_TEST_H_ */

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#ifndef _JTEST_TEST_CALL_H_
#define _JTEST_TEST_CALL_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "jtest_test.h"
#include "jtest_test_define.h"
#include "jtest_fw.h"
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
/**
* Exectute the test in the #JTEST_TEST_t struct associated with the identifier
* test_fn and store the result in retval.
*/
#define JTEST_TEST_RUN(retval, test_fn) \
do \
{ \
JTEST_DUMP_STR("Test Name:\n"); \
JTEST_DUMP_STR(JTEST_TEST_STRUCT_NAME(test_fn).test_fn_str); \
JTEST_DUMP_STR("Function Under Test:\n"); \
JTEST_DUMP_STR(JTEST_TEST_STRUCT_NAME(test_fn).fut_str); \
retval = JTEST_TEST_STRUCT_NAME(test_fn).test_fn_ptr(); \
} while (0)
/**
* Update the enclosing #JTEST_GROUP_t's pass/fail information based on
* test_retval.
*
* @param test_retval A #JTEST_TEST_RET_enum for the current test.
*
* @warning Only use if #JTEST_TEST_t is called in the context of a
* #JTEST_GROUP_t.
*/
#define JTEST_TEST_UPDATE_PARENT_GROUP_PF(test_retval) \
do \
{ \
/* Update enclosing JTEST_GROUP_t with pass/fail info */ \
if (test_retval == JTEST_TEST_PASSED) \
{ \
JTEST_GROUP_INC_PASSED(JTEST_CURRENT_GROUP_PTR(), 1); \
} else { \
JTEST_GROUP_INC_FAILED(JTEST_CURRENT_GROUP_PTR(), 1); \
} \
} while (0)
/**
* Update the #JTEST_FW with pass/fail information based on test_retval.
*
* @param test_retval A #JTEST_TEST_RET_enum for the current test.
*/
#define JTEST_TEST_UPDATE_FW_PF(test_retval) \
do \
{ \
/* Update the JTEST_FW with pass/fail info */ \
if (test_retval == JTEST_TEST_PASSED) \
{ \
JTEST_FW_INC_PASSED( 1); \
} else { \
JTEST_FW_INC_FAILED(1); \
} \
} while (0)
/**
* Update the enclosing JTEST_GROUP_t's pass/fail information, or the
* #JTEST_FW's if this test has no enclosing #JTEST_GROUP_t.
*
* @param test_retval A #JTEST_TEST_RET_enum for the current test.
*/
#define JTEST_TEST_UPDATE_PARENT_GROUP_OR_FW_PF(test_retval) \
do \
{ \
/* Update pass-fail information */ \
if (JTEST_CURRENT_GROUP_PTR() /* Non-null */) \
{ \
JTEST_TEST_UPDATE_PARENT_GROUP_PF(test_retval); \
} else { \
JTEST_TEST_UPDATE_FW_PF(test_retval); \
} \
} while (0)
/**
* Dump the results of the test to the Keil Debugger.
*/
#define JTEST_TEST_DUMP_RESULTS(test_retval) \
do \
{ \
if (test_retval == JTEST_TEST_PASSED) \
{ \
JTEST_DUMP_STR("Test Passed\n"); \
} else { \
JTEST_DUMP_STR("Test Failed\n"); \
} \
} while (0)
/**
* Call the #JTEST_TEST_t assocaited with the identifier test_fn.
*/
#define JTEST_TEST_CALL(test_fn) \
do \
{ \
if (JTEST_TEST_IS_ENABLED(&JTEST_TEST_STRUCT_NAME(test_fn))) \
{ \
/* Default to failure */ \
JTEST_TEST_RET_t __jtest_test_ret = JTEST_TEST_FAILED; \
\
JTEST_ACT_TEST_START(); \
JTEST_TEST_RUN(__jtest_test_ret, test_fn); \
\
/* Update pass-fail information */ \
JTEST_TEST_UPDATE_PARENT_GROUP_OR_FW_PF(__jtest_test_ret); \
\
JTEST_TEST_DUMP_RESULTS(__jtest_test_ret); \
JTEST_ACT_TEST_END(); \
} \
} while (0)
#endif /* _JTEST_TEST_CALL_H_ */

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#ifndef _JTEST_TEST_DEFINE_H_
#define _JTEST_TEST_DEFINE_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "jtest_util.h"
#include "jtest_define.h"
#include "jtest_test.h"
/* For defining macros with optional arguments */
#include "opt_arg/opt_arg.h"
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
/**
* Prefix for all #JTEST_TEST_t structs.
*/
#define JTEST_TEST_STRUCT_NAME_PREFIX G_JTEST_TEST_STRUCT_
/**
* Define test template used by #JTEST_TEST_t tests.
*/
#define JTEST_TEST_FN_TEMPLATE(test_fn) \
JTEST_TEST_RET_t test_fn(void)
#define JTEST_TEST_FN_PROTOTYPE JTEST_TEST_FN_TEMPLATE /**< Alias for
* #JTEST_TEST_FN_TEMPLATE. */
/**
* Evaluate to the name of the #JTEST_TEST_t struct associated with test_fn.
*/
#define JTEST_TEST_STRUCT_NAME(test_fn) \
JTEST_STRUCT_NAME(JTEST_TEST_STRUCT_NAME_PREFIX, test_fn)
/**
* Define a #JTEST_TEST_t struct based on the given test_fn.
*/
#define JTEST_TEST_DEFINE_STRUCT(test_fn) \
JTEST_DEFINE_STRUCT(JTEST_TEST_t, \
JTEST_TEST_STRUCT_NAME(test_fn))
/**
* Declare a #JTEST_TEST_t struct based on the given test_fn.
*/
#define JTEST_TEST_DECLARE_STRUCT(test_fn) \
JTEST_DECLARE_STRUCT(JTEST_TEST_DEFINE_STRUCT(test_fn))
/**
* Contents needed to initialize a JTEST_TEST_t struct.
*/
#define JTEST_TEST_STRUCT_INIT(test_fn, fut, enable) \
test_fn, \
STR_NL(test_fn), \
STR_NL(fut), \
{ \
{ \
enable, \
0 \
} \
} \
/**
* Initialize the contents of a #JTEST_TEST_t struct.
*/
#define JTEST_TEST_INIT(test_fn, fut, enable) \
JTEST_TEST_DEFINE_STRUCT(test_fn) = { \
JTEST_TEST_STRUCT_INIT(test_fn, fut, enable) \
}
/* Test Definition Macro */
/*--------------------------------------------------------------------------------*/
/**
* Define a #JTEST_TEST_t object and a test function.
*/
#define _JTEST_DEFINE_TEST(test_fn, fut, enable) \
JTEST_TEST_FN_PROTOTYPE(test_fn); \
JTEST_TEST_INIT(test_fn, fut, enable); \
JTEST_TEST_FN_PROTOTYPE(test_fn) /* Notice the lacking semicolon */
/**
* Declare a #JTEST_TEST_t object and a test function prototype.
*/
#define JTEST_DECLARE_TEST(test_fn) \
JTEST_TEST_FN_PROTOTYPE(test_fn); \
JTEST_TEST_DECLARE_STRUCT(test_fn) /* Note the lacking semicolon */
/*--------------------------------------------------------------------------------*/
/* Macros with optional arguments */
/*--------------------------------------------------------------------------------*/
/* Top-level Interface */
#define JTEST_DEFINE_TEST(...) \
JTEST_DEFINE_TEST_(PP_NARG(__VA_ARGS__), ##__VA_ARGS__)
/* Dispatch Macro*/
#define JTEST_DEFINE_TEST_(N, ...) \
SPLICE(JTEST_DEFINE_TEST_, N)(__VA_ARGS__)
/* Default Arguments */
#define JTEST_DEFINE_TEST_DEFAULT_FUT /* Blank */
#define JTEST_DEFINE_TEST_DEFAULT_ENABLE \
JTEST_TRUE /* Tests enabled by
* default. */
/* Dispatch Cases*/
#define JTEST_DEFINE_TEST_1(_1) \
_JTEST_DEFINE_TEST( \
_1, \
JTEST_DEFINE_TEST_DEFAULT_FUT, \
JTEST_DEFINE_TEST_DEFAULT_ENABLE \
)
#define JTEST_DEFINE_TEST_2(_1, _2) \
_JTEST_DEFINE_TEST( \
_1, \
_2, \
JTEST_DEFINE_TEST_DEFAULT_ENABLE \
)
#define JTEST_DEFINE_TEST_3(_1, _2, _3) \
_JTEST_DEFINE_TEST( \
_1, \
_2, \
_3 \
)
#endif /* _JTEST_TEST_DEFINE_H_ */

17
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#ifndef _JTEST_TEST_RET_H_
#define _JTEST_TEST_RET_H_
/*--------------------------------------------------------------------------------*/
/* Type Definitions */
/*--------------------------------------------------------------------------------*/
/**
* Values a #JTEST_TEST_t can return.
*/
typedef enum JTEST_TEST_RET_enum
{
JTEST_TEST_PASSED,
JTEST_TEST_FAILED
} JTEST_TEST_RET_t;
#endif /* _JTEST_TEST_RET_H_ */

27
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#ifndef _JTEST_UTIL_H_
#define _JTEST_UTIL_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "util/util.h"
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
/* Define boolean values for the framework. */
#define JTEST_TRUE 1 /**< Value used for TRUE in JTEST. */
#define JTEST_FALSE 0 /**< Value used for FALSE in JTEST. */
/**
* Set the value of the attribute in the struct to by struct_ptr to value.
*/
#define JTEST_SET_STRUCT_ATTRIBUTE(struct_ptr, attribute, value) \
do \
{ \
(struct_ptr)->attribute = (value); \
} while (0)
#endif /* _JTEST_UTIL_H_ */

15
MCU_STM32F4xx_Matlab/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/opt_arg/opt_arg.h Normal file
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#ifndef _OPT_ARG_H_
#define _OPT_ARG_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "pp_narg.h"
#include "splice.h"
/* If you are Joseph Jaoudi, you have a snippet which expands into an
example. If you are not Joseph, but possess his code, study the examples. If
you have no examples, turn back contact Joseph. */
#endif /* _OPT_ARG_H_ */

25
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#ifndef _PP_NARG_H_
#define _PP_NARG_H_
#define PP_NARG(...) \
PP_NARG_(__VA_ARGS__,PP_RSEQ_N())
#define PP_NARG_(...) \
PP_ARG_N(__VA_ARGS__)
#define PP_ARG_N( \
_1, _2, _3, _4, _5, _6, _7, _8, _9,_10, \
_11,_12,_13,_14,_15,_16,_17,_18,_19,_20, \
_21,_22,_23,_24,_25,_26,_27,_28,_29,_30, \
_31,_32,_33,_34,_35,_36,_37,_38,_39,_40, \
_41,_42,_43,_44,_45,_46,_47,_48,_49,_50, \
_51,_52,_53,_54,_55,_56,_57,_58,_59,_60, \
_61,_62,_63,N,...) N
#define PP_RSEQ_N() \
63,62,61,60, \
59,58,57,56,55,54,53,52,51,50, \
49,48,47,46,45,44,43,42,41,40, \
39,38,37,36,35,34,33,32,31,30, \
29,28,27,26,25,24,23,22,21,20, \
19,18,17,16,15,14,13,12,11,10, \
9,8,7,6,5,4,3,2,1,0
#endif /* _PP_NARG_H_ */

8
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#ifndef _SPLICE_H_
#define _SPLICE_H_
#define SPLICE(a,b) SPLICE_1(a,b)
#define SPLICE_1(a,b) SPLICE_2(a,b)
#define SPLICE_2(a,b) a##b
#endif /* _SPLICE_H_ */

52
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#ifndef _UTIL_H_
#define _UTIL_H_
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
/**
* Convert a symbol to a string and add a 'NewLine'.
*/
#define STR_NL(x) STR1_NL(x)
#define STR1_NL(x) (STR2_NL(x)"\n")
#define STR2_NL(x) #x
/**
* Convert a symbol to a string.
*/
#define STR(x) STR1(x)
#define STR1(x) STR2(x)
#define STR2(x) #x
/**
* Concatenate two symbols.
*/
#define CONCAT(a, b) CONCAT1(a, b)
#define CONCAT1(a, b) CONCAT2(a, b)
#define CONCAT2(a, b) a##b
/**
* Place curly braces around a varaible number of macro arguments.
*/
#define CURLY(...) {__VA_ARGS__}
/**
* Place parenthesis around a variable number of macro arguments.
*/
#define PAREN(...) (__VA_ARGS__)
/* Standard min/max macros. */
#define MIN(x,y) (((x) < (y)) ? (x) : (y) )
#define MAX(x,y) (((x) > (y)) ? (x) : (y) )
/**
* Bound value using low and high limits.
*
* Evaluate to a number in the range, endpoint inclusive.
*/
#define BOUND(low, high, value) \
MAX(MIN(high, value), low)
#endif /* _UTIL_H_ */

9
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#include "../inc/jtest_cycle.h"
#include <inttypes.h>
/*--------------------------------------------------------------------------------*/
/* Define Module Variables */
/*--------------------------------------------------------------------------------*/
/* const char * JTEST_CYCLE_STRF = "Running: %s\nCycles: %" PRIu32 "\n"; */
const char * JTEST_CYCLE_STRF = "Cycles: %" PRIu32 "\n"; /* function name + parameter string skipped */

36
MCU_STM32F4xx_Matlab/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/src/jtest_dump_str_segments.c Normal file
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#include "jtest_fw.h"
/**
* Dump the JTEST_FW.str_buffer the Keil framework in pieces.
*
* The JTEST_FW.str_buffer contains more characters than the Keil framework can
* dump at once. This function dumps them in blocks.
*/
void jtest_dump_str_segments(void)
{
uint32_t seg_idx = 0;
uint32_t memmove_idx = 0;
uint32_t seg_cnt =
(strlen(JTEST_FW.str_buffer) / JTEST_STR_MAX_OUTPUT_SIZE) + 1;
for( seg_idx = 0; seg_idx < seg_cnt; ++seg_idx)
{
JTEST_TRIGGER_ACTION(dump_str);
if (seg_idx < JTEST_STR_MAX_OUTPUT_SEGMENTS)
{
memmove_idx = 0;
while (memmove_idx < (seg_cnt - seg_idx -1) )
{
memmove(
JTEST_FW.str_buffer+
(memmove_idx* JTEST_STR_MAX_OUTPUT_SIZE),
JTEST_FW.str_buffer+
((memmove_idx+1)*JTEST_STR_MAX_OUTPUT_SIZE),
JTEST_BUF_SIZE);
++memmove_idx;
}
}
}
return;
}

9
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#include "../inc/jtest.h"
/*--------------------------------------------------------------------------------*/
/* Define Global Variables */
/*--------------------------------------------------------------------------------*/
char JTEST_FW_STR_BUFFER[JTEST_BUF_SIZE] = {0};
volatile JTEST_FW_t JTEST_FW = {0};

37
MCU_STM32F4xx_Matlab/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/src/jtest_trigger_action.c Normal file
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#include "jtest_fw.h"
void test_start (void) {
// ;
JTEST_FW.test_start++;
}
void test_end (void) {
// ;
JTEST_FW.test_end++;
}
void group_start (void) {
// ;
JTEST_FW.group_start++;
}
void group_end (void) {
// ;
JTEST_FW.group_end++;
}
void dump_str (void) {
// ;
JTEST_FW.dump_str++;
}
void dump_data (void) {
// ;
JTEST_FW.dump_data++;
}
void exit_fw (void) {
// ;
JTEST_FW.exit_fw++;
}

9
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#ifndef _ALL_TESTS_H_
#define _ALL_TESTS_H_
/*--------------------------------------------------------------------------------*/
/* Declare Test Groups */
/*--------------------------------------------------------------------------------*/
JTEST_DECLARE_GROUP(all_tests);
#endif /* _ALL_TESTS_H_ */

267
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#ifndef _BASIC_MATH_TEMPLATES_H_
#define _BASIC_MATH_TEMPLATES_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "test_templates.h"
/*--------------------------------------------------------------------------------*/
/* Group Specific Templates */
/*--------------------------------------------------------------------------------*/
/**
* Compare the outputs used by basic math tests for the function under test and
* the reference function.
*/
#define BASIC_MATH_COMPARE_INTERFACE(block_size, output_type) \
TEST_ASSERT_BUFFERS_EQUAL( \
basic_math_output_ref.data_ptr, \
basic_math_output_fut.data_ptr, \
block_size * sizeof(output_type))
/*
* Comparison SNR thresholds for the data types used in basic_math_tests.
*/
#define BASIC_MATH_SNR_THRESHOLD_float32_t 120
#define BASIC_MATH_SNR_THRESHOLD_q31_t 100
#define BASIC_MATH_SNR_THRESHOLD_q15_t 75
#define BASIC_MATH_SNR_THRESHOLD_q7_t 25
/**
* Compare reference and fut outputs using SNR.
*
* @note The outputs are converted to float32_t before comparison.
*/
#define BASIC_MATH_SNR_COMPARE_INTERFACE(block_size, output_type) \
do \
{ \
TEST_CONVERT_AND_ASSERT_SNR( \
basic_math_output_f32_ref, \
basic_math_output_ref.data_ptr, \
basic_math_output_f32_fut, \
basic_math_output_fut.data_ptr, \
block_size, \
output_type, \
BASIC_MATH_SNR_THRESHOLD_##output_type \
); \
} while (0)
/**
* Compare reference and fut outputs using SNR.
*
* @note The outputs are converted to float32_t before comparison.
*/
#define BASIC_MATH_SNR_ELT1_COMPARE_INTERFACE(block_size, output_type) \
do \
{ \
TEST_CONVERT_AND_ASSERT_SNR( \
basic_math_output_f32_ref, \
basic_math_output_ref.data_ptr, \
basic_math_output_f32_fut, \
basic_math_output_fut.data_ptr, \
1, \
output_type, \
BASIC_MATH_SNR_THRESHOLD_##output_type \
); \
} while (0)
/*--------------------------------------------------------------------------------*/
/* Input Interfaces */
/*--------------------------------------------------------------------------------*/
/*
* General:
* Input interfaces provide inputs to functions inside test templates. They
* ONLY provide the inputs. The output variables should be hard coded.
*
* The input interfaces must have the following format:
*
* ARM_xxx_INPUT_INTERFACE() or
* REF_xxx_INPUT_INTERFACE()
*
* The xxx must be lowercase, and is intended to be the indentifying substring
* in the function's name. Acceptable values are 'sub' or 'add' from the
* functions arm_add_q31.
*/
#define ARM_abs_INPUT_INTERFACE(input, block_size) \
PAREN(input, basic_math_output_fut.data_ptr, block_size)
#define REF_abs_INPUT_INTERFACE(input, block_size) \
PAREN(input, basic_math_output_ref.data_ptr, block_size)
#define ARM_add_INPUT_INTERFACE(input_a, input_b, block_size) \
PAREN(input_a, input_b, basic_math_output_fut.data_ptr, block_size) \
#define REF_add_INPUT_INTERFACE(input_a, input_b, block_size) \
PAREN(input_a, input_b, basic_math_output_ref.data_ptr, block_size) \
#define ARM_dot_prod_INPUT_INTERFACE(input_a, input_b, block_size) \
PAREN(input_a, input_b, block_size, basic_math_output_fut.data_ptr) \
#define REF_dot_prod_INPUT_INTERFACE(input_a, input_b, block_size) \
PAREN(input_a, input_b, block_size, basic_math_output_ref.data_ptr) \
#define ARM_mult_INPUT_INTERFACE(input_a, input_b, block_size) \
PAREN(input_a, input_b, basic_math_output_fut.data_ptr, block_size) \
#define REF_mult_INPUT_INTERFACE(input_a, input_b, block_size) \
PAREN(input_a, input_b, basic_math_output_ref.data_ptr, block_size) \
#define ARM_negate_INPUT_INTERFACE(input, block_size) \
PAREN(input, basic_math_output_fut.data_ptr, block_size)
#define REF_negate_INPUT_INTERFACE(input, block_size) \
PAREN(input, basic_math_output_ref.data_ptr, block_size)
#define ARM_offset_INPUT_INTERFACE(input, elt, block_size) \
PAREN(input, elt, basic_math_output_fut.data_ptr, block_size) \
#define REF_offset_INPUT_INTERFACE(input, elt, block_size) \
PAREN(input, elt, basic_math_output_ref.data_ptr, block_size) \
#define ARM_shift_INPUT_INTERFACE(input, elt, block_size) \
PAREN(input, elt, basic_math_output_fut.data_ptr, block_size) \
#define REF_shift_INPUT_INTERFACE(input, elt, block_size) \
PAREN(input, elt, basic_math_output_ref.data_ptr, block_size) \
#define ARM_scale_float_INPUT_INTERFACE(input, elt, block_size) \
PAREN(input, elt, basic_math_output_fut.data_ptr, block_size) \
#define REF_scale_float_INPUT_INTERFACE(input, elt, block_size) \
PAREN(input, elt, basic_math_output_ref.data_ptr, block_size) \
/* These two are for the fixed point functions */
#define ARM_scale_INPUT_INTERFACE(input, elt1, elt2, block_size) \
PAREN(input, elt1, elt2, basic_math_output_fut.data_ptr, block_size) \
#define REF_scale_INPUT_INTERFACE(input, elt1, elt2, block_size) \
PAREN(input, elt1, elt2, basic_math_output_ref.data_ptr, block_size) \
#define ARM_sub_INPUT_INTERFACE(input_a, input_b, block_size) \
PAREN(input_a, input_b, basic_math_output_fut.data_ptr, block_size) \
#define REF_sub_INPUT_INTERFACE(input_a, input_b, block_size) \
PAREN(input_a, input_b, basic_math_output_ref.data_ptr, block_size) \
/*--------------------------------------------------------------------------------*/
/* Test Templates */
/*--------------------------------------------------------------------------------*/
/**
* Specialization of #TEST_TEMPLATE_BUF1_BLK() for basic math tests.
*
* @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
* REF_xxx_INPUT_INTERFACEs.
*/
#define BASIC_MATH_DEFINE_TEST_TEMPLATE_BUF1_BLK(fn_name, \
suffix, \
input_type, \
output_type) \
JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test, \
arm_##fn_name##_##suffix) \
{ \
TEST_TEMPLATE_BUF1_BLK( \
basic_math_f_all, \
basic_math_block_sizes, \
input_type, \
output_type, \
arm_##fn_name##_##suffix, \
ARM_##fn_name##_INPUT_INTERFACE, \
ref_##fn_name##_##suffix, \
REF_##fn_name##_INPUT_INTERFACE, \
BASIC_MATH_COMPARE_INTERFACE); \
}
/**
* Specialization of #TEST_TEMPLATE_BUF2_BLK() for basic math tests.
*
* @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
* REF_xxx_INPUT_INTERFACEs.
*/
#define BASIC_MATH_DEFINE_TEST_TEMPLATE_BUF2_BLK(fn_name, \
suffix, \
input_type, \
output_type, \
comparison_interface) \
JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test, \
arm_##fn_name##_##suffix) \
{ \
TEST_TEMPLATE_BUF2_BLK( \
basic_math_f_all, \
basic_math_f_all, \
basic_math_block_sizes, \
input_type, \
output_type, \
arm_##fn_name##_##suffix, \
ARM_##fn_name##_INPUT_INTERFACE, \
ref_##fn_name##_##suffix, \
REF_##fn_name##_INPUT_INTERFACE, \
comparison_interface); \
}
/**
* Specialization of #TEST_TEMPLATE_BUF1_ELT1_BLK() for basic math tests.
*
* @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
* REF_xxx_INPUT_INTERFACEs.
*/
#define BASIC_MATH_DEFINE_TEST_TEMPLATE_BUF1_ELT1_BLK(fn_name, \
suffix, \
input_type, \
elt_type, \
output_type) \
JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test, \
arm_##fn_name##_##suffix) \
{ \
TEST_TEMPLATE_BUF1_ELT1_BLK( \
basic_math_f_all, \
basic_math_elts, \
basic_math_block_sizes, \
input_type, \
elt_type, \
output_type, \
arm_##fn_name##_##suffix, \
ARM_##fn_name##_INPUT_INTERFACE, \
ref_##fn_name##_##suffix, \
REF_##fn_name##_INPUT_INTERFACE, \
BASIC_MATH_COMPARE_INTERFACE); \
}
/**
* Specialization of #TEST_TEMPLATE_BUF1_ELT2_BLK() for basic math tests.
*
* @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
* REF_xxx_INPUT_INTERFACEs.
*/
#define BASIC_MATH_DEFINE_TEST_TEMPLATE_BUF1_ELT2_BLK(fn_name, \
suffix, \
input_type, \
elt1_type, \
elt2_type, \
output_type) \
JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test, \
arm_##fn_name##_##suffix) \
{ \
TEST_TEMPLATE_BUF1_ELT2_BLK( \
basic_math_f_all, \
basic_math_elts, \
basic_math_elts2, \
basic_math_block_sizes, \
input_type, \
elt1_type, \
elt2_type, \
output_type, \
arm_##fn_name##_##suffix, \
ARM_##fn_name##_INPUT_INTERFACE, \
ref_##fn_name##_##suffix, \
REF_##fn_name##_INPUT_INTERFACE, \
BASIC_MATH_COMPARE_INTERFACE); \
}
#endif /* _BASIC_MATH_TEMPLATES_H_ */

46
MCU_STM32F4xx_Matlab/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/inc/basic_math_tests/basic_math_test_data.h Normal file
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#ifndef ARM_BASIC_MATH_TEST_DATA_H
#define ARM_BASIC_MATH_TEST_DATA_H
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "arr_desc.h"
#include "arm_math.h"
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
#define BASIC_MATH_MAX_INPUT_ELEMENTS 32
#define BASIC_MATH_BIGGEST_INPUT_TYPE float32_t
/*--------------------------------------------------------------------------------*/
/* Declare Variables */
/*--------------------------------------------------------------------------------*/
/* Input/Output Buffers */
ARR_DESC_DECLARE(basic_math_output_fut);
ARR_DESC_DECLARE(basic_math_output_ref);
extern BASIC_MATH_BIGGEST_INPUT_TYPE
basic_math_output_f32_ref[BASIC_MATH_MAX_INPUT_ELEMENTS];
extern BASIC_MATH_BIGGEST_INPUT_TYPE
basic_math_output_f32_fut[BASIC_MATH_MAX_INPUT_ELEMENTS];
/* Block Sizes*/
ARR_DESC_DECLARE(basic_math_block_sizes);
/* Numbers */
ARR_DESC_DECLARE(basic_math_elts);
ARR_DESC_DECLARE(basic_math_elts2);
ARR_DESC_DECLARE(basic_math_eltsf);
/* Float Inputs */
ARR_DESC_DECLARE(basic_math_zeros);
ARR_DESC_DECLARE(basic_math_f_2);
ARR_DESC_DECLARE(basic_math_f_15);
ARR_DESC_DECLARE(basic_math_f_32);
ARR_DESC_DECLARE(basic_math_f_all);
#endif

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#ifndef _BASIC_MATH_TEST_GROUP_H_
#define _BASIC_MATH_TEST_GROUP_H_
/*--------------------------------------------------------------------------------*/
/* Declare Test Groups */
/*--------------------------------------------------------------------------------*/
JTEST_DECLARE_GROUP(basic_math_tests);
#endif /* _BASIC_MATH_TEST_GROUP_H_ */

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#ifndef _BASIC_MATH_TESTS_H_
#define _BASIC_MATH_TESTS_H_
/*--------------------------------------------------------------------------------*/
/* Test/Group Declarations */
/*--------------------------------------------------------------------------------*/
JTEST_DECLARE_GROUP(abs_tests);
JTEST_DECLARE_GROUP(add_tests);
JTEST_DECLARE_GROUP(dot_prod_tests);
JTEST_DECLARE_GROUP(mult_tests);
JTEST_DECLARE_GROUP(negate_tests);
JTEST_DECLARE_GROUP(offset_tests);
JTEST_DECLARE_GROUP(scale_tests);
JTEST_DECLARE_GROUP(shift_tests);
JTEST_DECLARE_GROUP(sub_tests);
#endif /* _BASIC_MATH_TESTS_H_ */

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#ifndef _COMPLEX_MATH_TEMPLATES_H_
#define _COMPLEX_MATH_TEMPLATES_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "test_templates.h"
/*--------------------------------------------------------------------------------*/
/* Group Specific Templates */
/*--------------------------------------------------------------------------------*/
/**
* Compare the real outputs from the function under test and the reference
* function.
*/
#define COMPLEX_MATH_COMPARE_RE_INTERFACE(block_size, output_type) \
TEST_ASSERT_BUFFERS_EQUAL( \
complex_math_output_ref_a.data_ptr, \
complex_math_output_fut_a.data_ptr, \
block_size * sizeof(output_type))
/**
* Compare the real and imaginary outputs from the function under test and the
* reference function.
*/
#define COMPLEX_MATH_COMPARE_CMPLX_INTERFACE(block_size, output_type) \
do \
{ \
COMPLEX_MATH_COMPARE_RE_INTERFACE(block_size * 2, output_type); \
} while (0)
/*
* Comparison SNR thresholds for the data types used in complex_math_tests.
*/
#define COMPLEX_MATH_SNR_THRESHOLD_float32_t 120
#define COMPLEX_MATH_SNR_THRESHOLD_q31_t 100
#define COMPLEX_MATH_SNR_THRESHOLD_q15_t 75
/**
* Compare reference and fut outputs using SNR.
*
* The output_suffix specifies which output buffers to use for the
* comparison. An output_suffix of 'a' expands to the following buffers:
*
* - complex_math_output_f32_ref_a
* - complex_math_output_f32_fut_a
* - complex_math_output_ref_a
* - complex_math_output_fut_a
*
* @note The outputs are converted to float32_t before comparison.
*/
#define COMPLEX_MATH_SNR_COMPARE_OUT_INTERFACE(block_size, \
output_type, \
output_suffix) \
do \
{ \
TEST_CONVERT_AND_ASSERT_SNR( \
complex_math_output_f32_ref_##output_suffix, \
complex_math_output_ref_##output_suffix.data_ptr, \
complex_math_output_f32_fut_##output_suffix, \
complex_math_output_fut_##output_suffix.data_ptr, \
block_size, \
output_type, \
COMPLEX_MATH_SNR_THRESHOLD_##output_type \
); \
} while (0)
/**
* Specification of #COMPLEX_MATH_SNR_COMPARE_INTERFACE() for real outputs.
*/
#define COMPLEX_MATH_SNR_COMPARE_RE_INTERFACE(block_size, \
output_type) \
COMPLEX_MATH_SNR_COMPARE_OUT_INTERFACE(block_size, \
output_type, \
a)
/**
* Specification of #COMPLEX_MATH_SNR_COMPARE_INTERFACE() for complex outputs.
*/
#define COMPLEX_MATH_SNR_COMPARE_CMPLX_INTERFACE(block_size, \
output_type) \
COMPLEX_MATH_SNR_COMPARE_OUT_INTERFACE(block_size * 2, \
output_type, \
a)
/**
* Compare reference and fut split outputs using SNR.
*
* 'Split' refers to two separate output buffers; one for real and one for
* complex.
*/
#define COMPLEX_MATH_SNR_COMPARE_SPLIT_INTERFACE(block_size, \
output_type) \
do \
{ \
COMPLEX_MATH_SNR_COMPARE_OUT_INTERFACE(block_size, \
output_type, \
a); \
COMPLEX_MATH_SNR_COMPARE_OUT_INTERFACE(block_size, \
output_type, \
b); \
} while (0)
/*--------------------------------------------------------------------------------*/
/* Input Interfaces */
/*--------------------------------------------------------------------------------*/
/*
* General:
* Input interfaces provide inputs to functions inside test templates. They
* ONLY provide the inputs. The output variables should be hard coded.
*
* The input interfaces must have the following format:
*
* ARM_xxx_INPUT_INTERFACE() or
* REF_xxx_INPUT_INTERFACE()
*
* The xxx must be lowercase, and is intended to be the indentifying substring
* in the function's name. Acceptable values are 'sub' or 'add' from the
* functions arm_add_q31.
*/
#define ARM_cmplx_conj_INPUT_INTERFACE(input, block_size) \
PAREN(input, complex_math_output_fut_a.data_ptr, block_size)
#define REF_cmplx_conj_INPUT_INTERFACE(input, block_size) \
PAREN(input, complex_math_output_ref_a.data_ptr, block_size)
#define ARM_cmplx_dot_prod_INPUT_INTERFACE(input_a, input_b, block_size) \
PAREN(input_a, input_b, block_size, \
complex_math_output_fut_a.data_ptr, \
complex_math_output_fut_b.data_ptr)
#define REF_cmplx_dot_prod_INPUT_INTERFACE(input_a, input_b, block_size) \
PAREN(input_a, input_b, block_size, \
complex_math_output_ref_a.data_ptr, \
complex_math_output_ref_b.data_ptr)
#define ARM_cmplx_mag_INPUT_INTERFACE(input, block_size) \
PAREN(input, complex_math_output_fut_a.data_ptr, block_size)
#define REF_cmplx_mag_INPUT_INTERFACE(input, block_size) \
PAREN(input, complex_math_output_ref_a.data_ptr, block_size)
#define ARM_cmplx_mag_squared_INPUT_INTERFACE(input, block_size) \
PAREN(input, complex_math_output_fut_a.data_ptr, block_size)
#define REF_cmplx_mag_squared_INPUT_INTERFACE(input, block_size) \
PAREN(input, complex_math_output_ref_a.data_ptr, block_size)
#define ARM_cmplx_mult_cmplx_INPUT_INTERFACE(input_a, input_b, block_size) \
PAREN(input_a, input_b, complex_math_output_fut_a.data_ptr, block_size)
#define REF_cmplx_mult_cmplx_INPUT_INTERFACE(input_a, input_b, block_size) \
PAREN(input_a, input_b, complex_math_output_ref_a.data_ptr, block_size)
#define ARM_cmplx_mult_real_INPUT_INTERFACE(input_a, input_b, block_size) \
PAREN(input_a, input_b, complex_math_output_fut_a.data_ptr, block_size)
#define REF_cmplx_mult_real_INPUT_INTERFACE(input_a, input_b, block_size) \
PAREN(input_a, input_b, complex_math_output_ref_a.data_ptr, block_size)
/*--------------------------------------------------------------------------------*/
/* Test Templates */
/*--------------------------------------------------------------------------------*/
/**
* Specialization of #TEST_TEMPLATE_BUF1_BLK() for complex math tests.
*
* @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
* REF_xxx_INPUT_INTERFACEs.
*/
#define COMPLEX_MATH_DEFINE_TEST_TEMPLATE_BUF1_BLK(fn_name, \
suffix, \
input_type, \
output_type, \
comparison_interface) \
JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test, \
arm_##fn_name##_##suffix) \
{ \
TEST_TEMPLATE_BUF1_BLK( \
complex_math_f_all, \
complex_math_block_sizes, \
input_type, \
output_type, \
arm_##fn_name##_##suffix, \
ARM_##fn_name##_INPUT_INTERFACE, \
ref_##fn_name##_##suffix, \
REF_##fn_name##_INPUT_INTERFACE, \
comparison_interface); \
}
/**
* Specialization of #TEST_TEMPLATE_BUF2_BLK1() for complex math tests.
*
* @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
* REF_xxx_INPUT_INTERFACEs.
*/
#define COMPLEX_MATH_DEFINE_TEST_TEMPLATE_BUF2_BLK(fn_name, \
suffix, \
input_type, \
output_type, \
comparison_interface) \
JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test, \
arm_##fn_name##_##suffix) \
{ \
TEST_TEMPLATE_BUF2_BLK( \
complex_math_f_all, \
complex_math_f_all, \
complex_math_block_sizes, \
input_type, \
output_type, \
arm_##fn_name##_##suffix, \
ARM_##fn_name##_INPUT_INTERFACE, \
ref_##fn_name##_##suffix, \
REF_##fn_name##_INPUT_INTERFACE, \
comparison_interface); \
}
#endif /* _COMPLEX_MATH_TEMPLATES_H_ */

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#ifndef _COMPLEX_MATH_TEST_DATA_H_
#define _COMPLEX_MATH_TEST_DATA_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "arr_desc.h"
#include "arm_math.h"
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
#define COMPLEX_MATH_MAX_INPUT_ELEMENTS 32
#define COMPLEX_MATH_BIGGEST_INPUT_TYPE float32_t
/*--------------------------------------------------------------------------------*/
/* Decalare Variables */
/*--------------------------------------------------------------------------------*/
/* Input/Output Buffers */
ARR_DESC_DECLARE(complex_math_output_fut_a);
ARR_DESC_DECLARE(complex_math_output_fut_b);
ARR_DESC_DECLARE(complex_math_output_ref_a);
ARR_DESC_DECLARE(complex_math_output_ref_b);
extern COMPLEX_MATH_BIGGEST_INPUT_TYPE
complex_math_output_f32_ref_a[COMPLEX_MATH_MAX_INPUT_ELEMENTS * 2];
extern COMPLEX_MATH_BIGGEST_INPUT_TYPE
complex_math_output_f32_ref_b[COMPLEX_MATH_MAX_INPUT_ELEMENTS * 2];
extern COMPLEX_MATH_BIGGEST_INPUT_TYPE
complex_math_output_f32_fut_a[COMPLEX_MATH_MAX_INPUT_ELEMENTS * 2];
extern COMPLEX_MATH_BIGGEST_INPUT_TYPE
complex_math_output_f32_fut_b[COMPLEX_MATH_MAX_INPUT_ELEMENTS * 2];
/* Block Sizes*/
ARR_DESC_DECLARE(complex_math_block_sizes);
/* Float Inputs */
ARR_DESC_DECLARE(complex_math_zeros);
ARR_DESC_DECLARE(complex_math_f_2);
ARR_DESC_DECLARE(complex_math_f_15);
ARR_DESC_DECLARE(complex_math_f_32);
ARR_DESC_DECLARE(complex_math_f_all);
#endif /* _COMPLEX_MATH_TEST_DATA_H_ */

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#ifndef _COMPLEX_MATH_TEST_GROUP_H_
#define _COMPLEX_MATH_TEST_GROUP_H_
/*--------------------------------------------------------------------------------*/
/* Declare Test Groups */
/*--------------------------------------------------------------------------------*/
JTEST_DECLARE_GROUP(complex_math_tests);
#endif /* _COMPLEX_MATH_TEST_GROUP_H_ */

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#ifndef _COMPLEX_MATH_TESTS_H_
#define _COMPLEX_MATH_TESTS_H_
/*--------------------------------------------------------------------------------*/
/* Test/Group Declarations */
/*--------------------------------------------------------------------------------*/
JTEST_DECLARE_GROUP(cmplx_conj_tests);
JTEST_DECLARE_GROUP(cmplx_dot_prod_tests);
JTEST_DECLARE_GROUP(cmplx_mag_tests);
JTEST_DECLARE_GROUP(cmplx_mag_squared_tests);
JTEST_DECLARE_GROUP(cmplx_mult_cmplx_tests);
JTEST_DECLARE_GROUP(cmplx_mult_real_tests);
#endif /* _COMPLEX_MATH_TESTS_H_ */

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#ifndef _CONTROLLER_TEMPLATES_H_
#define _CONTROLLER_TEMPLATES_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "test_templates.h"
#include <string.h> /* memcpy() */
/*--------------------------------------------------------------------------------*/
/* Group Specific Templates */
/*--------------------------------------------------------------------------------*/
/**
* Comparison SNR thresholds for the data types used in transform_tests.
*/
#define CONTROLLER_SNR_THRESHOLD_float32_t 110
#define CONTROLLER_SNR_THRESHOLD_q31_t 100
#define CONTROLLER_SNR_THRESHOLD_q15_t 45
/**
* Compare the outputs from the function under test and the reference
* function using SNR.
*/
#define CONTROLLER_SNR_COMPARE_INTERFACE(block_size, \
output_type) \
do \
{ \
TEST_CONVERT_AND_ASSERT_SNR( \
controller_output_f32_ref, \
(output_type *) controller_output_ref, \
controller_output_f32_fut, \
(output_type *) controller_output_fut, \
block_size, \
output_type, \
CONTROLLER_SNR_THRESHOLD_##output_type \
); \
} while (0)
/*--------------------------------------------------------------------------------*/
/* TEST Templates */
/*--------------------------------------------------------------------------------*/
#endif /* _CONTROLLER_TEMPLATES_H_ */

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#ifndef _CONTROLLER_TEST_DATA_H_
#define _CONTROLLER_TEST_DATA_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "arm_math.h"
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
#define CONTROLLER_MAX_LEN 1024
#define CONTROLLER_MAX_COEFFS_LEN (12 * 3)
#define TRANFORM_BIGGEST_INPUT_TYPE float32_t
/*--------------------------------------------------------------------------------*/
/* Variable Declarations */
/*--------------------------------------------------------------------------------*/
extern float32_t controller_output_fut[CONTROLLER_MAX_LEN];
extern float32_t controller_output_ref[CONTROLLER_MAX_LEN];
extern float32_t controller_output_f32_fut[CONTROLLER_MAX_LEN];
extern float32_t controller_output_f32_ref[CONTROLLER_MAX_LEN];
extern const float32_t controller_f32_inputs[CONTROLLER_MAX_LEN];
extern const q31_t controller_q31_inputs[CONTROLLER_MAX_LEN];
extern const q15_t * controller_q15_inputs;
extern const float32_t controller_f32_coeffs[CONTROLLER_MAX_COEFFS_LEN];
extern const q31_t controller_q31_coeffs[CONTROLLER_MAX_COEFFS_LEN];
extern const q15_t controller_q15_coeffs[CONTROLLER_MAX_COEFFS_LEN];
#endif /* _CONTROLLER_TEST_DATA_H_ */

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#ifndef _CONTROLLER_TEST_GROUP_H_
#define _CONTROLLER_TEST_GROUP_H_
/*--------------------------------------------------------------------------------*/
/* Declare Test Group */
/*--------------------------------------------------------------------------------*/
JTEST_DECLARE_GROUP(controller_tests);
#endif /* _CONTROLLER_TEST_GROUP_H_ */

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#ifndef _CONTROLLER_TESTS_H_
#define _CONTROLLER_TESTS_H_
/*--------------------------------------------------------------------------------*/
/* Test/Group Declarations */
/*--------------------------------------------------------------------------------*/
JTEST_DECLARE_GROUP(pid_reset_tests);
JTEST_DECLARE_GROUP(sin_cos_tests);
JTEST_DECLARE_GROUP(pid_tests);
#endif /* _CONTROLLER_TESTS_H_ */

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#ifndef _FAST_MATH_TEMPLATES_H_
#define _FAST_MATH_TEMPLATES_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "test_templates.h"
#include <string.h> /* memcpy() */
/*--------------------------------------------------------------------------------*/
/* Group Specific Templates */
/*--------------------------------------------------------------------------------*/
/**
* Comparison SNR thresholds for the data types used in transform_tests.
*/
#define FAST_MATH_SNR_THRESHOLD_float32_t 95
#define FAST_MATH_SNR_THRESHOLD_q31_t 95
#define FAST_MATH_SNR_THRESHOLD_q15_t 45
/**
* Compare the outputs from the function under test and the reference
* function using SNR.
*/
#define FAST_MATH_SNR_COMPARE_INTERFACE(block_size, \
output_type) \
do \
{ \
TEST_CONVERT_AND_ASSERT_SNR( \
fast_math_output_f32_ref, \
(output_type *) fast_math_output_ref, \
fast_math_output_f32_fut, \
(output_type *) fast_math_output_fut, \
block_size, \
output_type, \
FAST_MATH_SNR_THRESHOLD_##output_type \
); \
} while (0)
/*--------------------------------------------------------------------------------*/
/* TEST Templates */
/*--------------------------------------------------------------------------------*/
#define SQRT_TEST_TEMPLATE_ELT1(suffix) \
\
JTEST_DEFINE_TEST(arm_sqrt_##suffix##_test, arm_sqrt_##suffix) \
{ \
uint32_t i; \
\
JTEST_COUNT_CYCLES( \
for(i=0;i<FAST_MATH_MAX_LEN;i++) \
{ \
arm_sqrt_##suffix( \
(suffix##_t)fast_math_##suffix##_inputs[i] \
,(suffix##_t*)fast_math_output_fut + i); \
}); \
\
for(i=0;i<FAST_MATH_MAX_LEN;i++) \
{ \
ref_sqrt_##suffix( \
(suffix##_t)fast_math_##suffix##_inputs[i] \
,(suffix##_t*)fast_math_output_ref + i); \
} \
\
FAST_MATH_SNR_COMPARE_INTERFACE( \
FAST_MATH_MAX_LEN, \
suffix##_t); \
\
return JTEST_TEST_PASSED; \
}
#define SIN_COS_TEST_TEMPLATE_ELT1(suffix, type, func) \
\
JTEST_DEFINE_TEST(arm_##func##_##suffix##_test, arm_##func##_##suffix) \
{ \
uint32_t i; \
\
JTEST_COUNT_CYCLES( \
for(i=0;i<FAST_MATH_MAX_LEN;i++) \
{ \
*((type*)fast_math_output_fut + i) = arm_##func##_##suffix( \
fast_math_##suffix##_inputs[i]); \
}); \
\
JTEST_COUNT_CYCLES( \
for(i=0;i<FAST_MATH_MAX_LEN;i++) \
{ \
*((type*)fast_math_output_ref + i) = ref_##func##_##suffix( \
fast_math_##suffix##_inputs[i]); \
}); \
\
FAST_MATH_SNR_COMPARE_INTERFACE( \
FAST_MATH_MAX_LEN, \
type); \
\
return JTEST_TEST_PASSED; \
}
#endif /* _FAST_MATH_TEMPLATES_H_ */

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#ifndef _FAST_MATH_TEST_DATA_H_
#define _FAST_MATH_TEST_DATA_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "arm_math.h"
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
#define FAST_MATH_MAX_LEN 1024
#define TRANFORM_BIGGEST_INPUT_TYPE float32_t
/*--------------------------------------------------------------------------------*/
/* Variable Declarations */
/*--------------------------------------------------------------------------------*/
extern float32_t fast_math_output_fut[FAST_MATH_MAX_LEN];
extern float32_t fast_math_output_ref[FAST_MATH_MAX_LEN];
extern float32_t fast_math_output_f32_fut[FAST_MATH_MAX_LEN];
extern float32_t fast_math_output_f32_ref[FAST_MATH_MAX_LEN];
extern const float32_t fast_math_f32_inputs[FAST_MATH_MAX_LEN];
extern const q31_t fast_math_q31_inputs[FAST_MATH_MAX_LEN];
extern const q15_t * fast_math_q15_inputs;
#endif /* _FAST_MATH_TEST_DATA_H_ */

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#ifndef _FAST_MATH_TEST_GROUP_H_
#define _FAST_MATH_TEST_GROUP_H_
/*--------------------------------------------------------------------------------*/
/* Declare Test Groups */
/*--------------------------------------------------------------------------------*/
JTEST_DECLARE_GROUP(fast_math_tests);
#endif /* _FAST_MATH_TEST_GROUP_H_ */

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#ifndef _FILTERING_TEMPLATES_H_
#define _FILTERING_TEMPLATES_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "test_templates.h"
/*--------------------------------------------------------------------------------*/
/* Group Specific Templates */
/*--------------------------------------------------------------------------------*/
/*
* Comparison SNR thresholds for the data types used in statistics_tests.
*/
#define FILTERING_SNR_THRESHOLD_float64_t 120
#define FILTERING_SNR_THRESHOLD_float32_t 99
#define FILTERING_SNR_THRESHOLD_q31_t 90
#define FILTERING_SNR_THRESHOLD_q15_t 60
#define FILTERING_SNR_THRESHOLD_q7_t 30
/**
* Compare reference and fut outputs using SNR.
*
* @note The outputs are converted to float32_t before comparison.
*/
#define FILTERING_SNR_COMPARE_INTERFACE(block_size, \
output_type) \
FILTERING_SNR_COMPARE_INTERFACE_OFFSET(0, block_size, output_type)
/**
* Compare reference and fut outputs starting at some offset using SNR.
*/
#define FILTERING_SNR_COMPARE_INTERFACE_OFFSET(offset, \
block_size, \
output_type) \
do \
{ \
TEST_CONVERT_AND_ASSERT_SNR( \
filtering_output_f32_ref, \
(output_type *) filtering_output_ref + offset, \
filtering_output_f32_fut, \
(output_type *) filtering_output_fut + offset, \
block_size, \
output_type, \
FILTERING_SNR_THRESHOLD_##output_type \
); \
} while (0)
/**
* Compare reference and fut outputs starting at some offset using SNR.
* Special case for float64_t
*/
#define FILTERING_DBL_SNR_COMPARE_INTERFACE(block_size, \
output_type) \
do \
{ \
TEST_ASSERT_DBL_SNR( \
(float64_t*)filtering_output_ref, \
(float64_t*)filtering_output_fut, \
block_size, \
FILTERING_SNR_THRESHOLD_##output_type \
); \
} while (0)
/*--------------------------------------------------------------------------------*/
/* Input Interfaces */
/*--------------------------------------------------------------------------------*/
/*
* General:
* Input interfaces provide inputs to functions inside test templates. They
* ONLY provide the inputs. The output variables should be hard coded.
*
* The input interfaces must have the following format:
*
* ARM_xxx_INPUT_INTERFACE() or
* REF_xxx_INPUT_INTERFACE()
*
* The xxx must be lowercase, and is intended to be the indentifying substring
* in the function's name. Acceptable values are 'sub' or 'add' from the
* functions arm_add_q31.
*/
/*--------------------------------------------------------------------------------*/
/* Test Templates */
/*--------------------------------------------------------------------------------*/
#endif /* _FILTERING_TEMPLATES_H_ */

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#ifndef FILTERING_TEST_DATA_H
#define FILTERING_TEST_DATA_H
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "arr_desc.h"
#include "arm_math.h"
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
#define FILTERING_MAX_BLOCKSIZE 33
#define LMS_MAX_BLOCKSIZE 512
#define FILTERING_MAX_NUMTAPS 34
#define FILTERING_MAX_NUMSTAGES 14
#define FILTERING_MAX_POSTSHIFT 8
#define FILTERING_MAX_TAP_DELAY 0xFF
#define FILTERING_MAX_L 3
#define FILTERING_MAX_M 33
/*--------------------------------------------------------------------------------*/
/* Declare Variables */
/*--------------------------------------------------------------------------------*/
/* Input/Output Buffers */
extern float32_t filtering_output_fut[LMS_MAX_BLOCKSIZE*2];
extern float32_t filtering_output_ref[LMS_MAX_BLOCKSIZE*2];
extern float32_t filtering_output_f32_fut[LMS_MAX_BLOCKSIZE*2];
extern float32_t filtering_output_f32_ref[LMS_MAX_BLOCKSIZE*2];
extern float32_t filtering_input_lms[LMS_MAX_BLOCKSIZE*2];
extern float32_t filtering_pState[LMS_MAX_BLOCKSIZE + FILTERING_MAX_NUMTAPS];
extern float32_t filtering_scratch[FILTERING_MAX_BLOCKSIZE * 3];
extern float32_t filtering_scratch2[FILTERING_MAX_BLOCKSIZE * 3];
extern float32_t filtering_coeffs_lms[FILTERING_MAX_NUMTAPS];
extern const float64_t filtering_f64_inputs[FILTERING_MAX_BLOCKSIZE * FILTERING_MAX_M + FILTERING_MAX_NUMTAPS];
extern const float32_t filtering_f32_inputs[FILTERING_MAX_BLOCKSIZE * FILTERING_MAX_M + FILTERING_MAX_NUMTAPS];
extern const q31_t filtering_q31_inputs[FILTERING_MAX_BLOCKSIZE * FILTERING_MAX_M + FILTERING_MAX_NUMTAPS];
extern const q15_t * filtering_q15_inputs;
extern const q7_t * filtering_q7_inputs;
/* Block Sizes */
ARR_DESC_DECLARE(filtering_blocksizes);
ARR_DESC_DECLARE(lms_blocksizes);
ARR_DESC_DECLARE(filtering_numtaps);
ARR_DESC_DECLARE(filtering_numtaps2);
ARR_DESC_DECLARE(filtering_postshifts);
ARR_DESC_DECLARE(filtering_numstages);
ARR_DESC_DECLARE(filtering_Ls);
ARR_DESC_DECLARE(filtering_Ms);
/* Coefficient Lists */
extern const float64_t filtering_coeffs_f64[FILTERING_MAX_NUMSTAGES * 6 + 2];
extern const float64_t filtering_coeffs_b_f64[FILTERING_MAX_NUMSTAGES * 6 + 2];
extern const float32_t filtering_coeffs_f32[FILTERING_MAX_NUMSTAGES * 6 + 2];
extern const float32_t filtering_coeffs_b_f32[FILTERING_MAX_NUMSTAGES * 6 + 2];
extern const float32_t *filtering_coeffs_c_f32;
extern float32_t filtering_coeffs_lms_f32[FILTERING_MAX_NUMTAPS];
extern const q31_t filtering_coeffs_q31[FILTERING_MAX_NUMSTAGES * 6 + 2];
extern const q31_t *filtering_coeffs_b_q31;
extern const q31_t *filtering_coeffs_c_q31;
extern q31_t filtering_coeffs_lms_q31[FILTERING_MAX_NUMTAPS];
extern const q15_t filtering_coeffs_q15[FILTERING_MAX_NUMSTAGES * 6 + 4];
extern const q15_t *filtering_coeffs_b_q15;
extern const q15_t *filtering_coeffs_c_q15;
extern q15_t filtering_coeffs_lms_q15[FILTERING_MAX_NUMTAPS];
extern const q7_t filtering_coeffs_q7[FILTERING_MAX_NUMSTAGES * 6 + 8];
extern const q7_t *filtering_coeffs_b_q7;
extern const q7_t *filtering_coeffs_c_q7;
/* Tap Delay Lists */
extern const int32_t filtering_tap_delay[FILTERING_MAX_NUMTAPS];
/* Numbers */
/* Float Inputs */
#endif

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#ifndef _FILTERING_TEST_GROUP_H_
#define _FILTERING_TEST_GROUP_H_
/*--------------------------------------------------------------------------------*/
/* Declare Test Groups */
/*--------------------------------------------------------------------------------*/
JTEST_DECLARE_GROUP(filtering_tests);
#endif /* _FILTERING_TEST_GROUP_H_ */

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#ifndef _FILTERING_TESTS_H_
#define _FILTERING_TESTS_H_
/*--------------------------------------------------------------------------------*/
/* Test/Group Declarations */
/*--------------------------------------------------------------------------------*/
JTEST_DECLARE_GROUP(biquad_tests);
JTEST_DECLARE_GROUP(conv_tests);
JTEST_DECLARE_GROUP(correlate_tests);
JTEST_DECLARE_GROUP(fir_tests);
JTEST_DECLARE_GROUP(iir_tests);
JTEST_DECLARE_GROUP(lms_tests);
#endif /* _FILTERING_TESTS_H_ */

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#ifndef _INTRINSICS_TEMPLATES_H_
#define _INTRINSICS_TEMPLATES_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "test_templates.h"
#include <string.h> /* memcpy() */
/*--------------------------------------------------------------------------------*/
/* Group Specific Templates */
/*--------------------------------------------------------------------------------*/
/**
* Comparison SNR thresholds for the data types used in transform_tests.
*/
#define INTRINSICS_SNR_THRESHOLD_q63_t 120
#define INTRINSICS_SNR_THRESHOLD_q31_t 95
/**
* Compare the outputs from the function under test and the reference
* function using SNR.
*/
#define INTRINSICS_SNR_COMPARE_INTERFACE(block_size, \
output_type) \
do \
{ \
TEST_CONVERT_AND_ASSERT_SNR( \
intrinsics_output_f32_ref, \
(output_type##_t *) intrinsics_output_ref, \
intrinsics_output_f32_fut, \
(output_type##_t *) intrinsics_output_fut, \
block_size, \
output_type, \
INTRINSICS_SNR_THRESHOLD_##output_type##_t \
); \
} while (0)
/*--------------------------------------------------------------------------------*/
/* TEST Templates */
/*--------------------------------------------------------------------------------*/
#define INTRINSICS_TEST_TEMPLATE_ELT1(functionName, dataType) \
\
JTEST_DEFINE_TEST(functionName##_test, functionName) \
{ \
uint32_t i; \
\
JTEST_COUNT_CYCLES( \
for(i=0;i<INTRINSICS_MAX_LEN;i++) \
{ \
*((dataType##_t*)intrinsics_output_fut + i) = \
functionName( \
(dataType##_t)intrinsics_##dataType##_inputs[i]); \
}); \
\
for(i=0;i<INTRINSICS_MAX_LEN;i++) \
{ \
*((dataType##_t*)intrinsics_output_ref + i) = \
ref##functionName( \
(dataType##_t)intrinsics_##dataType##_inputs[i]); \
} \
\
INTRINSICS_SNR_COMPARE_INTERFACE( \
INTRINSICS_MAX_LEN, \
dataType); \
\
return JTEST_TEST_PASSED; \
}
#define INTRINSICS_TEST_TEMPLATE_ELT2(functionName, dataType) \
\
JTEST_DEFINE_TEST(functionName##_test, functionName) \
{ \
uint32_t i; \
\
JTEST_COUNT_CYCLES( \
for(i=0;i<INTRINSICS_MAX_LEN;i++) \
{ \
*((dataType##_t*)intrinsics_output_fut + i) = \
functionName( \
(dataType##_t)intrinsics_##dataType##_inputs[i] \
,(dataType##_t)intrinsics_##dataType##_inputs[i]); \
}); \
\
for(i=0;i<INTRINSICS_MAX_LEN;i++) \
{ \
*((dataType##_t*)intrinsics_output_ref + i) = \
ref##functionName( \
(dataType##_t)intrinsics_##dataType##_inputs[i] \
,(dataType##_t)intrinsics_##dataType##_inputs[i]); \
} \
\
INTRINSICS_SNR_COMPARE_INTERFACE( \
INTRINSICS_MAX_LEN, \
dataType); \
\
return JTEST_TEST_PASSED; \
}
#define INTRINSICS_TEST_TEMPLATE_ELT3(functionName, dataType) \
\
JTEST_DEFINE_TEST(functionName##_test, functionName) \
{ \
uint32_t i; \
\
JTEST_COUNT_CYCLES( \
for(i=0;i<INTRINSICS_MAX_LEN;i++) \
{ \
*((dataType##_t*)intrinsics_output_fut + i) = \
functionName( \
(dataType##_t)intrinsics_##dataType##_inputs[i] \
,(dataType##_t)intrinsics_##dataType##_inputs[i] \
,(dataType##_t)intrinsics_##dataType##_inputs[i]); \
}); \
\
for(i=0;i<INTRINSICS_MAX_LEN;i++) \
{ \
*((dataType##_t*)intrinsics_output_ref + i) = \
ref##functionName( \
(dataType##_t)intrinsics_##dataType##_inputs[i] \
,(dataType##_t)intrinsics_##dataType##_inputs[i] \
,(dataType##_t)intrinsics_##dataType##_inputs[i]); \
} \
\
INTRINSICS_SNR_COMPARE_INTERFACE( \
INTRINSICS_MAX_LEN, \
dataType); \
\
return JTEST_TEST_PASSED; \
}
#define INTRINSICS_TEST_TEMPLATE_ELT4(functionName, dataType, dataType2) \
JTEST_DEFINE_TEST(functionName##_test, functionName) \
{ \
uint32_t i; \
\
JTEST_COUNT_CYCLES( \
for(i=0;i<INTRINSICS_MAX_LEN;i++) \
{ \
*((dataType2##_t*)intrinsics_output_fut + i) = \
functionName( \
(dataType##_t)intrinsics_##dataType##_inputs[i] \
,(dataType##_t)intrinsics_##dataType##_inputs[i] \
,(dataType2##_t)intrinsics_##dataType2##_inputs[i]); \
}); \
\
for(i=0;i<INTRINSICS_MAX_LEN;i++) \
{ \
*((dataType2##_t*)intrinsics_output_ref + i) = \
ref##functionName( \
(dataType##_t)intrinsics_##dataType##_inputs[i] \
,(dataType##_t)intrinsics_##dataType##_inputs[i] \
,(dataType2##_t)intrinsics_##dataType2##_inputs[i]); \
} \
\
INTRINSICS_SNR_COMPARE_INTERFACE( \
INTRINSICS_MAX_LEN, \
dataType2); \
\
return JTEST_TEST_PASSED; \
}
#endif /* _INTRINSICS_TEMPLATES_H_ */

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#ifndef _INTRINSICS_TEST_DATA_H_
#define _INTRINSICS_TEST_DATA_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "arm_math.h"
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
#define INTRINSICS_MAX_LEN 1024
/*--------------------------------------------------------------------------------*/
/* Variable Declarations */
/*--------------------------------------------------------------------------------*/
extern q63_t intrinsics_output_fut[INTRINSICS_MAX_LEN];
extern q63_t intrinsics_output_ref[INTRINSICS_MAX_LEN];
extern float32_t intrinsics_output_f32_fut[INTRINSICS_MAX_LEN];
extern float32_t intrinsics_output_f32_ref[INTRINSICS_MAX_LEN];
extern const q63_t intrinsics_q63_inputs[INTRINSICS_MAX_LEN];
extern const q31_t *intrinsics_q31_inputs;
#endif /* _INTRINSICS_TEST_DATA_H_ */

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#ifndef _INTRINSICS_TEST_GROUP_H_
#define _INTRINSICS_TEST_GROUP_H_
/*--------------------------------------------------------------------------------*/
/* Declare Test Groups */
/*--------------------------------------------------------------------------------*/
JTEST_DECLARE_GROUP(intrinsics_tests);
#endif /* _INTRINSICS_TEST_GROUP_H_ */

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/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 29. November 2010
* $Revision: V1.0.3
*
* Project: CMSIS DSP Library
*
* Title: math_helper.h
*
*
* Description: Prototypes of all helper functions required.
*
* Target Processor: Cortex-M4/Cortex-M3
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#ifndef MATH_HELPER_H
#define MATH_HELPER_H
#include "arm_math.h"
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize);
double arm_snr_f64(double *pRef, double *pTest, uint32_t buffSize);
void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples);
void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples);
void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples);
void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples);
void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples);
void arm_clip_f32(float *pIn, uint32_t numSamples);
uint32_t arm_calc_guard_bits(uint32_t num_adds);
void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits);
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples);
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples);
uint32_t arm_calc_2pow(uint32_t guard_bits);
#endif

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#ifndef _MATRIX_TEMPLATES_H_
#define _MATRIX_TEMPLATES_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "test_templates.h"
/*--------------------------------------------------------------------------------*/
/* Group Specific Templates */
/*--------------------------------------------------------------------------------*/
/**
* Compare the outputs from the function under test and the reference
* function.
*/
#define MATRIX_COMPARE_INTERFACE(output_type, output_content_type) \
TEST_ASSERT_BUFFERS_EQUAL( \
((output_type *) &matrix_output_ref)->pData, \
((output_type *) &matrix_output_fut)->pData, \
((output_type *) &matrix_output_fut)->numRows * \
((output_type *) &matrix_output_ref)->numCols * \
sizeof(output_content_type))
/**
* Comparison SNR thresholds for the data types used in matrix_tests.
*/
#define MATRIX_SNR_THRESHOLD 120
/**
* Compare the outputs from the function under test and the reference
* function using SNR.
*/
#define MATRIX_SNR_COMPARE_INTERFACE(output_type, output_content_type) \
do \
{ \
TEST_CONVERT_AND_ASSERT_SNR( \
(float32_t *)matrix_output_f32_ref, \
((output_type *) &matrix_output_ref)->pData, \
(float32_t *)matrix_output_f32_fut, \
((output_type *) &matrix_output_ref)->pData, \
((output_type *) &matrix_output_fut)->numRows * \
((output_type *) &matrix_output_ref)->numCols, \
output_content_type, \
MATRIX_SNR_THRESHOLD \
); \
} while (0)
/**
* Compare the outputs from the function under test and the reference
* function using SNR. This is special for float64_t
*/
#define MATRIX_DBL_SNR_COMPARE_INTERFACE(output_type) \
do \
{ \
TEST_ASSERT_DBL_SNR( \
(float64_t *)matrix_output_f32_ref, \
(float64_t *)matrix_output_f32_fut, \
((output_type *) &matrix_output_fut)->numRows * \
((output_type *) &matrix_output_ref)->numCols, \
MATRIX_SNR_THRESHOLD \
); \
} while (0)
/*--------------------------------------------------------------------------------*/
/* Input Interfaces */
/*--------------------------------------------------------------------------------*/
/*
* General:
* Input interfaces provide inputs to functions inside test templates. They
* ONLY provide the inputs. The output variables should be hard coded.
*
* The input interfaces must have the following format:
*
* ARM_xxx_INPUT_INTERFACE() or
* REF_xxx_INPUT_INTERFACE()
*
* The xxx must be lowercase, and is intended to be the indentifying substring
* in the function's name. Acceptable values are 'sub' or 'add' from the
* functions arm_add_q31.
*/
#define ARM_mat_add_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_add_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_cmplx_mult_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_cmplx_mult_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_inverse_INPUT_INTERFACE(input_ptr) \
PAREN(input_ptr, (void *) &matrix_output_fut)
#define REF_mat_inverse_INPUT_INTERFACE(input_ptr) \
PAREN(input_ptr, (void *) &matrix_output_ref)
#define ARM_mat_mult_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_mult_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_mult_fast_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_mult_fast_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_sub_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_fut)
#define REF_mat_sub_INPUT_INTERFACE(input_a_ptr, input_b_ptr) \
PAREN(input_a_ptr, input_b_ptr, (void *) &matrix_output_ref)
#define ARM_mat_trans_INPUT_INTERFACE(input_ptr) \
PAREN(input_ptr, (void *) &matrix_output_fut)
#define REF_mat_trans_INPUT_INTERFACE(input_ptr) \
PAREN(input_ptr, (void *) &matrix_output_ref)
/*--------------------------------------------------------------------------------*/
/* Dimension Validation Interfaces */
/*--------------------------------------------------------------------------------*/
#define MATRIX_TEST_VALID_ADDITIVE_DIMENSIONS(input_type, \
matrix_a_ptr, \
matrix_b_ptr) \
((((input_type) (matrix_a_ptr))->numRows == \
((input_type) (matrix_b_ptr))->numRows) && \
(((input_type) (matrix_a_ptr))->numCols == \
((input_type) (matrix_b_ptr))->numCols))
#define MATRIX_TEST_VALID_MULTIPLICATIVE_DIMENSIONS(input_type, \
matrix_a_ptr, \
matrix_b_ptr) \
(((input_type) (matrix_a_ptr))->numCols == \
((input_type) (matrix_b_ptr))->numRows)
#define MATRIX_TEST_VALID_SQUARE_DIMENSIONS(input_type, \
matrix_ptr) \
(((input_type)(matrix_ptr))->numRows == \
((input_type)(matrix_ptr))->numCols)
#define MATRIX_TEST_VALID_DIMENSIONS_ALWAYS(input_type, \
matrix_ptr) \
(1 == 1) \
/*--------------------------------------------------------------------------------*/
/* Output Configuration Interfaces */
/*--------------------------------------------------------------------------------*/
/* The matrix tests assume the output matrix is always the correct size. These
* interfaces size the properly size the output matrices according to the input
* matrices and the operation at hand.*/
#define MATRIX_TEST_CONFIG_ADDITIVE_OUTPUT(input_type, \
matrix_a_ptr, \
matrix_b_ptr) \
do \
{ \
((input_type) &matrix_output_fut)->numRows = \
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_fut)->numCols = \
((input_type)(matrix_a_ptr))->numCols; \
((input_type) &matrix_output_ref)->numRows = \
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_a_ptr))->numCols; \
} while (0)
#define MATRIX_TEST_CONFIG_MULTIPLICATIVE_OUTPUT(input_type, \
matrix_a_ptr, \
matrix_b_ptr) \
do \
{ \
((input_type) &matrix_output_fut)->numRows = \
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_fut)->numCols = \
((input_type)(matrix_b_ptr))->numCols; \
((input_type) &matrix_output_ref)->numRows = \
((input_type)(matrix_a_ptr))->numRows; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_b_ptr))->numCols; \
} while (0)
#define MATRIX_TEST_CONFIG_SAMESIZE_OUTPUT(input_type, \
matrix_ptr) \
do \
{ \
((input_type) &matrix_output_fut)->numRows = \
((input_type)(matrix_ptr))->numRows; \
((input_type) &matrix_output_fut)->numCols = \
((input_type)(matrix_ptr))->numCols; \
((input_type) &matrix_output_ref)->numRows = \
((input_type)(matrix_ptr))->numRows; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_ptr))->numCols; \
} while (0)
#define MATRIX_TEST_CONFIG_TRANSPOSE_OUTPUT(input_type, \
matrix_ptr) \
do \
{ \
((input_type) &matrix_output_fut)->numRows = \
((input_type)(matrix_ptr))->numCols; \
((input_type) &matrix_output_fut)->numCols = \
((input_type)(matrix_ptr))->numRows; \
((input_type) &matrix_output_ref)->numRows = \
((input_type)(matrix_ptr))->numCols; \
((input_type) &matrix_output_ref)->numCols = \
((input_type)(matrix_ptr))->numRows; \
} while (0)
/*--------------------------------------------------------------------------------*/
/* TEST Templates */
/*--------------------------------------------------------------------------------*/
#define MATRIX_TEST_TEMPLATE_ELT1(arr_desc_inputs, \
input_type, \
output_type, output_content_type, \
fut, fut_arg_interface, \
ref, ref_arg_interface, \
output_config_interface, \
dim_validation_interface, \
compare_interface) \
do \
{ \
TEMPLATE_DO_ARR_DESC( \
input_idx, input_type, input, arr_desc_inputs \
, \
JTEST_DUMP_STRF("Matrix Dimensions: %dx%d\n", \
(int)input->numRows, \
(int)input->numCols); \
\
if (dim_validation_interface(input_type, \
input)) { \
output_config_interface(input_type, \
input); \
TEST_CALL_FUT_AND_REF( \
fut, fut_arg_interface(input), \
ref, ref_arg_interface(input)); \
compare_interface(output_type, \
output_content_type); \
} else { \
arm_status matrix_test_retval; \
TEST_CALL_FUT( \
matrix_test_retval = fut, \
fut_arg_interface(input)); \
\
/* If dimensions are known bad, the fut should */ \
/* detect it. */ \
if ( matrix_test_retval != ARM_MATH_SIZE_MISMATCH) { \
return JTEST_TEST_FAILED; \
} \
}); \
return JTEST_TEST_PASSED; \
} while (0)
#define MATRIX_TEST_TEMPLATE_ELT2(arr_desc_inputs_a, \
arr_desc_inputs_b, \
input_type, \
output_type, output_content_type, \
fut, fut_arg_interface, \
ref, ref_arg_interface, \
output_config_interface, \
dim_validation_interface, \
compare_interface) \
do \
{ \
TEMPLATE_DO_ARR_DESC( \
input_a_idx, input_type, input_a, arr_desc_inputs_a \
, \
input_type input_b = ARR_DESC_ELT( \
input_type, input_a_idx, \
&(arr_desc_inputs_b)); \
\
JTEST_DUMP_STRF("Matrix Dimensions: A %dx%d B %dx%d\n", \
(int)input_a->numRows, \
(int)input_a->numCols, \
(int)input_b->numRows, \
(int)input_b->numCols); \
\
if (dim_validation_interface(input_type, \
input_a, \
input_b)) { \
\
output_config_interface(input_type, \
input_a, \
input_b); \
\
TEST_CALL_FUT_AND_REF( \
fut, fut_arg_interface(input_a, input_b), \
ref, ref_arg_interface(input_a, input_b)); \
\
compare_interface(output_type, output_content_type); \
\
} else { \
arm_status matrix_test_retval; \
TEST_CALL_FUT( \
matrix_test_retval = fut, fut_arg_interface(input_a, input_b)); \
\
/* If dimensions are known bad, the fut should */ \
/* detect it. */ \
if ( matrix_test_retval != ARM_MATH_SIZE_MISMATCH) { \
return JTEST_TEST_FAILED; \
} \
}); \
return JTEST_TEST_PASSED; \
} while (0)
/**
* Specialization of #MATRIX_TEST_TEMPLATE_ELT2() for matrix tests.
*
* @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
* REF_xxx_INPUT_INTERFACEs.
*/
#define MATRIX_DEFINE_TEST_TEMPLATE_ELT2(fn_name, suffix, \
output_config_interface, \
dim_validation_interface, \
comparison_interface) \
JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test, \
arm_##fn_name##_##suffix) \
{ \
MATRIX_TEST_TEMPLATE_ELT2( \
matrix_##suffix##_a_inputs, \
matrix_##suffix##_b_inputs, \
arm_matrix_instance_##suffix * , \
arm_matrix_instance_##suffix, \
TYPE_FROM_ABBREV(suffix), \
arm_##fn_name##_##suffix, \
ARM_##fn_name##_INPUT_INTERFACE, \
ref_##fn_name##_##suffix, \
REF_##fn_name##_INPUT_INTERFACE, \
output_config_interface, \
dim_validation_interface, \
comparison_interface); \
} \
/**
* Specialization of #MATRIX_TEST_TEMPLATE_ELT1() for matrix tests.
*
* @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
* REF_xxx_INPUT_INTERFACEs.
*/
#define MATRIX_DEFINE_TEST_TEMPLATE_ELT1(fn_name, suffix, \
output_config_interface, \
dim_validation_interface) \
JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test, \
arm_##fn_name##_##suffix) \
{ \
MATRIX_TEST_TEMPLATE_ELT1( \
matrix_##suffix##_a_inputs, \
arm_matrix_instance_##suffix * , \
arm_matrix_instance_##suffix, \
TYPE_FROM_ABBREV(suffix), \
arm_##fn_name##_##suffix, \
ARM_##fn_name##_INPUT_INTERFACE, \
ref_##fn_name##_##suffix, \
REF_##fn_name##_INPUT_INTERFACE, \
output_config_interface, \
dim_validation_interface, \
MATRIX_COMPARE_INTERFACE); \
} \
#endif /* _MATRIX_TEMPLATES_H_ */

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#ifndef _MATRIX_TEST_DATA_H_
#define _MATRIX_TEST_DATA_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "arr_desc.h"
#include "arm_math.h" /* float32_t */
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
#define MATRIX_TEST_MAX_ROWS 4
#define MATRIX_TEST_MAX_COLS 4
#define MATRIX_TEST_BIGGEST_INPUT_TYPE float64_t
#define MATRIX_TEST_MAX_ELTS (MATRIX_TEST_MAX_ROWS * MATRIX_TEST_MAX_COLS)
#define MATRIX_MAX_COEFFS_LEN 16
#define MATRIX_MAX_SHIFTS_LEN 5
/**
* Declare the matrix inputs defined by MATRIX_DEFINE_INPUTS.
*/
#define MATRIX_DECLARE_INPUTS(suffix) \
ARR_DESC_DECLARE(matrix_##suffix##_a_inputs); \
ARR_DESC_DECLARE(matrix_##suffix##_b_inputs); \
ARR_DESC_DECLARE(matrix_##suffix##_invertible_inputs)
/*--------------------------------------------------------------------------------*/
/* Declare Variables */
/*--------------------------------------------------------------------------------*/
/* Input/Output Buffers */
extern arm_matrix_instance_f32 matrix_output_fut;
extern arm_matrix_instance_f32 matrix_output_ref;
extern arm_matrix_instance_f64 matrix_output_fut64;
extern arm_matrix_instance_f64 matrix_output_ref64;
extern MATRIX_TEST_BIGGEST_INPUT_TYPE matrix_output_f32_fut[MATRIX_TEST_MAX_ELTS];
extern MATRIX_TEST_BIGGEST_INPUT_TYPE matrix_output_f32_ref[MATRIX_TEST_MAX_ELTS];
extern MATRIX_TEST_BIGGEST_INPUT_TYPE matrix_output_scratch[MATRIX_TEST_MAX_ELTS];
/* Matrix Inputs */
MATRIX_DECLARE_INPUTS(f64);
MATRIX_DECLARE_INPUTS(f32);
MATRIX_DECLARE_INPUTS(q31);
MATRIX_DECLARE_INPUTS(q15);
extern const float32_t matrix_f32_scale_values[MATRIX_MAX_COEFFS_LEN];
extern const q31_t matrix_q31_scale_values[MATRIX_MAX_COEFFS_LEN];
extern const q15_t matrix_q15_scale_values[MATRIX_MAX_COEFFS_LEN];
extern const int32_t matrix_shift_values[MATRIX_MAX_SHIFTS_LEN];
#endif /* _MATRIX_TEST_DATA_H_ */

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#ifndef _MATRIX_TEST_GROUP_H_
#define _MATRIX_TEST_GROUP_H_
/*--------------------------------------------------------------------------------*/
/* Declare Test Groups */
/*--------------------------------------------------------------------------------*/
JTEST_DECLARE_GROUP(matrix_tests);
#endif /* _MATRIX_TEST_GROUP_H_ */

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#ifndef _MATRIX_TESTS_H_
#define _MATRIX_TESTS_H_
/*--------------------------------------------------------------------------------*/
/* Test/Group Declarations */
/*--------------------------------------------------------------------------------*/
JTEST_DECLARE_GROUP(mat_add_tests);
JTEST_DECLARE_GROUP(mat_cmplx_mult_tests);
JTEST_DECLARE_GROUP(mat_init_tests);
JTEST_DECLARE_GROUP(mat_inverse_tests);
JTEST_DECLARE_GROUP(mat_mult_tests);
JTEST_DECLARE_GROUP(mat_mult_fast_tests);
JTEST_DECLARE_GROUP(mat_sub_tests);
JTEST_DECLARE_GROUP(mat_trans_tests);
JTEST_DECLARE_GROUP(mat_scale_tests);
#endif /* _MATRIX_TESTS_H_ */

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#ifndef _STATISTICS_TEMPLATES_H_
#define _STATISTICS_TEMPLATES_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "test_templates.h"
/*--------------------------------------------------------------------------------*/
/* Group Specific Templates */
/*--------------------------------------------------------------------------------*/
/**
* Compare the outputs from the function under test and the reference function.
*/
#define STATISTICS_COMPARE_INTERFACE(block_size, \
output_type) \
do \
{ \
TEST_ASSERT_BUFFERS_EQUAL( \
statistics_output_ref.data_ptr, \
statistics_output_fut.data_ptr, \
1 * sizeof(output_type) /* All fns return one value*/ \
); \
TEST_ASSERT_EQUAL( \
statistics_idx_fut, \
statistics_idx_ref); \
} while (0) \
/*
* Comparison SNR thresholds for the data types used in statistics_tests.
*/
#define STATISTICS_SNR_THRESHOLD_float32_t 120
#define STATISTICS_SNR_THRESHOLD_q31_t 100
#define STATISTICS_SNR_THRESHOLD_q15_t 60
#define STATISTICS_SNR_THRESHOLD_q7_t 30
/**
* Compare reference and fut outputs using SNR.
*
* @note The outputs are converted to float32_t before comparison.
*/
#define STATISTICS_SNR_COMPARE_INTERFACE(block_size, \
output_type) \
do \
{ \
TEST_CONVERT_AND_ASSERT_SNR( \
statistics_output_f32_ref, \
statistics_output_ref.data_ptr, \
statistics_output_f32_fut, \
statistics_output_fut.data_ptr, \
1, /* All fns return one element*/ \
output_type, \
STATISTICS_SNR_THRESHOLD_##output_type \
); \
} while (0)
/*--------------------------------------------------------------------------------*/
/* Input Interfaces */
/*--------------------------------------------------------------------------------*/
/*
* General:
* Input interfaces provide inputs to functions inside test templates. They
* ONLY provide the inputs. The output variables should be hard coded.
*
* The input interfaces must have the following format:
*
* ARM_xxx_INPUT_INTERFACE() or
* REF_xxx_INPUT_INTERFACE()
*
* The xxx must be lowercase, and is intended to be the indentifying substring
* in the function's name. Acceptable values are 'sub' or 'add' from the
* functions arm_add_q31.
*/
#define ARM_max_INPUT_INTERFACE(input, block_size) \
PAREN(input, block_size, \
statistics_output_fut.data_ptr, &statistics_idx_fut)
#define REF_max_INPUT_INTERFACE(input, block_size) \
PAREN(input, block_size, \
statistics_output_ref.data_ptr, &statistics_idx_ref)
#define ARM_mean_INPUT_INTERFACE(input, block_size) \
PAREN(input, block_size, statistics_output_fut.data_ptr)
#define REF_mean_INPUT_INTERFACE(input, block_size) \
PAREN(input, block_size, statistics_output_ref.data_ptr)
#define ARM_min_INPUT_INTERFACE(input, block_size) \
PAREN(input, block_size, \
statistics_output_fut.data_ptr, &statistics_idx_fut)
#define REF_min_INPUT_INTERFACE(input, block_size) \
PAREN(input, block_size, \
statistics_output_ref.data_ptr, &statistics_idx_ref)
#define ARM_power_INPUT_INTERFACE(input, block_size) \
PAREN(input, block_size, statistics_output_fut.data_ptr)
#define REF_power_INPUT_INTERFACE(input, block_size) \
PAREN(input, block_size, statistics_output_ref.data_ptr)
#define ARM_rms_INPUT_INTERFACE(input, block_size) \
PAREN(input, block_size, statistics_output_fut.data_ptr)
#define REF_rms_INPUT_INTERFACE(input, block_size) \
PAREN(input, block_size, statistics_output_ref.data_ptr)
#define ARM_std_INPUT_INTERFACE(input, block_size) \
PAREN(input, block_size, statistics_output_fut.data_ptr)
#define REF_std_INPUT_INTERFACE(input, block_size) \
PAREN(input, block_size, statistics_output_ref.data_ptr)
#define ARM_var_INPUT_INTERFACE(input, block_size) \
PAREN(input, block_size, statistics_output_fut.data_ptr)
#define REF_var_INPUT_INTERFACE(input, block_size) \
PAREN(input, block_size, statistics_output_ref.data_ptr)
/*--------------------------------------------------------------------------------*/
/* Test Templates */
/*--------------------------------------------------------------------------------*/
/**
* Specialization of #TEST_TEMPLATE_BUF1_BLK() for statistics tests.
*
* @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
* REF_xxx_INPUT_INTERFACEs.
*/
#define STATISTICS_DEFINE_TEST_TEMPLATE_BUF1_BLK(fn_name, \
suffix, \
input_type, \
output_type, \
comparison_interface) \
JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test, \
arm_##fn_name##_##suffix) \
{ \
TEST_TEMPLATE_BUF1_BLK( \
statistics_f_all, \
statistics_block_sizes, \
input_type, \
output_type, \
arm_##fn_name##_##suffix, \
ARM_##fn_name##_INPUT_INTERFACE, \
ref_##fn_name##_##suffix, \
REF_##fn_name##_INPUT_INTERFACE, \
comparison_interface); \
}
#endif /* _STATISTICS_TEMPLATES_H_ */

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#ifndef _STATISTICS_TEST_DATA_H_
#define _STATISTICS_TEST_DATA_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "arr_desc.h"
#include "arm_math.h"
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
#define STATISTICS_MAX_INPUT_ELEMENTS 32
#define STATISTICS_BIGGEST_INPUT_TYPE float32_t
/*--------------------------------------------------------------------------------*/
/* Declare Variables */
/*--------------------------------------------------------------------------------*/
/* Input/Output Buffers */
ARR_DESC_DECLARE(statistics_output_fut);
ARR_DESC_DECLARE(statistics_output_ref);
extern uint32_t statistics_idx_fut;
extern uint32_t statistics_idx_ref;
extern STATISTICS_BIGGEST_INPUT_TYPE
statistics_output_f32_ref[STATISTICS_MAX_INPUT_ELEMENTS];
extern STATISTICS_BIGGEST_INPUT_TYPE
statistics_output_f32_fut[STATISTICS_MAX_INPUT_ELEMENTS];
/* Block Sizes */
ARR_DESC_DECLARE(statistics_block_sizes);
/* Float Inputs */
ARR_DESC_DECLARE(statistics_zeros);
ARR_DESC_DECLARE(statistics_f_2);
ARR_DESC_DECLARE(statistics_f_15);
ARR_DESC_DECLARE(statistics_f_32);
ARR_DESC_DECLARE(statistics_f_all);
#endif /* _STATISTICS_TEST_DATA_H_ */

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#ifndef _STATISTICS_TEST_GROUP_H_
#define _STATISTICS_TEST_GROUP_H_
/*--------------------------------------------------------------------------------*/
/* Declare Test Groups */
/*--------------------------------------------------------------------------------*/
JTEST_DECLARE_GROUP(statistics_tests);
#endif /* _STATISTICS_TEST_GROUP_H_ */

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#ifndef _STATISTICS_TESTS_H_
#define _STATISTICS_TESTS_H_
/*--------------------------------------------------------------------------------*/
/* Test/Group Declarations */
/*--------------------------------------------------------------------------------*/
JTEST_DECLARE_GROUP(max_tests);
JTEST_DECLARE_GROUP(mean_tests);
JTEST_DECLARE_GROUP(min_tests);
JTEST_DECLARE_GROUP(power_tests);
JTEST_DECLARE_GROUP(rms_tests);
JTEST_DECLARE_GROUP(std_tests);
JTEST_DECLARE_GROUP(var_tests);
#endif /* _STATISTICS_TESTS_H_ */

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#ifndef _SUPPORT_TEMPLATES_H_
#define _SUPPORT_TEMPLATES_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "test_templates.h"
/*--------------------------------------------------------------------------------*/
/* Group Specific Templates */
/*--------------------------------------------------------------------------------*/
/**
* Compare the outputs from the function under test and the reference function.
*/
#define SUPPORT_COMPARE_INTERFACE(block_size, \
output_type) \
do \
{ \
TEST_ASSERT_BUFFERS_EQUAL( \
support_output_ref.data_ptr, \
support_output_fut.data_ptr, \
block_size * sizeof(output_type)); \
} while (0) \
/*--------------------------------------------------------------------------------*/
/* Input Interfaces */
/*--------------------------------------------------------------------------------*/
/*
* General:
* Input interfaces provide inputs to functions inside test templates. They
* ONLY provide the inputs. The output variables should be hard coded.
*
* The input interfaces must have the following format:
*
* ARM_xxx_INPUT_INTERFACE() or
* REF_xxx_INPUT_INTERFACE()
*
* The xxx must be lowercase, and is intended to be the indentifying substring
* in the function's name. Acceptable values are 'sub' or 'add' from the
* functions arm_add_q31.
*/
#define ARM_copy_INPUT_INTERFACE(input, block_size) \
PAREN(input, support_output_fut.data_ptr, block_size)
#define REF_copy_INPUT_INTERFACE(input, block_size) \
PAREN(input, support_output_ref.data_ptr, block_size)
#define ARM_fill_INPUT_INTERFACE(elt, block_size) \
PAREN(elt, support_output_fut.data_ptr, block_size)
#define REF_fill_INPUT_INTERFACE(elt, block_size) \
PAREN(elt, support_output_ref.data_ptr, block_size)
#define ARM_x_to_y_INPUT_INTERFACE(input, block_size) \
PAREN(input, support_output_fut.data_ptr, block_size)
#define REF_x_to_y_INPUT_INTERFACE(input, block_size) \
PAREN(input, support_output_ref.data_ptr, block_size)
/*--------------------------------------------------------------------------------*/
/* Test Templates */
/*--------------------------------------------------------------------------------*/
/**
* Specialization of #TEST_TEMPLATE_BUF1_BLK() for support tests.
*
* @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
* REF_xxx_INPUT_INTERFACEs.
*/
#define SUPPORT_DEFINE_TEST_TEMPLATE_BUF1_BLK(fn_name, \
suffix, \
input_type, \
output_type, \
comparison_interface) \
JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test, \
arm_##fn_name##_##suffix) \
{ \
TEST_TEMPLATE_BUF1_BLK( \
support_f_all, \
support_block_sizes, \
input_type, \
output_type, \
arm_##fn_name##_##suffix, \
ARM_##fn_name##_INPUT_INTERFACE, \
ref_##fn_name##_##suffix, \
REF_##fn_name##_INPUT_INTERFACE, \
comparison_interface); \
}
/**
* Specialization of #TEST_TEMPLATE_ELT1_BLK() for support tests.
*
* @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
* REF_xxx_INPUT_INTERFACEs.
*/
#define SUPPORT_DEFINE_TEST_TEMPLATE_ELT1_BLK(fn_name, \
suffix, \
elt_type, \
output_type, \
comparison_interface) \
JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test, \
arm_##fn_name##_##suffix) \
{ \
TEST_TEMPLATE_ELT1_BLK( \
support_elts, \
support_block_sizes, \
elt_type, \
output_type, \
arm_##fn_name##_##suffix, \
ARM_##fn_name##_INPUT_INTERFACE, \
ref_##fn_name##_##suffix, \
REF_##fn_name##_INPUT_INTERFACE, \
comparison_interface); \
}
#endif /* _SUPPORT_TEMPLATES_H_ */

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#ifndef ARM_SUPPORT_TEST_DATA_H
#define ARM_SUPPORT_TEST_DATA_H
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "arr_desc.h"
/*--------------------------------------------------------------------------------*/
/* Declare Variables */
/*--------------------------------------------------------------------------------*/
/* Input/Output Buffers */
ARR_DESC_DECLARE(support_output_fut);
ARR_DESC_DECLARE(support_output_ref);
/* Block Sizes*/
ARR_DESC_DECLARE(support_block_sizes);
/* Numbers */
ARR_DESC_DECLARE(support_elts);
/* Float Inputs */
ARR_DESC_DECLARE(support_zeros);
ARR_DESC_DECLARE(support_f_2);
ARR_DESC_DECLARE(support_f_15);
ARR_DESC_DECLARE(support_f_32);
ARR_DESC_DECLARE(support_f_all);
#endif

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#ifndef _SUPPORT_TEST_GROUP_H_
#define _SUPPORT_TEST_GROUP_H_
/*--------------------------------------------------------------------------------*/
/* Declare Test Groups */
/*--------------------------------------------------------------------------------*/
JTEST_DECLARE_GROUP(support_tests);
#endif /* _SUPPORT_TEST_GROUP_H_ */

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#ifndef _SUPPORT_TESTS_H_
#define _SUPPORT_TESTS_H_
/*--------------------------------------------------------------------------------*/
/* Test/Group Declarations */
/*--------------------------------------------------------------------------------*/
JTEST_DECLARE_GROUP(copy_tests);
JTEST_DECLARE_GROUP(fill_tests);
JTEST_DECLARE_GROUP(x_to_y_tests);
#endif /* _SUPPORT_TESTS_H_ */

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#ifndef _TEMPLATE_H_
#define _TEMPLATE_H_
/*--------------------------------------------------------------------------------*/
/* Looping and Iteration */
/*--------------------------------------------------------------------------------*/
/**
* Template for the general structure of a loop.
*/
#define TEMPLATE_LOOP(setup, loop_def, body) \
do \
{ \
setup; \
loop_def { \
body; \
} \
} while (0)
/**
* Template for looping over an array-like sequence.
*/
#define TEMPLATE_DO_ARR_LIKE(iter_idx, type, \
arr, arr_length, \
iter_elem_setup, \
body) \
do \
{ \
TEMPLATE_LOOP( \
int iter_idx, \
for(iter_idx = 0; iter_idx < (arr_length); ++iter_idx), \
iter_elem_setup; \
body); \
} while (0)
/**
* Template for looping over the contents of an array.
*/
#define TEMPLATE_DO_ARR(iter_idx, type, iter_elem, arr, arr_length, body) \
do \
{ \
TEMPLATE_DO_ARR_LIKE( \
iter_idx, type, arr, arr_length, \
type iter_elem = (arr)[iter_idx], \
body); \
} while (0)
/**
* Template for looping over the contents of an #ARR_DESC.
*/
#define TEMPLATE_DO_ARR_DESC(iter_idx, type, iter_elem, arr_desc, body) \
do \
{ \
TEMPLATE_DO_ARR_LIKE( \
iter_idx, type, arr_desc, (arr_desc).element_count, \
type iter_elem = ARR_DESC_ELT(type, iter_idx, &(arr_desc)), \
body); \
} while (0)
/*--------------------------------------------------------------------------------*/
/* Test Definition */
/*--------------------------------------------------------------------------------*/
/**
* Template for the general structure of a test.
*/
#define TEMPLATE_TEST(setup, body, teardown) \
do \
{ \
setup; \
body; \
teardown; \
} while (0)
/**
* Template for calling a function.
*
* @note Surround function arguments with the #PAREN() macro.
*
* @example
* void my_func(int arg1, int arg2);
*
* TEMPLATE_CALL_FN(my_func, PAREN(3, 7));
*/
#define TEMPLATE_CALL_FN(fn, fn_args) \
fn fn_args
#endif /* _TEMPLATE_H_ */

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#ifndef _TEST_TEMPLATES_H_
#define _TEST_TEMPLATES_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "template.h"
#include <string.h> /* memcmp() */
#include <inttypes.h> /* PRIu32 */
#include "math_helper.h" /* arm_snr_f32() */
/*--------------------------------------------------------------------------------*/
/* Function Aliases for use in Templates. */
/*--------------------------------------------------------------------------------*/
#define ref_q31_t_to_float ref_q31_to_float
#define ref_q15_t_to_float ref_q15_to_float
#define ref_q7_t_to_float ref_q7_to_float
#define ref_float_to_q31_t ref_float_to_q31
#define ref_float_to_q15_t ref_float_to_q15
#define ref_float_to_q7_t ref_float_to_q7
#define ref_float32_t_to_float ref_copy_f32
#define ref_float_to_float32_t ref_copy_f32
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
/**
* Call the function-under-test.
*/
#define TEST_CALL_FUT(fut, fut_args) \
JTEST_COUNT_CYCLES(TEMPLATE_CALL_FN(fut, fut_args))
/**
* Call the reference-function.
*/
#define TEST_CALL_REF(ref, ref_args) \
TEMPLATE_CALL_FN(ref, ref_args)
/**
* Call the function-under-test and the reference-function.
*/
#define TEST_CALL_FUT_AND_REF(fut, fut_args, ref, ref_args) \
do { \
TEST_CALL_FUT(fut, fut_args); \
TEST_CALL_REF(ref, ref_args); \
} while (0)
/**
* This macro eats a variable number of arguments and evaluates to a null
* statement.
*/
#define TEST_NULL_STATEMENT(...) (void) "TEST_NULL_STATEMENT"
/**
* A function name, Usable in any template where a fut or ref name is accepted,
* that evaluates to a #TEST_NULL_STATEMENT().
*/
#define TEST_NULL_FN TEST_NULL_STATEMENT
/**
* Assert that buffers A and B are byte-equivalent for a number of bytes.
*/
#define TEST_ASSERT_BUFFERS_EQUAL(buf_a, buf_b, bytes) \
do \
{ \
if (memcmp(buf_a, buf_b, bytes) != 0) \
{ \
return JTEST_TEST_FAILED; \
} \
} while (0)
/**
* Assert that the two entities are equal.
*/
#define TEST_ASSERT_EQUAL(a, b) \
do \
{ \
if ((a) != (b)) \
{ \
return JTEST_TEST_FAILED; \
} \
} while (0)
/**
* Convert elements to from src_type to float.
*/
#define TEST_CONVERT_TO_FLOAT(src_ptr, dst_ptr, block_size, src_type) \
do \
{ \
ref_##src_type##_to_float( \
src_ptr, \
dst_ptr, \
block_size); \
} while (0) \
/**
* Convert elements to from float to dst_type .
*/
#define TEST_CONVERT_FLOAT_TO(src_ptr, dst_ptr, block_size, dst_type) \
do \
{ \
ref_float_to_##dst_type( \
src_ptr, \
dst_ptr, \
block_size); \
} while (0) \
/**
* Assert that the SNR between a reference and test sample is above a given
* threshold.
*/
#define TEST_ASSERT_SNR(ref_ptr, tst_ptr, block_size, threshold) \
do \
{ \
float32_t snr = arm_snr_f32(ref_ptr, tst_ptr, block_size); \
if ( snr <= threshold) \
{ \
JTEST_DUMP_STRF("SNR: %f\n", snr); \
return JTEST_TEST_FAILED; \
} \
} while (0) \
/**
* Assert that the SNR between a reference and test sample is above a given
* threshold. Special case for float64_t
*/
#define TEST_ASSERT_DBL_SNR(ref_ptr, tst_ptr, block_size, threshold) \
do \
{ \
float64_t snr = arm_snr_f64(ref_ptr, tst_ptr, block_size); \
if ( snr <= threshold) \
{ \
JTEST_DUMP_STRF("SNR: %f\n", snr); \
return JTEST_TEST_FAILED; \
} \
} while (0) \
/**
* Compare test and reference elements by converting to float and
* calculating an SNR.
*
* This macro is a merger of the #TEST_CONVERT_TO_FLOAT() and
* #TEST_ASSERT_SNR() macros.
*/
#define TEST_CONVERT_AND_ASSERT_SNR(ref_dst_ptr, ref_src_ptr, \
tst_dst_ptr, tst_src_ptr, \
block_size, \
tst_src_type, \
threshold) \
do \
{ \
TEST_CONVERT_TO_FLOAT(ref_src_ptr, \
ref_dst_ptr, \
block_size, \
tst_src_type); \
TEST_CONVERT_TO_FLOAT(tst_src_ptr, \
tst_dst_ptr, \
block_size, \
tst_src_type); \
TEST_ASSERT_SNR(ref_dst_ptr, \
tst_dst_ptr, \
block_size, \
threshold); \
} while (0)
/**
* Execute statements only if the combination of block size, function type
* specifier, and input ARR_DESC_t are valid.
*
* @example An ARR_DESC_t that contains 64 bytes cant service a 32 element
* block size if they are extracted in float32_t increments.
*
* 8 * 32 = 256 > 64.
*/
#define TEST_DO_VALID_BLOCKSIZE(block_size, fn_type_spec, \
input_arr_desc, body) \
do \
{ \
if (block_size * sizeof(fn_type_spec) <= \
ARR_DESC_BYTES(input_arr_desc)) \
{ \
JTEST_DUMP_STRF("Block Size: %"PRIu32"\n", block_size); \
body; \
} \
} while (0) \
/**
* Template for tests that rely on one input buffer and a blocksize parameter.
*
* The buffer is an #ARR_DESC_t. It is iterated over and it's values are
* passed to the function under test and reference functions through their
* appropriate argument interfaces. The argument interfaces this template to
* execute structurally similar functions.
*
*/
#define TEST_TEMPLATE_BUF1_BLK(arr_desc_inputs, \
arr_desc_block_sizes, \
input_type, output_type, \
fut, fut_arg_interface, \
ref, ref_arg_interface, \
compare_interface) \
do \
{ \
TEMPLATE_DO_ARR_DESC( \
input_idx, ARR_DESC_t *, input_ptr, arr_desc_inputs \
, \
TEMPLATE_DO_ARR_DESC( \
block_size_idx, uint32_t, block_size, arr_desc_block_sizes \
, \
void * input_data_ptr = input_ptr->data_ptr; \
\
TEST_DO_VALID_BLOCKSIZE( \
block_size, input_type, input_ptr \
, \
TEST_CALL_FUT_AND_REF( \
fut, fut_arg_interface( \
input_data_ptr, block_size), \
ref, ref_arg_interface( \
input_data_ptr, block_size)); \
\
compare_interface(block_size, output_type)))); \
\
return JTEST_TEST_PASSED; \
\
} while (0)
/**
* Template for tests that rely on an input buffer and an element.
*
* An element can is any thing which doesn't walk and talk like a
* sequence. Examples include numbers, and structures.
*/
#define TEST_TEMPLATE_BUF1_ELT1(arr_desc_inputs, \
arr_desc_elts, \
input_type, elt_type, output_type, \
fut, fut_arg_interface, \
ref, ref_arg_interface, \
compare_interface) \
do \
{ \
TEMPLATE_DO_ARR_DESC( \
input_idx, ARR_DESC_t *, input_ptr, arr_desc_inputs \
, \
TEMPLATE_DO_ARR_DESC( \
elt_idx, elt_type, elt, arr_desc_elts \
, \
void * input_data_ptr = input_ptr->data_ptr; \
TEST_CALL_FUT_AND_REF( \
fut, fut_arg_interface(input_data_ptr, elt), \
ref, ref_arg_interface(input_data_ptr, elt)); \
\
compare_interface(output_type))); \
return JTEST_TEST_PASSED; \
} while (0)
/**
* Template for tests that rely on an input buffer, an element, and a blocksize
* parameter.
*/
#define TEST_TEMPLATE_BUF1_ELT1_BLK(arr_desc_inputs, \
arr_desc_elts, \
arr_desc_block_sizes, \
input_type, elt_type, output_type, \
fut, fut_arg_interface, \
ref, ref_arg_interface, \
compare_interface); \
do \
{ \
TEMPLATE_DO_ARR_DESC( \
inut_idx, ARR_DESC_t *, input_ptr, arr_desc_inputs \
, \
TEMPLATE_DO_ARR_DESC( \
block_size_idx, uint32_t, block_size, \
arr_desc_block_sizes \
, \
TEMPLATE_DO_ARR_DESC( \
elt_idx, elt_type, elt, arr_desc_elts \
, \
void * input_data_ptr = input_ptr->data_ptr; \
TEST_DO_VALID_BLOCKSIZE( \
block_size, input_type, input_ptr, \
\
TEST_CALL_FUT_AND_REF( \
fut, fut_arg_interface( \
input_data_ptr, elt, block_size), \
ref, ref_arg_interface( \
input_data_ptr, elt, block_size)); \
compare_interface(block_size, output_type))))); \
return JTEST_TEST_PASSED; \
} while (0)
/**
* Template for tests that rely on an input buffer, two elements, and a blocksize
* parameter.
*/
#define TEST_TEMPLATE_BUF1_ELT2_BLK(arr_desc_inputs, \
arr_desc_elt1s, \
arr_desc_elt2s, \
arr_desc_block_sizes, \
input_type, elt1_type, \
elt2_type, output_type, \
fut, fut_arg_interface, \
ref, ref_arg_interface, \
compare_interface) \
do \
{ \
TEMPLATE_DO_ARR_DESC( \
inut_idx, ARR_DESC_t *, input_ptr, arr_desc_inputs \
, \
TEMPLATE_DO_ARR_DESC( \
block_size_idx, uint32_t, block_size, \
arr_desc_block_sizes \
, \
TEMPLATE_DO_ARR_DESC( \
elt1_idx, elt1_type, elt1, arr_desc_elt1s \
, \
TEMPLATE_DO_ARR_DESC( \
elt2_idx, elt2_type, elt2, arr_desc_elt2s \
, \
void * input_data_ptr = input_ptr->data_ptr; \
TEST_DO_VALID_BLOCKSIZE( \
block_size, input_type, input_ptr, \
TEST_CALL_FUT_AND_REF( \
fut, fut_arg_interface( \
input_data_ptr, elt1, elt2, block_size), \
ref, ref_arg_interface( \
input_data_ptr, elt1, elt2, block_size)); \
compare_interface(block_size, output_type)))))); \
return JTEST_TEST_PASSED; \
} while (0)
/**
* Template for tests that rely on two input buffers and a blocksize parameter.
*
* The two #ARR_DESC_t, input buffers are iterated through in parallel. The
* length of the first #ARR_DESC_t determines the length of the iteration.
*/
#define TEST_TEMPLATE_BUF2_BLK(arr_desc_inputs_a, \
arr_desc_inputs_b, \
arr_desc_block_sizes, \
input_type, output_type, \
fut, fut_arg_interface, \
ref, ref_arg_interface, \
compare_interface) \
do \
{ \
/* Iterate over two input arrays in parallel.*/ \
TEMPLATE_DO_ARR_DESC( \
input_idx, ARR_DESC_t *, input_ptr, arr_desc_inputs_a \
, \
TEMPLATE_DO_ARR_DESC( \
block_size_idx, uint32_t, block_size, arr_desc_block_sizes, \
void * input_a_ptr = input_ptr->data_ptr; \
void * input_b_ptr = ARR_DESC_ELT( \
ARR_DESC_t *, input_idx, \
&(arr_desc_inputs_b))->data_ptr; \
\
TEST_DO_VALID_BLOCKSIZE( \
block_size, input_type, input_ptr \
, \
TEST_CALL_FUT_AND_REF( \
fut, fut_arg_interface( \
input_a_ptr, input_b_ptr, block_size), \
ref, ref_arg_interface( \
input_a_ptr, input_b_ptr, block_size)); \
\
compare_interface(block_size, output_type)))); \
return JTEST_TEST_PASSED; \
} while (0)
/**
* Test template that uses a single element.
*/
#define TEST_TEMPLATE_ELT1(arr_desc_elts, \
elt_type, output_type, \
fut, fut_arg_interface, \
ref, ref_arg_interface, \
compare_interface) \
do \
{ \
TEMPLATE_DO_ARR_DESC( \
elt_idx, elt_type, elt, arr_desc_elts \
, \
TEST_CALL_FUT_AND_REF( \
fut, fut_arg_interface( \
elt), \
ref, ref_arg_interface( \
elt)); \
/* Comparison interfaces typically accept */ \
/* a block_size. Pass a dummy value 1.*/ \
compare_interface(1, output_type)); \
return JTEST_TEST_PASSED; \
} while (0)
/**
* Test template that iterates over two sets of elements in parallel.
*
* The length of the first set determines the number of iteratsions.
*/
#define TEST_TEMPLATE_ELT2(arr_desc_elts_a, \
arr_desc_elts_b, \
elt_a_type, elt_b_type, output_type, \
fut, fut_arg_interface, \
ref, ref_arg_interface, \
compare_interface) \
do \
{ \
TEMPLATE_DO_ARR_DESC( \
elt_a_idx, elt_a_type, elt_a, arr_desc_elts_a \
, \
elt_b_type * elt_b = ARR_DESC_ELT( \
elt_b_type, \
elt_a_idx, \
arr_desc_elts_b); \
\
TEST_CALL_FUT_AND_REF( \
fut, fut_arg_interface( \
elt_a, elt_b), \
ref, ref_arg_interface( \
elt_a, elt_b)); \
/* Comparison interfaces typically accept */ \
/* a block_size. Pass a dummy value 1.*/ \
compare_interface(1, output_type)); \
return JTEST_TEST_PASSED; \
} while (0)
/**
* Test template that uses an element and a block size.
*/
#define TEST_TEMPLATE_ELT1_BLK(arr_desc_elts, \
arr_desc_block_sizes, \
elt_type, output_type, \
fut, fut_arg_interface, \
ref, ref_arg_interface, \
compare_interface) \
do \
{ \
TEMPLATE_DO_ARR_DESC( \
block_size_idx, uint32_t, block_size, \
arr_desc_block_sizes \
, \
TEMPLATE_DO_ARR_DESC( \
elt_idx, elt_type, elt, arr_desc_elts \
, \
JTEST_DUMP_STRF("Block Size: %d\n", \
(int)block_size); \
TEST_CALL_FUT_AND_REF( \
fut, fut_arg_interface( \
elt, block_size), \
ref, ref_arg_interface( \
elt, block_size)); \
compare_interface(block_size, output_type))); \
return JTEST_TEST_PASSED; \
} while (0)
#endif /* _TEST_TEMPLATES_H_ */

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#ifndef _TRANSFORM_TEMPLATES_H_
#define _TRANSFORM_TEMPLATES_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "test_templates.h"
#include <string.h> /* memcpy() */
/*--------------------------------------------------------------------------------*/
/* Group Specific Templates */
/*--------------------------------------------------------------------------------*/
/**
* Comparison SNR thresholds for the data types used in transform_tests.
*/
#define TRANSFORM_SNR_THRESHOLD_float32_t 90
#define TRANSFORM_SNR_THRESHOLD_q31_t 90
#define TRANSFORM_SNR_THRESHOLD_q15_t 30
#define DCT4_TRANSFORM_SNR_THRESHOLD_float32_t 80
#define DCT4_TRANSFORM_SNR_THRESHOLD_q31_t 75
#define DCT4_TRANSFORM_SNR_THRESHOLD_q15_t 11
/**
* Compare the outputs from the function under test and the reference
* function using SNR.
*/
#define TRANSFORM_SNR_COMPARE_INTERFACE(block_size, \
output_type) \
do \
{ \
TEST_CONVERT_AND_ASSERT_SNR( \
transform_fft_output_f32_ref, \
(output_type *) transform_fft_output_ref, \
transform_fft_output_f32_fut, \
(output_type *) transform_fft_output_fut, \
block_size, \
output_type, \
TRANSFORM_SNR_THRESHOLD_##output_type \
); \
} while (0)
/**
* Compare the outputs from the function under test and the reference
* function using SNR.
*/
#define DCT_TRANSFORM_SNR_COMPARE_INTERFACE(block_size, \
output_type) \
do \
{ \
TEST_CONVERT_AND_ASSERT_SNR( \
transform_fft_output_f32_ref, \
(output_type *) transform_fft_output_ref, \
transform_fft_output_f32_fut, \
(output_type *) transform_fft_output_fut, \
block_size, \
output_type, \
DCT4_TRANSFORM_SNR_THRESHOLD_##output_type \
); \
} while (0) \
/**
* Specialization on #TRANSFORM_SNR_COMPARE_INTERFACE() to fix the block_size
* for complex datasets.
*/
#define TRANSFORM_SNR_COMPARE_CMPLX_INTERFACE(block_size, output_type) \
/* Complex numbers have two components*/ \
TRANSFORM_SNR_COMPARE_INTERFACE(block_size * 2, output_type )
/**
* This macro copys data from the input_ptr into input arrays.
*
* Some functions modify their input data; in order to provide the same data to
* multiple tests, copies must be made so the changes from one function don't
* impact the others.
*/
#define TRANSFORM_COPY_INPUTS(input_ptr, \
bytes) \
do \
{ \
memcpy( \
transform_fft_input_fut, \
input_ptr, \
bytes); \
memcpy( \
transform_fft_input_ref, \
input_ptr, \
bytes); \
} while (0)
/**
* This macro copys data from the input_ptr into input arrays. It also creates
* symmetric input data for rfft inverse.
*
* The 4.534234f just makes the middle entry of the array semi random. It's
* actual value doesn't seem to matter much.
*
* Some functions modify their input data; in order to provide the same data to
* multiple tests, copies must be made so the changes from one function don't
* impact the others.
*/
#define TRANSFORM_PREPARE_INVERSE_INPUTS(input_ptr, \
fftlen, input_type, bytes) \
do \
{ \
uint32_t i; \
\
memcpy( \
transform_fft_input_fut, \
input_ptr, \
bytes); \
\
((input_type*)transform_fft_input_fut)[1] = 0; \
((input_type*)transform_fft_input_fut)[fftlen + 0] = 0; \
((input_type*)transform_fft_input_fut)[fftlen + 1] = 0; \
for(i=1;i<fftlen/2;i++) \
{ \
*((input_type*)transform_fft_input_fut + fftlen + 2*i + 0) = \
*((input_type*)transform_fft_input_fut + fftlen - 2*i + 0); \
*((input_type*)transform_fft_input_fut + fftlen + 2*i + 1) = \
-(*((input_type*)transform_fft_input_fut + fftlen - 2*i + 1)); \
\
} \
\
memcpy( \
transform_fft_input_ref, \
transform_fft_input_fut, \
bytes * 2); \
} while (0)
/**
* This macro copys data from the input_ptr into the in-place input arrays.
*
* Some functions modify their input data; in order to provide the same data to
* multiple tests, copies must be made so the changes from one function don't
* impact the others.
*/
#define TRANSFORM_PREPARE_INPLACE_INPUTS_DOWNSHIFT(input_ptr, \
bytes, \
type) \
do \
{ \
uint32_t i; \
memcpy( \
transform_fft_inplace_input_fut, \
input_ptr, \
bytes); \
memcpy( \
transform_fft_inplace_input_ref, \
input_ptr, \
bytes); \
for(i=0;i<bytes/sizeof(type);i++) { \
*((type*)transform_fft_inplace_input_fut + i) >>= 1; \
*((type*)transform_fft_inplace_input_ref + i) >>= 1;} \
} while (0)
/**
* This macro copys data from the input_ptr into the in-place input arrays.
*
* Some functions modify their input data; in order to provide the same data to
* multiple tests, copies must be made so the changes from one function don't
* impact the others.
*/
#define TRANSFORM_PREPARE_INPLACE_INPUTS(input_ptr, \
bytes) \
do \
{ \
memcpy( \
transform_fft_inplace_input_fut, \
input_ptr, \
bytes); \
memcpy( \
transform_fft_inplace_input_ref, \
input_ptr, \
bytes); \
} while (0)
#endif /* _TRANSFORM_TEMPLATES_H_ */

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#ifndef _TRANSFORM_TEST_DATA_H_
#define _TRANSFORM_TEST_DATA_H_
/*--------------------------------------------------------------------------------*/
/* Includes */
/*--------------------------------------------------------------------------------*/
#include "arr_desc.h"
#include "arm_math.h"
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
#define TRANSFORM_MAX_FFT_LEN 4096
#define TRANFORM_BIGGEST_INPUT_TYPE float32_t
/*--------------------------------------------------------------------------------*/
/* Variable Declarations */
/*--------------------------------------------------------------------------------*/
/* Lengths are multiplied by 2 to accomodate complex numbers*/
extern float32_t transform_fft_output_fut[TRANSFORM_MAX_FFT_LEN * 2];
extern float32_t transform_fft_output_ref[TRANSFORM_MAX_FFT_LEN * 2];
extern float32_t transform_fft_input_fut[TRANSFORM_MAX_FFT_LEN * 2];
extern float32_t transform_fft_input_ref[TRANSFORM_MAX_FFT_LEN * 2];
extern float32_t transform_fft_output_f32_fut[TRANSFORM_MAX_FFT_LEN * 2];
extern float32_t transform_fft_output_f32_ref[TRANSFORM_MAX_FFT_LEN * 2];
extern float32_t * transform_fft_inplace_input_fut;
extern float32_t * transform_fft_inplace_input_ref;
extern float32_t transform_fft_f32_inputs[TRANSFORM_MAX_FFT_LEN * 2];
extern q31_t transform_fft_q31_inputs[TRANSFORM_MAX_FFT_LEN * 2];
extern q15_t * transform_fft_q15_inputs;
extern q15_t dct4_transform_fft_q15_inputs[TRANSFORM_MAX_FFT_LEN * 2];
/* FFT Lengths */
ARR_DESC_DECLARE(transform_radix2_fftlens);
ARR_DESC_DECLARE(transform_radix4_fftlens);
ARR_DESC_DECLARE(transform_rfft_fftlens);
ARR_DESC_DECLARE(transform_rfft_fast_fftlens);
ARR_DESC_DECLARE(transform_dct_fftlens);
/* CFFT Structs */
ARR_DESC_DECLARE(transform_cfft_f32_structs);
ARR_DESC_DECLARE(transform_cfft_q31_structs);
ARR_DESC_DECLARE(transform_cfft_q15_structs);
#endif /* _TRANSFORM_TEST_DATA_H_ */

9
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#ifndef _TRANSFORM_TEST_GROUP_H_
#define _TRANSFORM_TEST_GROUP_H_
/*--------------------------------------------------------------------------------*/
/* Declare Test Groups */
/*--------------------------------------------------------------------------------*/
JTEST_DECLARE_GROUP(transform_tests);
#endif /* _TRANSFORM_TEST_GROUP_H_ */

13
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#ifndef _TRANSFORM_TESTS_H_
#define _TRANSFORM_TESTS_H_
/*--------------------------------------------------------------------------------*/
/* Test/Group Declarations */
/*--------------------------------------------------------------------------------*/
JTEST_DECLARE_GROUP(cfft_tests);
JTEST_DECLARE_GROUP(cfft_family_tests);
JTEST_DECLARE_GROUP(dct4_tests);
JTEST_DECLARE_GROUP(rfft_tests);
JTEST_DECLARE_GROUP(rfft_fast_tests);
#endif /* _TRANSFORM_TESTS_H_ */

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#ifndef _TYPE_ABBREV_H_
#define _TYPE_ABBREV_H_
/*--------------------------------------------------------------------------------*/
/* Macros and Defines */
/*--------------------------------------------------------------------------------*/
/**
* Expand the abbreviation for a type into the type itself.
*/
#define TYPE_FROM_ABBREV(abbrev) \
TYPE_ABBREV_##abbrev \
/**
* Expand the type to an abbreviation for that type.
*
* Inverse of #TYPE_FROM_ABBREV().
*
* @note Should be able to get a type back by writing.
* TYPE_FROM_ABBREV(ABBREV_FROM_TYPE(type))
*/
#define ABBREV_FROM_TYPE(type) \
TYPE_SUFFIX_##type
#define TYPE_ABBREV_f64 float64_t
#define TYPE_ABBREV_f32 float32_t
#define TYPE_ABBREV_q31 q31_t
#define TYPE_ABBREV_q15 q15_t
#define TYPE_ABBREV_q7 q7_t
#define TYPE_SUFFIX_float64_t f64
#define TYPE_SUFFIX_float32_t f32
#define TYPE_SUFFIX_q31_t q31
#define TYPE_SUFFIX_q15_t q15
#define TYPE_SUFFIX_q7_t q7
#endif /* _TYPE_ABBREV_H_ */

52
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/*----------------------------------------------------------------------------
* Name: Retarget.c
* Purpose: 'Retarget' layer for target-dependent low level functions
* Note(s):
*----------------------------------------------------------------------------
* This file is part of the uVision/ARM development tools.
* This software may only be used under the terms of a valid, current,
* end user licence from KEIL for a compatible version of KEIL software
* development tools. Nothing else gives you the right to use this software.
*
* This software is supplied "AS IS" without warranties of any kind.
*
* Copyright (c) 2011 Keil - An ARM Company. All rights reserved.
*----------------------------------------------------------------------------*/
#include <stdio.h>
#include <rt_misc.h>
#include "Serial.h"
#pragma import(__use_no_semihosting_swi)
struct __FILE { int handle; /* Add whatever you need here */ };
FILE __stdout;
FILE __stdin;
int fputc(int c, FILE *f) {
return (SER_PutChar(c));
}
int fgetc(FILE *f) {
return (SER_GetChar());
}
int ferror(FILE *f) {
/* Your implementation of ferror */
return EOF;
}
void _ttywrch(int c) {
SER_PutChar(c);
}
void _sys_exit(int return_code) {
label: goto label; /* endless loop */
}

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