186 lines
6.1 KiB
C
186 lines
6.1 KiB
C
/**
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******************************************************************************
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* @file main.c
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* @author MCU Application Team
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* @brief Main program body
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) Puya Semiconductor Co.
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* All rights reserved.</center></h2>
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "gpio.h"
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#include "tim.h"
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#include "usart.h"
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#include "iwdg.h"
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#include "PY32module_main.h"
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/* Private define ------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private user code ---------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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static void APP_SystemClockConfig(void);
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/**
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* @brief Application Entry Function.
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* @retval int
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*/
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int main(void)
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{
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__HAL_DBGMCU_FREEZE_IWDG();
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__HAL_DBGMCU_FREEZE_TIM1();
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__HAL_DBGMCU_FREEZE_TIM_MB();
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/* Reset of all peripherals, Initializes the Systick. */
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HAL_Init();
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/* System clock configuration */
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APP_SystemClockConfig();
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// MX_IWDG_Init();
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MX_GPIO_Init();
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MX_TIM1_Init();
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MX_TIMMB_Init();
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MX_USART1_UART_Init();
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PYModule_FirstInit();
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/* infinite loop */
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while (1)
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{
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PYModule_main();
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}
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}
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/**
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* @brief System clock configuration function
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* @param None
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* @retval None
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*/
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static void APP_SystemClockConfig(void)
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{
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// RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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// RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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// /* Oscillator configuration */
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// RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE; /* Select oscillator HSE, HSI, LSI, LSE */
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// RCC_OscInitStruct.HSIState = RCC_HSI_ON; /* Enable HSI */
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// RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1; /* HSI 1 frequency division */
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// RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_24MHz; /* Configure HSI clock 24MHz */
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// RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS_DISABLE; /* Close HSE bypass */
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// RCC_OscInitStruct.LSIState = RCC_LSI_OFF; /* Close LSI */
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// /*RCC_OscInitStruct.LSICalibrationValue = RCC_LSICALIBRATION_32768Hz;*/
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// RCC_OscInitStruct.LSEState = RCC_LSE_OFF; /* Close LSE */
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// /*RCC_OscInitStruct.LSEDriver = RCC_LSEDRIVE_MEDIUM;*/
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// /* Configure oscillator */
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// if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
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// {
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// Error_Handler();
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// }
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// /* Clock source configuration */
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// RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1; /* Choose to configure clock HCLK, SYSCLK, PCLK1 */
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// RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSISYS; /* Select HSISYS as the system clock */
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// RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; /* AHB clock 1 division */
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// RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; /* APB clock 1 division */
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// /* Configure clock source */
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// if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
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// {
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// Error_Handler();
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// }
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/* Âêëþ÷åíèå HSI */
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RCC->CR |= RCC_CR_HSION;
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while (!(RCC->CR & RCC_CR_HSIRDY));
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/* Íàñòðîéêà äåëèòåëÿ HSI */
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RCC->CR &= ~RCC_CR_HSIDIV;
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RCC->CR |= RCC_HSI_DIV1;
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/* Êàëèáðîâêà HSI */
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RCC->ICSCR &= ~RCC_ICSCR_HSI_TRIM;
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RCC->ICSCR |= (RCC_HSICALIBRATION_24MHz << RCC_ICSCR_HSI_TRIM_Pos);
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/* Îòêëþ÷åíèå LSI è LSE */
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#ifdef RCC_LSE_SUPPORT
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RCC->CSR &= ~RCC_CSR_LSION;
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RCC->BDCR &= ~RCC_BDCR_LSEON;
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#endif
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/* Îòêëþ÷åíèå áàéïàñà HSE */
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RCC->CR &= ~0x00000000U;
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/* Óñòàíîâêà èñòî÷íèêà ñèñòåìíîé òàêòîâîé ÷àñòîòû */
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RCC->CFGR &= ~RCC_CFGR_SW;
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#ifdef PY32F002Bx5
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RCC->CFGR |= RCC_SYSCLKSOURCE_HSISYS;
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while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_SYSCLKSOURCE_HSISYS);
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#endif
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#ifdef PY32F002Ax5
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RCC->CFGR |= RCC_SYSCLKSOURCE_HSI;
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while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_SYSCLKSOURCE_HSI);
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#endif
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/* Óñòàíîâêà äåëèòåëåé */
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RCC->CFGR &= ~(RCC_CFGR_HPRE | RCC_CFGR_PPRE_1);
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RCC->CFGR |= RCC_SYSCLK_DIV1 | RCC_HCLK_DIV1;
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/* Íàñòðîéêà çàäåðæêè ôëåø-ïàìÿòè */
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FLASH->ACR &= ~FLASH_ACR_LATENCY;
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FLASH->ACR |= FLASH_LATENCY_0;
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}
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uint32_t HAL_RCC_GetPCLK1Freq(void)
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{
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/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
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return (uint32_t)((SystemCoreClock) >> (APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE) >> RCC_CFGR_PPRE_Pos] & 0x1FU));
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}
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/**
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* @brief This function is executed in case of error occurrence.
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* @retval None
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*/
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void Error_Handler(void)
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{
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/* USER CODE BEGIN Error_Handler_Debug */
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/* User can add his own implementation to report the HAL error return state */
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__disable_irq();
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while (1)
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{
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}
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/* USER CODE END Error_Handler_Debug */
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}
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#ifdef USE_FULL_ASSERT
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/**
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* @brief Reports the name of the source file and the source line number
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* where the assert_param error has occurred.
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* @param file: pointer to the source file name
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* @param line: assert_param error line source number
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* @retval None
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*/
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void assert_failed(uint8_t *file, uint32_t line)
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{
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/* Users can add their own printing information as needed,
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for example: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
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/* Infinite loop */
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while (1)
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{
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}
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}
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#endif /* USE_FULL_ASSERT */
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/************************ (C) COPYRIGHT Puya *****END OF FILE******************/
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