начало
This commit is contained in:
236
Core/Src/can.c
Normal file
236
Core/Src/can.c
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@@ -0,0 +1,236 @@
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file can.c
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* @brief This file provides code for the configuration
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* of the CAN instances.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2025 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "can.h"
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/* USER CODE BEGIN 0 */
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CAN_TxHeaderTypeDef TxHeader;
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CAN_RxHeaderTypeDef RxHeader;
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CAN_FilterTypeDef sFilterConfig;
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uint8_t msgDataSend[8];
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uint32_t mailBoxNum = 0;
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/* USER CODE END 0 */
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CAN_HandleTypeDef hcan2;
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/* CAN2 init function */
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void MX_CAN2_Init(void)
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{
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/* USER CODE BEGIN CAN2_Init 0 */
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/* USER CODE END CAN2_Init 0 */
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/* USER CODE BEGIN CAN2_Init 1 */
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/* USER CODE END CAN2_Init 1 */
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hcan2.Instance = CAN2;
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hcan2.Init.Prescaler = 20;
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hcan2.Init.Mode = CAN_MODE_NORMAL;
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hcan2.Init.SyncJumpWidth = CAN_SJW_1TQ;
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hcan2.Init.TimeSeg1 = CAN_BS1_10TQ;
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hcan2.Init.TimeSeg2 = CAN_BS2_5TQ;
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hcan2.Init.TimeTriggeredMode = DISABLE;
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hcan2.Init.AutoBusOff = DISABLE;
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hcan2.Init.AutoWakeUp = DISABLE;
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hcan2.Init.AutoRetransmission = DISABLE;
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hcan2.Init.ReceiveFifoLocked = DISABLE;
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hcan2.Init.TransmitFifoPriority = DISABLE;
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if (HAL_CAN_Init(&hcan2) != HAL_OK)
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{
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Error_Handler();
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}
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/* USER CODE BEGIN CAN2_Init 2 */
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sFilterConfig.FilterBank = 0;
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sFilterConfig.FilterMode = CAN_FILTERMODE_IDMASK;
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sFilterConfig.FilterScale = CAN_FILTERSCALE_32BIT;
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sFilterConfig.FilterIdHigh = 0x0000;
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sFilterConfig.FilterIdLow = 0x0000;
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sFilterConfig.FilterMaskIdHigh = 0x0000;
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sFilterConfig.FilterMaskIdLow = 0x0000;
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sFilterConfig.FilterFIFOAssignment = CAN_RX_FIFO0;
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sFilterConfig.FilterActivation = ENABLE;
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//sFilterConfig.SlaveStartFilterBank = 14;
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if(HAL_CAN_ConfigFilter(&hcan2, &sFilterConfig) != HAL_OK)
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{
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Error_Handler();
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}
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TxHeader.StdId = 0x300;
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TxHeader.ExtId = 0x11000BE4;
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TxHeader.DLC = 8;
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TxHeader.TransmitGlobalTime = DISABLE;
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TxHeader.RTR = CAN_RTR_DATA;
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TxHeader.IDE = CAN_ID_EXT;
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if(HAL_CAN_ActivateNotification(&hcan2, CAN_IT_RX_FIFO0_MSG_PENDING) != HAL_OK)
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{
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Error_Handler();
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}
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if(HAL_CAN_ActivateNotification(&hcan2, CAN_IT_TX_MAILBOX_EMPTY) != HAL_OK)
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{
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Error_Handler();
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}
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/* USER CODE END CAN2_Init 2 */
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}
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void HAL_CAN_MspInit(CAN_HandleTypeDef* canHandle)
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{
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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if(canHandle->Instance==CAN2)
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{
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/* USER CODE BEGIN CAN2_MspInit 0 */
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/* USER CODE END CAN2_MspInit 0 */
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/* CAN2 clock enable */
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__HAL_RCC_CAN2_CLK_ENABLE();
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__HAL_RCC_CAN1_CLK_ENABLE();
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__HAL_RCC_GPIOB_CLK_ENABLE();
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/**CAN2 GPIO Configuration
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PB12 ------> CAN2_RX
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PB13 ------> CAN2_TX
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*/
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GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_13;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF9_CAN2;
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HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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/* CAN2 interrupt Init */
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HAL_NVIC_SetPriority(CAN2_TX_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(CAN2_TX_IRQn);
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HAL_NVIC_SetPriority(CAN2_RX0_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(CAN2_RX0_IRQn);
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/* USER CODE BEGIN CAN2_MspInit 1 */
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/* USER CODE END CAN2_MspInit 1 */
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}
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}
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void HAL_CAN_MspDeInit(CAN_HandleTypeDef* canHandle)
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{
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if(canHandle->Instance==CAN2)
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{
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/* USER CODE BEGIN CAN2_MspDeInit 0 */
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/* USER CODE END CAN2_MspDeInit 0 */
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/* Peripheral clock disable */
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__HAL_RCC_CAN2_CLK_DISABLE();
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__HAL_RCC_CAN1_CLK_DISABLE();
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/**CAN2 GPIO Configuration
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PB12 ------> CAN2_RX
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PB13 ------> CAN2_TX
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*/
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HAL_GPIO_DeInit(GPIOB, GPIO_PIN_12|GPIO_PIN_13);
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/* CAN2 interrupt Deinit */
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HAL_NVIC_DisableIRQ(CAN2_TX_IRQn);
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HAL_NVIC_DisableIRQ(CAN2_RX0_IRQn);
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/* USER CODE BEGIN CAN2_MspDeInit 1 */
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/* USER CODE END CAN2_MspDeInit 1 */
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}
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}
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/* USER CODE BEGIN 1 */
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int CAN_send(uint16_t data[], int Addr)
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{
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int wait = 1000;
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while(wait-- && (HAL_CAN_GetTxMailboxesFreeLevel(&hcan2) == 0));
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if (HAL_CAN_GetTxMailboxesFreeLevel(&hcan2) != 0)
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{
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msgDataSend[4] = 0xE0|(Addr >>8) & 0x001f;
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msgDataSend[5] = ( Addr ) & 0x00ff;
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msgDataSend[6] = (data[Addr ]>>8) & 0x00ff;
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msgDataSend[7] = (data[Addr ] ) & 0x00ff;
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msgDataSend[0] = (data[Addr+1]>>8) & 0x00ff;
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msgDataSend[1] = (data[Addr+1] ) & 0x00ff;
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msgDataSend[2] = (data[Addr+2]>>8) & 0x00ff;
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msgDataSend[3] = (data[Addr+2] ) & 0x00ff;
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HAL_CAN_AddTxMessage(&hcan2, &TxHeader, msgDataSend, &mailBoxNum);
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return 1;
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}
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else
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{
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HAL_CAN_Stop(&hcan2);
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HAL_CAN_Start(&hcan2);
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return 0;
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}
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}
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void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan_i)
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{
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CAN_RxHeaderTypeDef msgHeader;
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uint8_t msgData[8];
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HAL_CAN_GetRxMessage(&hcan2, CAN_RX_FIFO0, &msgHeader, msgData);
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Led_1_TGL;
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}
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void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan)
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{
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// HAL_CAN_ERROR_TX_ALST0 & HAL_CAN_ERROR_TX_TERR0;
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hcan->ErrorCode &= ~(HAL_CAN_ERROR_TX_ALST0|HAL_CAN_ERROR_TX_TERR0);
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if(fif0_cownt)
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{
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fif0_cownt--;
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CAN_send((uint16_t *)pissa, 0);
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} }
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void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan)
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{
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if(fif0_cownt)
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{
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fif0_cownt--;
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CAN_send((uint16_t *)pissa, 0);
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} }
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void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan)
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{
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if(fif0_cownt)
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{
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fif0_cownt--;
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CAN_send((uint16_t *)pissa, 0);
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} }
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/* USER CODE END 1 */
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84
Core/Src/crc16.c
Normal file
84
Core/Src/crc16.c
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@@ -0,0 +1,84 @@
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#include "crc16.h"
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#define Poln 0xA001
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const uint16_t crc_16_tab[] = {
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0x0000, 0xc0c1, 0xc181, 0x0140, 0xc301, 0x03c0, 0x0280, 0xc241,
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0xc601, 0x06c0, 0x0780, 0xc741, 0x0500, 0xc5c1, 0xc481, 0x0440,
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0xcc01, 0x0cc0, 0x0d80, 0xcd41, 0x0f00, 0xcfc1, 0xce81, 0x0e40,
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0x0a00, 0xcac1, 0xcb81, 0x0b40, 0xc901, 0x09c0, 0x0880, 0xc841,
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0xd801, 0x18c0, 0x1980, 0xd941, 0x1b00, 0xdbc1, 0xda81, 0x1a40,
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0x1e00, 0xdec1, 0xdf81, 0x1f40, 0xdd01, 0x1dc0, 0x1c80, 0xdc41,
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0x1400, 0xd4c1, 0xd581, 0x1540, 0xd701, 0x17c0, 0x1680, 0xd641,
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0xd201, 0x12c0, 0x1380, 0xd341, 0x1100, 0xd1c1, 0xd081, 0x1040,
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0xf001, 0x30c0, 0x3180, 0xf141, 0x3300, 0xf3c1, 0xf281, 0x3240,
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0x3600, 0xf6c1, 0xf781, 0x3740, 0xf501, 0x35c0, 0x3480, 0xf441,
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0x3c00, 0xfcc1, 0xfd81, 0x3d40, 0xff01, 0x3fc0, 0x3e80, 0xfe41,
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0xfa01, 0x3ac0, 0x3b80, 0xfb41, 0x3900, 0xf9c1, 0xf881, 0x3840,
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0x2800, 0xe8c1, 0xe981, 0x2940, 0xeb01, 0x2bc0, 0x2a80, 0xea41,
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0xee01, 0x2ec0, 0x2f80, 0xef41, 0x2d00, 0xedc1, 0xec81, 0x2c40,
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0xe401, 0x24c0, 0x2580, 0xe541, 0x2700, 0xe7c1, 0xe681, 0x2640,
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0x2200, 0xe2c1, 0xe381, 0x2340, 0xe101, 0x21c0, 0x2080, 0xe041,
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0xa001, 0x60c0, 0x6180, 0xa141, 0x6300, 0xa3c1, 0xa281, 0x6240,
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0x6600, 0xa6c1, 0xa781, 0x6740, 0xa501, 0x65c0, 0x6480, 0xa441,
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0x6c00, 0xacc1, 0xad81, 0x6d40, 0xaf01, 0x6fc0, 0x6e80, 0xae41,
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0xaa01, 0x6ac0, 0x6b80, 0xab41, 0x6900, 0xa9c1, 0xa881, 0x6840,
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0x7800, 0xb8c1, 0xb981, 0x7940, 0xbb01, 0x7bc0, 0x7a80, 0xba41,
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0xbe01, 0x7ec0, 0x7f80, 0xbf41, 0x7d00, 0xbdc1, 0xbc81, 0x7c40,
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0xb401, 0x74c0, 0x7580, 0xb541, 0x7700, 0xb7c1, 0xb681, 0x7640,
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0x7200, 0xb2c1, 0xb381, 0x7340, 0xb101, 0x71c0, 0x7080, 0xb041,
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0x5000, 0x90c1, 0x9181, 0x5140, 0x9301, 0x53c0, 0x5280, 0x9241,
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0x9601, 0x56c0, 0x5780, 0x9741, 0x5500, 0x95c1, 0x9481, 0x5440,
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0x9c01, 0x5cc0, 0x5d80, 0x9d41, 0x5f00, 0x9fc1, 0x9e81, 0x5e40,
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0x5a00, 0x9ac1, 0x9b81, 0x5b40, 0x9901, 0x59c0, 0x5880, 0x9841,
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0x8801, 0x48c0, 0x4980, 0x8941, 0x4b00, 0x8bc1, 0x8a81, 0x4a40,
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0x4e00, 0x8ec1, 0x8f81, 0x4f40, 0x8d01, 0x4dc0, 0x4c80, 0x8c41,
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0x4400, 0x84c1, 0x8581, 0x4540, 0x8701, 0x47c0, 0x4680, 0x8641,
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0x8201, 0x42c0, 0x4380, 0x8341, 0x4100, 0x81c1, 0x8081, 0x4040
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};
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// CRC-16 is based on the polynomial x^16 + x^15 + x^2 + 1.
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// Bits are sent LSB to MSB.
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uint16_t get_crc_16(uint8_t *buf, uint16_t size)
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{
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uint16_t boof;
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uint16_t crc = 0xFFFF;
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while (size--)
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{
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boof = *buf++;
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crc = (crc >> 8) ^ crc_16_tab[ (crc ^ boof) & 0xff ];
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crc = crc & 0xFFFF;
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}
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return crc;
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}
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uint16_t get_crc_one(uint16_t crc, uint8_t buf)
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{
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uint16_t boof;
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boof = buf;
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crc = (crc >> 8) ^ crc_16_tab[ (crc ^ boof) & 0xff ];
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crc = crc & 0xFFFF;
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return crc;
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}
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uint16_t get_crc16(uint16_t *buf, uint16_t size )
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{
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uint16_t crc16,i,j;
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crc16=0xFFFF;
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for(i=0;i<size;i++)
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{
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crc16=crc16^(buf[i]&0xFF);
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for (j=0;j<8;j++)
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if(crc16&1) crc16=(crc16>>1)^Poln;
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else crc16=crc16>>1;
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crc16=crc16^((buf[i]>>8)&0xFF);
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for (j=0;j<8;j++)
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if(crc16&1) crc16=(crc16>>1)^Poln;
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||||
else crc16=crc16>>1;
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||||
}
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return crc16;
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||||
}
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||||
91
Core/Src/flash_tools.c
Normal file
91
Core/Src/flash_tools.c
Normal file
@@ -0,0 +1,91 @@
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||||
#include "flash_tools.h"
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||||
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||||
void Put_Program_to_FLESH(uint8_t * Address, uint32_t Length)
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||||
{
|
||||
FLASH_EraseInitTypeDef erase;
|
||||
uint32_t adr = FLASH_PROGRAM_BASE;
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||||
uint32_t i,Len64, Sects;
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||||
uint64_t* Adr64;
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||||
uint32_t pageError = 0x0;
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||||
HAL_StatusTypeDef flash_ok = HAL_ERROR;
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||||
|
||||
Sects = Length / 0x40000; if(Sects * 0x40000 < Length) Sects++;
|
||||
Len64 = Length/8; if(Len64*8 < Length) Len64++;
|
||||
Adr64 = (uint64_t *)Address;
|
||||
/*
|
||||
while(flash_ok != HAL_OK)
|
||||
{
|
||||
flash_ok = HAL_FLASH_Unlock();
|
||||
}
|
||||
*/
|
||||
erase.TypeErase = FLASH_TYPEERASE_SECTORS;
|
||||
erase.Banks = FLASH_BANK_2;
|
||||
erase.Sector = FLASH_SECTOR_12;
|
||||
erase.NbSectors = Sects;
|
||||
erase.VoltageRange = FLASH_VOLTAGE_RANGE_3;
|
||||
flash_ok = HAL_FLASHEx_Erase(&erase, &pageError);
|
||||
|
||||
flash_ok = HAL_ERROR;
|
||||
while(flash_ok != HAL_OK)
|
||||
{
|
||||
for(i=0; i<Len64; i++)
|
||||
{
|
||||
flash_ok = HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, adr, *Adr64);
|
||||
Adr64++;
|
||||
adr += 0x8;
|
||||
}
|
||||
}
|
||||
/*
|
||||
flash_ok = HAL_ERROR;
|
||||
while(flash_ok != HAL_OK)
|
||||
{
|
||||
flash_ok = HAL_FLASH_Lock();
|
||||
}
|
||||
*/
|
||||
}
|
||||
|
||||
|
||||
void putIntoEeprom(uint16_t lenght, uint16_t* param)
|
||||
{
|
||||
uint32_t adr = FLASH_MODBUS_BASE;
|
||||
|
||||
HAL_StatusTypeDef flash_ok = HAL_ERROR;
|
||||
|
||||
while(flash_ok != HAL_OK)
|
||||
{
|
||||
flash_ok = HAL_FLASH_Unlock();
|
||||
}
|
||||
|
||||
FLASH_EraseInitTypeDef erase;
|
||||
uint32_t pageError = 0x0;
|
||||
erase.TypeErase = FLASH_TYPEERASE_SECTORS;
|
||||
erase.Banks = FLASH_BANK_1;
|
||||
erase.Sector = FLASH_SECTOR_4;
|
||||
erase.NbSectors = 1;
|
||||
erase.VoltageRange = FLASH_VOLTAGE_RANGE_3;
|
||||
|
||||
flash_ok = HAL_FLASHEx_Erase(&erase, &pageError);
|
||||
|
||||
flash_ok = HAL_ERROR;
|
||||
while(flash_ok != HAL_OK)
|
||||
{
|
||||
for(int i=0; i<(lenght+1); i++)
|
||||
{
|
||||
flash_ok = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, adr, *param);
|
||||
param++;
|
||||
adr += 0x2;
|
||||
}
|
||||
}
|
||||
|
||||
flash_ok = HAL_ERROR;
|
||||
while(flash_ok != HAL_OK)
|
||||
{
|
||||
flash_ok = HAL_FLASH_Lock();
|
||||
}
|
||||
}
|
||||
|
||||
uint16_t watInTheFlash(uint32_t adress)
|
||||
{
|
||||
return (*(uint32_t*) adress);
|
||||
}
|
||||
|
||||
141
Core/Src/gpio.c
Normal file
141
Core/Src/gpio.c
Normal file
@@ -0,0 +1,141 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file gpio.c
|
||||
* @brief This file provides code for the configuration
|
||||
* of all used GPIO pins.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "gpio.h"
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
/*----------------------------------------------------------------------------*/
|
||||
/* Configure GPIO */
|
||||
/*----------------------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
||||
/** Configure pins as
|
||||
* Analog
|
||||
* Input
|
||||
* Output
|
||||
* EVENT_OUT
|
||||
* EXTI
|
||||
*/
|
||||
void MX_GPIO_Init(void)
|
||||
{
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
|
||||
/* GPIO Ports Clock Enable */
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOH_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(GPIOC, GPIO_PIN_0|GPIO_PIN_2|GPIO_PIN_4|GPIO_PIN_5, GPIO_PIN_RESET);
|
||||
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4, GPIO_PIN_RESET);
|
||||
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_0|GPIO_PIN_1, GPIO_PIN_RESET);
|
||||
|
||||
/*Configure GPIO pins : PE2 PE3 PE4 */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pin : PC13 */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_13;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pins : PF2 PF4 PF6 PF10 */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_4|GPIO_PIN_6|GPIO_PIN_10;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pins : PC0 PC2 PC4 PC5 */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_2|GPIO_PIN_4|GPIO_PIN_5;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pins : PA0 PA1 PA4 */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pins : PB15 PB6 PB7 PB8
|
||||
PB9 */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_15|GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8
|
||||
|GPIO_PIN_9;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pins : PD14 PD15 */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pins : PA9 PA10 PA11 PA12 */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pins : PE0 PE1 */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 2 */
|
||||
|
||||
uint8_t HAL_GPIO_CheckPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
uint32_t odr;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
/* get current Output Data Register value */
|
||||
odr = GPIOx->ODR;
|
||||
|
||||
return (odr & GPIO_Pin)!=0;
|
||||
}
|
||||
|
||||
/* USER CODE END 2 */
|
||||
332
Core/Src/main.c
Normal file
332
Core/Src/main.c
Normal file
@@ -0,0 +1,332 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file : main.c
|
||||
* @brief : Main program body
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
#include "can.h"
|
||||
#include "tim.h"
|
||||
#include "usart.h"
|
||||
#include "gpio.h"
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
#include "usart_tools.h"
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PTD */
|
||||
|
||||
/* USER CODE END PTD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PD */
|
||||
/* USER CODE END PD */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PM */
|
||||
|
||||
/* USER CODE END PM */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
|
||||
uint16_t Mode=8;
|
||||
uint8_t pissa[4]={0,0,0,0};
|
||||
|
||||
int fif0_cownt=0;
|
||||
int eror_cownt=0;
|
||||
int late_cownt=0;
|
||||
int trai_cownt=0;
|
||||
|
||||
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
void SystemClock_Config(void);
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* Private user code ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
/**
|
||||
* @brief The application entry point.
|
||||
* @retval int
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
UART_HandleTypeDef * uart;
|
||||
|
||||
uint16_t kakka[4]={0x12,0x34,0x56,0x78};
|
||||
uint16_t poppa[4][4];
|
||||
|
||||
uint16_t i,j;
|
||||
|
||||
modbus[0]=100;
|
||||
|
||||
|
||||
XPEH xpen;
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
||||
/* MCU Configuration--------------------------------------------------------*/
|
||||
|
||||
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
|
||||
HAL_Init();
|
||||
|
||||
/* USER CODE BEGIN Init */
|
||||
|
||||
/* USER CODE END Init */
|
||||
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config();
|
||||
|
||||
/* USER CODE BEGIN SysInit */
|
||||
|
||||
/* USER CODE END SysInit */
|
||||
|
||||
/* Initialize all configured peripherals */
|
||||
MX_GPIO_Init();
|
||||
MX_USART3_UART_Init();
|
||||
MX_USART2_UART_Init();
|
||||
MX_CAN2_Init();
|
||||
MX_TIM1_Init();
|
||||
/* USER CODE BEGIN 2 */
|
||||
|
||||
if(HAL_CAN_Start(&hcan2) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
HAL_TIM_Base_Start(&htim1);
|
||||
|
||||
HAL_UART_user_setup();
|
||||
|
||||
/* USER CODE END 2 */
|
||||
|
||||
/* Infinite loop */
|
||||
/* USER CODE BEGIN WHILE */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE END WHILE */
|
||||
|
||||
/* USER CODE BEGIN 3 */
|
||||
|
||||
pissa[0]++; if(pissa[0]<0)pissa[0]=0x7F; if(pissa[0]>0x7F)pissa[0]=0;
|
||||
pissa[1]--; if(pissa[1]>0x7F)pissa[1]=0x7F; if(pissa[1]>0x7F)pissa[1]=0;
|
||||
|
||||
// HAL_UART_Transmit_IT(&huart3,pissa,4);
|
||||
|
||||
|
||||
// if (__HAL_UART_GET_FLAG(&huart3, UART_FLAG_RXNE))
|
||||
|
||||
// if(HAL_UART_Receive_IT(&huart3, poppa, 1) == HAL_OK )
|
||||
|
||||
// if(HAL_UART_Receive_IT_user_handler())
|
||||
|
||||
// for(i=0;i<8;i++)
|
||||
|
||||
/*
|
||||
if(UART_get_command(&huart3) == CMD_PEEK)
|
||||
{
|
||||
peek(&huart3);
|
||||
}
|
||||
*/
|
||||
|
||||
// if(!pissa[0]) Led_0_TGL;
|
||||
|
||||
|
||||
for(i=0;i<2;i++)
|
||||
{
|
||||
if(i)uart = &huart2;
|
||||
else uart = &huart3;
|
||||
|
||||
j = UART_get_command(uart);
|
||||
|
||||
if(j)
|
||||
{
|
||||
if(i)Led_2_TGL;
|
||||
else Led_3_TGL;
|
||||
switch(j)
|
||||
{
|
||||
case CMD_INITLOAD: initload(uart); break;
|
||||
case CMD_LOAD: load(uart); break;
|
||||
case CMD_PEEK: peek(uart); break;
|
||||
case CMD_POKE: poke(uart); break;
|
||||
case CMD_EXTEND: extendbios(uart); break;
|
||||
case CMD_MODBUS_3: ReceiveCommandModbus3(uart);break;
|
||||
case CMD_MODBUS_6: ReceiveCommandModbus6(uart);break;
|
||||
|
||||
default: break;
|
||||
} } }
|
||||
|
||||
/*
|
||||
HAL_UART_Transmit_IT(&huart2,pissa,4);
|
||||
HAL_UART_Transmit_IT(&huart3,pissa,4);
|
||||
|
||||
CAN_send((uint16_t *)pissa, 0);
|
||||
|
||||
Led_0_TGL;
|
||||
RS485_out;
|
||||
|
||||
HAL_Delay(1000);
|
||||
*/
|
||||
|
||||
}
|
||||
/* USER CODE END 3 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System Clock Configuration
|
||||
* @retval None
|
||||
*/
|
||||
void SystemClock_Config(void)
|
||||
{
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
|
||||
/** Configure the main internal regulator output voltage
|
||||
*/
|
||||
__HAL_RCC_PWR_CLK_ENABLE();
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||
|
||||
/** Initializes the RCC Oscillators according to the specified parameters
|
||||
* in the RCC_OscInitTypeDef structure.
|
||||
*/
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 12;
|
||||
RCC_OscInitStruct.PLL.PLLN = 160;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 4;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/** Initializes the CPU, AHB and APB buses clocks
|
||||
*/
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||||
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
||||
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 4 */
|
||||
|
||||
void Millisecond()
|
||||
{
|
||||
static int powse=500;
|
||||
static int last=0;
|
||||
|
||||
|
||||
if( hcan2.ErrorCode & (HAL_CAN_ERROR_TX_ALST0|HAL_CAN_ERROR_TX_TERR0))
|
||||
if ((hcan2.Instance->TSR) & CAN_TSR_TME0)
|
||||
{
|
||||
late_cownt++;
|
||||
CAN_send((uint16_t *)pissa, 0);
|
||||
modbus[26] = late_cownt;
|
||||
|
||||
}
|
||||
|
||||
if(powse) powse--;
|
||||
else
|
||||
{
|
||||
powse=modbus[0];
|
||||
|
||||
if(fif0_cownt)
|
||||
{
|
||||
modbus[27] = fif0_cownt;
|
||||
|
||||
eror_cownt++;
|
||||
|
||||
if(fif0_cownt == last)
|
||||
{
|
||||
eror_cownt++;
|
||||
fif0_cownt=0;
|
||||
}
|
||||
modbus[25] = eror_cownt;
|
||||
}
|
||||
|
||||
if(!fif0_cownt)
|
||||
{
|
||||
fif0_cownt=25;
|
||||
CAN_send((uint16_t *)pissa, 0);
|
||||
trai_cownt++;
|
||||
modbus[24] = trai_cownt;
|
||||
fif0_cownt--;
|
||||
Led_0_TGL;
|
||||
|
||||
}
|
||||
|
||||
last=fif0_cownt;
|
||||
|
||||
} }
|
||||
|
||||
/* USER CODE END 4 */
|
||||
|
||||
/**
|
||||
* @brief This function is executed in case of error occurrence.
|
||||
* @retval None
|
||||
*/
|
||||
void Error_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN Error_Handler_Debug */
|
||||
/* User can add his own implementation to report the HAL error return state */
|
||||
__disable_irq();
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
/* USER CODE END Error_Handler_Debug */
|
||||
}
|
||||
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief Reports the name of the source file and the source line number
|
||||
* where the assert_param error has occurred.
|
||||
* @param file: pointer to the source file name
|
||||
* @param line: assert_param error line source number
|
||||
* @retval None
|
||||
*/
|
||||
void assert_failed(uint8_t *file, uint32_t line)
|
||||
{
|
||||
/* USER CODE BEGIN 6 */
|
||||
/* User can add his own implementation to report the file name and line number,
|
||||
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
|
||||
/* USER CODE END 6 */
|
||||
}
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
81
Core/Src/stm32f4xx_hal_msp.c
Normal file
81
Core/Src/stm32f4xx_hal_msp.c
Normal file
@@ -0,0 +1,81 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_hal_msp.c
|
||||
* @brief This file provides code for the MSP Initialization
|
||||
* and de-Initialization codes.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN TD */
|
||||
|
||||
/* USER CODE END TD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Define */
|
||||
|
||||
/* USER CODE END Define */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Macro */
|
||||
|
||||
/* USER CODE END Macro */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* External functions --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ExternalFunctions */
|
||||
|
||||
/* USER CODE END ExternalFunctions */
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
/**
|
||||
* Initializes the Global MSP.
|
||||
*/
|
||||
void HAL_MspInit(void)
|
||||
{
|
||||
/* USER CODE BEGIN MspInit 0 */
|
||||
|
||||
/* USER CODE END MspInit 0 */
|
||||
|
||||
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||||
__HAL_RCC_PWR_CLK_ENABLE();
|
||||
|
||||
/* System interrupt init*/
|
||||
|
||||
/* USER CODE BEGIN MspInit 1 */
|
||||
|
||||
/* USER CODE END MspInit 1 */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
272
Core/Src/stm32f4xx_it.c
Normal file
272
Core/Src/stm32f4xx_it.c
Normal file
@@ -0,0 +1,272 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_it.c
|
||||
* @brief Interrupt Service Routines.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
#include "stm32f4xx_it.h"
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
#include "usart_tools.h"
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN TD */
|
||||
|
||||
/* USER CODE END TD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PD */
|
||||
|
||||
/* USER CODE END PD */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PM */
|
||||
|
||||
/* USER CODE END PM */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* Private user code ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
/* External variables --------------------------------------------------------*/
|
||||
extern CAN_HandleTypeDef hcan2;
|
||||
extern UART_HandleTypeDef huart2;
|
||||
extern UART_HandleTypeDef huart3;
|
||||
/* USER CODE BEGIN EV */
|
||||
|
||||
/* USER CODE END EV */
|
||||
|
||||
/******************************************************************************/
|
||||
/* Cortex-M4 Processor Interruption and Exception Handlers */
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* @brief This function handles Non maskable interrupt.
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||||
|
||||
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
/* USER CODE END NonMaskableInt_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Hard fault interrupt.
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END HardFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
|
||||
/* USER CODE END W1_HardFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Memory management fault.
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
||||
|
||||
/* USER CODE END MemoryManagement_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
|
||||
/* USER CODE END W1_MemoryManagement_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Pre-fetch fault, memory access fault.
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN BusFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END BusFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
|
||||
/* USER CODE END W1_BusFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Undefined instruction or illegal state.
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END UsageFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
|
||||
/* USER CODE END W1_UsageFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System service call via SWI instruction.
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SVCall_IRQn 0 */
|
||||
|
||||
/* USER CODE END SVCall_IRQn 0 */
|
||||
/* USER CODE BEGIN SVCall_IRQn 1 */
|
||||
|
||||
/* USER CODE END SVCall_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Debug monitor.
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 0 */
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Pendable request for system service.
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN PendSV_IRQn 0 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 0 */
|
||||
/* USER CODE BEGIN PendSV_IRQn 1 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System tick timer.
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SysTick_IRQn 0 */
|
||||
|
||||
HAL_UART_timeout_check();
|
||||
|
||||
/* USER CODE END SysTick_IRQn 0 */
|
||||
HAL_IncTick();
|
||||
/* USER CODE BEGIN SysTick_IRQn 1 */
|
||||
|
||||
Millisecond();
|
||||
|
||||
/* USER CODE END SysTick_IRQn 1 */
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/* STM32F4xx Peripheral Interrupt Handlers */
|
||||
/* Add here the Interrupt Handlers for the used peripherals. */
|
||||
/* For the available peripheral interrupt handler names, */
|
||||
/* please refer to the startup file (startup_stm32f4xx.s). */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief This function handles USART2 global interrupt.
|
||||
*/
|
||||
void USART2_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN USART2_IRQn 0 */
|
||||
|
||||
HAL_UART_Receive_IT_user_handler(&huart2);
|
||||
|
||||
/* USER CODE END USART2_IRQn 0 */
|
||||
HAL_UART_IRQHandler(&huart2);
|
||||
/* USER CODE BEGIN USART2_IRQn 1 */
|
||||
|
||||
/* USER CODE END USART2_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles USART3 global interrupt.
|
||||
*/
|
||||
void USART3_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN USART3_IRQn 0 */
|
||||
|
||||
HAL_UART_Receive_IT_user_handler(&huart3);
|
||||
|
||||
/* USER CODE END USART3_IRQn 0 */
|
||||
HAL_UART_IRQHandler(&huart3);
|
||||
/* USER CODE BEGIN USART3_IRQn 1 */
|
||||
|
||||
/* USER CODE END USART3_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles CAN2 TX interrupts.
|
||||
*/
|
||||
void CAN2_TX_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN CAN2_TX_IRQn 0 */
|
||||
|
||||
/* USER CODE END CAN2_TX_IRQn 0 */
|
||||
HAL_CAN_IRQHandler(&hcan2);
|
||||
/* USER CODE BEGIN CAN2_TX_IRQn 1 */
|
||||
|
||||
/* USER CODE END CAN2_TX_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles CAN2 RX0 interrupts.
|
||||
*/
|
||||
void CAN2_RX0_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN CAN2_RX0_IRQn 0 */
|
||||
|
||||
/* USER CODE END CAN2_RX0_IRQn 0 */
|
||||
HAL_CAN_IRQHandler(&hcan2);
|
||||
/* USER CODE BEGIN CAN2_RX0_IRQn 1 */
|
||||
|
||||
/* USER CODE END CAN2_RX0_IRQn 1 */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
747
Core/Src/system_stm32f4xx.c
Normal file
747
Core/Src/system_stm32f4xx.c
Normal file
@@ -0,0 +1,747 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32f4xx.c
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
|
||||
*
|
||||
* This file provides two functions and one global variable to be called from
|
||||
* user application:
|
||||
* - SystemInit(): This function is called at startup just after reset and
|
||||
* before branch to main program. This call is made inside
|
||||
* the "startup_stm32f4xx.s" file.
|
||||
*
|
||||
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||
* by the user application to setup the SysTick
|
||||
* timer or configure other parameters.
|
||||
*
|
||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||
* be called whenever the core clock is changed
|
||||
* during program execution.
|
||||
*
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32f4xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Private_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
#include "stm32f4xx.h"
|
||||
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
/************************* Miscellaneous Configuration ************************/
|
||||
/*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory */
|
||||
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
|
||||
|| defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|
||||
|| defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
|
||||
/* #define DATA_IN_ExtSRAM */
|
||||
#endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||\
|
||||
STM32F412Zx || STM32F412Vx */
|
||||
|
||||
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|
||||
|| defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
|
||||
/* #define DATA_IN_ExtSDRAM */
|
||||
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
|
||||
STM32F479xx */
|
||||
|
||||
/* Note: Following vector table addresses must be defined in line with linker
|
||||
configuration. */
|
||||
/*!< Uncomment the following line if you need to relocate the vector table
|
||||
anywhere in Flash or Sram, else the vector table is kept at the automatic
|
||||
remap of boot address selected */
|
||||
/* #define USER_VECT_TAB_ADDRESS */
|
||||
|
||||
#if defined(USER_VECT_TAB_ADDRESS)
|
||||
/*!< Uncomment the following line if you need to relocate your vector Table
|
||||
in Sram else user remap will be done in Flash. */
|
||||
/* #define VECT_TAB_SRAM */
|
||||
#if defined(VECT_TAB_SRAM)
|
||||
#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#else
|
||||
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#endif /* VECT_TAB_SRAM */
|
||||
#endif /* USER_VECT_TAB_ADDRESS */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
/* This variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
uint32_t SystemCoreClock = 16000000;
|
||||
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
|
||||
static void SystemInit_ExtMemCtl(void);
|
||||
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system
|
||||
* Initialize the FPU setting, vector table location and External memory
|
||||
* configuration.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit(void)
|
||||
{
|
||||
/* FPU settings ------------------------------------------------------------*/
|
||||
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
|
||||
#endif
|
||||
|
||||
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
|
||||
SystemInit_ExtMemCtl();
|
||||
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
|
||||
|
||||
/* Configure the Vector Table location -------------------------------------*/
|
||||
#if defined(USER_VECT_TAB_ADDRESS)
|
||||
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
||||
#endif /* USER_VECT_TAB_ADDRESS */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||
* be used by the user application to setup the SysTick timer or configure
|
||||
* other parameters.
|
||||
*
|
||||
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||
* based on this variable will be incorrect.
|
||||
*
|
||||
* @note - The system frequency computed by this function is not the real
|
||||
* frequency in the chip. It is calculated based on the predefined
|
||||
* constant and the selected clock source:
|
||||
*
|
||||
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
|
||||
*
|
||||
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
*
|
||||
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
|
||||
*
|
||||
* (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
|
||||
* 16 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
*
|
||||
* (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
|
||||
* depends on the application requirements), user has to ensure that HSE_VALUE
|
||||
* is same as the real frequency of the crystal used. Otherwise, this function
|
||||
* may have wrong result.
|
||||
*
|
||||
* - The result of this function could be not correct when using fractional
|
||||
* value for HSE crystal.
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate(void)
|
||||
{
|
||||
uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
|
||||
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
||||
|
||||
switch (tmp)
|
||||
{
|
||||
case 0x00: /* HSI used as system clock source */
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
case 0x04: /* HSE used as system clock source */
|
||||
SystemCoreClock = HSE_VALUE;
|
||||
break;
|
||||
case 0x08: /* PLL used as system clock source */
|
||||
|
||||
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
|
||||
SYSCLK = PLL_VCO / PLL_P
|
||||
*/
|
||||
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
|
||||
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
|
||||
|
||||
if (pllsource != 0)
|
||||
{
|
||||
/* HSE used as PLL clock source */
|
||||
pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* HSI used as PLL clock source */
|
||||
pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
|
||||
}
|
||||
|
||||
pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
|
||||
SystemCoreClock = pllvco/pllp;
|
||||
break;
|
||||
default:
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
}
|
||||
/* Compute HCLK frequency --------------------------------------------------*/
|
||||
/* Get HCLK prescaler */
|
||||
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
|
||||
/* HCLK frequency */
|
||||
SystemCoreClock >>= tmp;
|
||||
}
|
||||
|
||||
#if defined (DATA_IN_ExtSRAM) && defined (DATA_IN_ExtSDRAM)
|
||||
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|
||||
|| defined(STM32F469xx) || defined(STM32F479xx)
|
||||
/**
|
||||
* @brief Setup the external memory controller.
|
||||
* Called in startup_stm32f4xx.s before jump to main.
|
||||
* This function configures the external memories (SRAM/SDRAM)
|
||||
* This SRAM/SDRAM will be used as program data memory (including heap and stack).
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit_ExtMemCtl(void)
|
||||
{
|
||||
__IO uint32_t tmp = 0x00;
|
||||
|
||||
register uint32_t tmpreg = 0, timeout = 0xFFFF;
|
||||
register __IO uint32_t index;
|
||||
|
||||
/* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface clock */
|
||||
RCC->AHB1ENR |= 0x000001F8;
|
||||
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
|
||||
|
||||
/* Connect PDx pins to FMC Alternate function */
|
||||
GPIOD->AFR[0] = 0x00CCC0CC;
|
||||
GPIOD->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PDx pins in Alternate function mode */
|
||||
GPIOD->MODER = 0xAAAA0A8A;
|
||||
/* Configure PDx pins speed to 100 MHz */
|
||||
GPIOD->OSPEEDR = 0xFFFF0FCF;
|
||||
/* Configure PDx pins Output type to push-pull */
|
||||
GPIOD->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PDx pins */
|
||||
GPIOD->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PEx pins to FMC Alternate function */
|
||||
GPIOE->AFR[0] = 0xC00CC0CC;
|
||||
GPIOE->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PEx pins in Alternate function mode */
|
||||
GPIOE->MODER = 0xAAAA828A;
|
||||
/* Configure PEx pins speed to 100 MHz */
|
||||
GPIOE->OSPEEDR = 0xFFFFC3CF;
|
||||
/* Configure PEx pins Output type to push-pull */
|
||||
GPIOE->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PEx pins */
|
||||
GPIOE->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PFx pins to FMC Alternate function */
|
||||
GPIOF->AFR[0] = 0xCCCCCCCC;
|
||||
GPIOF->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PFx pins in Alternate function mode */
|
||||
GPIOF->MODER = 0xAA800AAA;
|
||||
/* Configure PFx pins speed to 50 MHz */
|
||||
GPIOF->OSPEEDR = 0xAA800AAA;
|
||||
/* Configure PFx pins Output type to push-pull */
|
||||
GPIOF->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PFx pins */
|
||||
GPIOF->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PGx pins to FMC Alternate function */
|
||||
GPIOG->AFR[0] = 0xCCCCCCCC;
|
||||
GPIOG->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PGx pins in Alternate function mode */
|
||||
GPIOG->MODER = 0xAAAAAAAA;
|
||||
/* Configure PGx pins speed to 50 MHz */
|
||||
GPIOG->OSPEEDR = 0xAAAAAAAA;
|
||||
/* Configure PGx pins Output type to push-pull */
|
||||
GPIOG->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PGx pins */
|
||||
GPIOG->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PHx pins to FMC Alternate function */
|
||||
GPIOH->AFR[0] = 0x00C0CC00;
|
||||
GPIOH->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PHx pins in Alternate function mode */
|
||||
GPIOH->MODER = 0xAAAA08A0;
|
||||
/* Configure PHx pins speed to 50 MHz */
|
||||
GPIOH->OSPEEDR = 0xAAAA08A0;
|
||||
/* Configure PHx pins Output type to push-pull */
|
||||
GPIOH->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PHx pins */
|
||||
GPIOH->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PIx pins to FMC Alternate function */
|
||||
GPIOI->AFR[0] = 0xCCCCCCCC;
|
||||
GPIOI->AFR[1] = 0x00000CC0;
|
||||
/* Configure PIx pins in Alternate function mode */
|
||||
GPIOI->MODER = 0x0028AAAA;
|
||||
/* Configure PIx pins speed to 50 MHz */
|
||||
GPIOI->OSPEEDR = 0x0028AAAA;
|
||||
/* Configure PIx pins Output type to push-pull */
|
||||
GPIOI->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PIx pins */
|
||||
GPIOI->PUPDR = 0x00000000;
|
||||
|
||||
/*-- FMC Configuration -------------------------------------------------------*/
|
||||
/* Enable the FMC interface clock */
|
||||
RCC->AHB3ENR |= 0x00000001;
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
|
||||
|
||||
FMC_Bank5_6->SDCR[0] = 0x000019E4;
|
||||
FMC_Bank5_6->SDTR[0] = 0x01115351;
|
||||
|
||||
/* SDRAM initialization sequence */
|
||||
/* Clock enable command */
|
||||
FMC_Bank5_6->SDCMR = 0x00000011;
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
while((tmpreg != 0) && (timeout-- > 0))
|
||||
{
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
}
|
||||
|
||||
/* Delay */
|
||||
for (index = 0; index<1000; index++);
|
||||
|
||||
/* PALL command */
|
||||
FMC_Bank5_6->SDCMR = 0x00000012;
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
timeout = 0xFFFF;
|
||||
while((tmpreg != 0) && (timeout-- > 0))
|
||||
{
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
}
|
||||
|
||||
/* Auto refresh command */
|
||||
FMC_Bank5_6->SDCMR = 0x00000073;
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
timeout = 0xFFFF;
|
||||
while((tmpreg != 0) && (timeout-- > 0))
|
||||
{
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
}
|
||||
|
||||
/* MRD register program */
|
||||
FMC_Bank5_6->SDCMR = 0x00046014;
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
timeout = 0xFFFF;
|
||||
while((tmpreg != 0) && (timeout-- > 0))
|
||||
{
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
}
|
||||
|
||||
/* Set refresh count */
|
||||
tmpreg = FMC_Bank5_6->SDRTR;
|
||||
FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
|
||||
|
||||
/* Disable write protection */
|
||||
tmpreg = FMC_Bank5_6->SDCR[0];
|
||||
FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
|
||||
|
||||
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
|
||||
/* Configure and enable Bank1_SRAM2 */
|
||||
FMC_Bank1->BTCR[2] = 0x00001011;
|
||||
FMC_Bank1->BTCR[3] = 0x00000201;
|
||||
FMC_Bank1E->BWTR[2] = 0x0fffffff;
|
||||
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
|
||||
#if defined(STM32F469xx) || defined(STM32F479xx)
|
||||
/* Configure and enable Bank1_SRAM2 */
|
||||
FMC_Bank1->BTCR[2] = 0x00001091;
|
||||
FMC_Bank1->BTCR[3] = 0x00110212;
|
||||
FMC_Bank1E->BWTR[2] = 0x0fffffff;
|
||||
#endif /* STM32F469xx || STM32F479xx */
|
||||
|
||||
(void)(tmp);
|
||||
}
|
||||
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
|
||||
#elif defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
|
||||
/**
|
||||
* @brief Setup the external memory controller.
|
||||
* Called in startup_stm32f4xx.s before jump to main.
|
||||
* This function configures the external memories (SRAM/SDRAM)
|
||||
* This SRAM/SDRAM will be used as program data memory (including heap and stack).
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit_ExtMemCtl(void)
|
||||
{
|
||||
__IO uint32_t tmp = 0x00;
|
||||
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|
||||
|| defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
|
||||
#if defined (DATA_IN_ExtSDRAM)
|
||||
register uint32_t tmpreg = 0, timeout = 0xFFFF;
|
||||
register __IO uint32_t index;
|
||||
|
||||
#if defined(STM32F446xx)
|
||||
/* Enable GPIOA, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG interface
|
||||
clock */
|
||||
RCC->AHB1ENR |= 0x0000007D;
|
||||
#else
|
||||
/* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface
|
||||
clock */
|
||||
RCC->AHB1ENR |= 0x000001F8;
|
||||
#endif /* STM32F446xx */
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
|
||||
|
||||
#if defined(STM32F446xx)
|
||||
/* Connect PAx pins to FMC Alternate function */
|
||||
GPIOA->AFR[0] |= 0xC0000000;
|
||||
GPIOA->AFR[1] |= 0x00000000;
|
||||
/* Configure PDx pins in Alternate function mode */
|
||||
GPIOA->MODER |= 0x00008000;
|
||||
/* Configure PDx pins speed to 50 MHz */
|
||||
GPIOA->OSPEEDR |= 0x00008000;
|
||||
/* Configure PDx pins Output type to push-pull */
|
||||
GPIOA->OTYPER |= 0x00000000;
|
||||
/* No pull-up, pull-down for PDx pins */
|
||||
GPIOA->PUPDR |= 0x00000000;
|
||||
|
||||
/* Connect PCx pins to FMC Alternate function */
|
||||
GPIOC->AFR[0] |= 0x00CC0000;
|
||||
GPIOC->AFR[1] |= 0x00000000;
|
||||
/* Configure PDx pins in Alternate function mode */
|
||||
GPIOC->MODER |= 0x00000A00;
|
||||
/* Configure PDx pins speed to 50 MHz */
|
||||
GPIOC->OSPEEDR |= 0x00000A00;
|
||||
/* Configure PDx pins Output type to push-pull */
|
||||
GPIOC->OTYPER |= 0x00000000;
|
||||
/* No pull-up, pull-down for PDx pins */
|
||||
GPIOC->PUPDR |= 0x00000000;
|
||||
#endif /* STM32F446xx */
|
||||
|
||||
/* Connect PDx pins to FMC Alternate function */
|
||||
GPIOD->AFR[0] = 0x000000CC;
|
||||
GPIOD->AFR[1] = 0xCC000CCC;
|
||||
/* Configure PDx pins in Alternate function mode */
|
||||
GPIOD->MODER = 0xA02A000A;
|
||||
/* Configure PDx pins speed to 50 MHz */
|
||||
GPIOD->OSPEEDR = 0xA02A000A;
|
||||
/* Configure PDx pins Output type to push-pull */
|
||||
GPIOD->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PDx pins */
|
||||
GPIOD->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PEx pins to FMC Alternate function */
|
||||
GPIOE->AFR[0] = 0xC00000CC;
|
||||
GPIOE->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PEx pins in Alternate function mode */
|
||||
GPIOE->MODER = 0xAAAA800A;
|
||||
/* Configure PEx pins speed to 50 MHz */
|
||||
GPIOE->OSPEEDR = 0xAAAA800A;
|
||||
/* Configure PEx pins Output type to push-pull */
|
||||
GPIOE->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PEx pins */
|
||||
GPIOE->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PFx pins to FMC Alternate function */
|
||||
GPIOF->AFR[0] = 0xCCCCCCCC;
|
||||
GPIOF->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PFx pins in Alternate function mode */
|
||||
GPIOF->MODER = 0xAA800AAA;
|
||||
/* Configure PFx pins speed to 50 MHz */
|
||||
GPIOF->OSPEEDR = 0xAA800AAA;
|
||||
/* Configure PFx pins Output type to push-pull */
|
||||
GPIOF->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PFx pins */
|
||||
GPIOF->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PGx pins to FMC Alternate function */
|
||||
GPIOG->AFR[0] = 0xCCCCCCCC;
|
||||
GPIOG->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PGx pins in Alternate function mode */
|
||||
GPIOG->MODER = 0xAAAAAAAA;
|
||||
/* Configure PGx pins speed to 50 MHz */
|
||||
GPIOG->OSPEEDR = 0xAAAAAAAA;
|
||||
/* Configure PGx pins Output type to push-pull */
|
||||
GPIOG->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PGx pins */
|
||||
GPIOG->PUPDR = 0x00000000;
|
||||
|
||||
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|
||||
|| defined(STM32F469xx) || defined(STM32F479xx)
|
||||
/* Connect PHx pins to FMC Alternate function */
|
||||
GPIOH->AFR[0] = 0x00C0CC00;
|
||||
GPIOH->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PHx pins in Alternate function mode */
|
||||
GPIOH->MODER = 0xAAAA08A0;
|
||||
/* Configure PHx pins speed to 50 MHz */
|
||||
GPIOH->OSPEEDR = 0xAAAA08A0;
|
||||
/* Configure PHx pins Output type to push-pull */
|
||||
GPIOH->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PHx pins */
|
||||
GPIOH->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PIx pins to FMC Alternate function */
|
||||
GPIOI->AFR[0] = 0xCCCCCCCC;
|
||||
GPIOI->AFR[1] = 0x00000CC0;
|
||||
/* Configure PIx pins in Alternate function mode */
|
||||
GPIOI->MODER = 0x0028AAAA;
|
||||
/* Configure PIx pins speed to 50 MHz */
|
||||
GPIOI->OSPEEDR = 0x0028AAAA;
|
||||
/* Configure PIx pins Output type to push-pull */
|
||||
GPIOI->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PIx pins */
|
||||
GPIOI->PUPDR = 0x00000000;
|
||||
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
|
||||
|
||||
/*-- FMC Configuration -------------------------------------------------------*/
|
||||
/* Enable the FMC interface clock */
|
||||
RCC->AHB3ENR |= 0x00000001;
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
|
||||
|
||||
/* Configure and enable SDRAM bank1 */
|
||||
#if defined(STM32F446xx)
|
||||
FMC_Bank5_6->SDCR[0] = 0x00001954;
|
||||
#else
|
||||
FMC_Bank5_6->SDCR[0] = 0x000019E4;
|
||||
#endif /* STM32F446xx */
|
||||
FMC_Bank5_6->SDTR[0] = 0x01115351;
|
||||
|
||||
/* SDRAM initialization sequence */
|
||||
/* Clock enable command */
|
||||
FMC_Bank5_6->SDCMR = 0x00000011;
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
while((tmpreg != 0) && (timeout-- > 0))
|
||||
{
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
}
|
||||
|
||||
/* Delay */
|
||||
for (index = 0; index<1000; index++);
|
||||
|
||||
/* PALL command */
|
||||
FMC_Bank5_6->SDCMR = 0x00000012;
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
timeout = 0xFFFF;
|
||||
while((tmpreg != 0) && (timeout-- > 0))
|
||||
{
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
}
|
||||
|
||||
/* Auto refresh command */
|
||||
#if defined(STM32F446xx)
|
||||
FMC_Bank5_6->SDCMR = 0x000000F3;
|
||||
#else
|
||||
FMC_Bank5_6->SDCMR = 0x00000073;
|
||||
#endif /* STM32F446xx */
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
timeout = 0xFFFF;
|
||||
while((tmpreg != 0) && (timeout-- > 0))
|
||||
{
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
}
|
||||
|
||||
/* MRD register program */
|
||||
#if defined(STM32F446xx)
|
||||
FMC_Bank5_6->SDCMR = 0x00044014;
|
||||
#else
|
||||
FMC_Bank5_6->SDCMR = 0x00046014;
|
||||
#endif /* STM32F446xx */
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
timeout = 0xFFFF;
|
||||
while((tmpreg != 0) && (timeout-- > 0))
|
||||
{
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
}
|
||||
|
||||
/* Set refresh count */
|
||||
tmpreg = FMC_Bank5_6->SDRTR;
|
||||
#if defined(STM32F446xx)
|
||||
FMC_Bank5_6->SDRTR = (tmpreg | (0x0000050C<<1));
|
||||
#else
|
||||
FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
|
||||
#endif /* STM32F446xx */
|
||||
|
||||
/* Disable write protection */
|
||||
tmpreg = FMC_Bank5_6->SDCR[0];
|
||||
FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
|
||||
#endif /* DATA_IN_ExtSDRAM */
|
||||
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
|
||||
|
||||
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
|
||||
|| defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|
||||
|| defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
|
||||
|
||||
#if defined(DATA_IN_ExtSRAM)
|
||||
/*-- GPIOs Configuration -----------------------------------------------------*/
|
||||
/* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
|
||||
RCC->AHB1ENR |= 0x00000078;
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);
|
||||
|
||||
/* Connect PDx pins to FMC Alternate function */
|
||||
GPIOD->AFR[0] = 0x00CCC0CC;
|
||||
GPIOD->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PDx pins in Alternate function mode */
|
||||
GPIOD->MODER = 0xAAAA0A8A;
|
||||
/* Configure PDx pins speed to 100 MHz */
|
||||
GPIOD->OSPEEDR = 0xFFFF0FCF;
|
||||
/* Configure PDx pins Output type to push-pull */
|
||||
GPIOD->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PDx pins */
|
||||
GPIOD->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PEx pins to FMC Alternate function */
|
||||
GPIOE->AFR[0] = 0xC00CC0CC;
|
||||
GPIOE->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PEx pins in Alternate function mode */
|
||||
GPIOE->MODER = 0xAAAA828A;
|
||||
/* Configure PEx pins speed to 100 MHz */
|
||||
GPIOE->OSPEEDR = 0xFFFFC3CF;
|
||||
/* Configure PEx pins Output type to push-pull */
|
||||
GPIOE->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PEx pins */
|
||||
GPIOE->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PFx pins to FMC Alternate function */
|
||||
GPIOF->AFR[0] = 0x00CCCCCC;
|
||||
GPIOF->AFR[1] = 0xCCCC0000;
|
||||
/* Configure PFx pins in Alternate function mode */
|
||||
GPIOF->MODER = 0xAA000AAA;
|
||||
/* Configure PFx pins speed to 100 MHz */
|
||||
GPIOF->OSPEEDR = 0xFF000FFF;
|
||||
/* Configure PFx pins Output type to push-pull */
|
||||
GPIOF->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PFx pins */
|
||||
GPIOF->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PGx pins to FMC Alternate function */
|
||||
GPIOG->AFR[0] = 0x00CCCCCC;
|
||||
GPIOG->AFR[1] = 0x000000C0;
|
||||
/* Configure PGx pins in Alternate function mode */
|
||||
GPIOG->MODER = 0x00085AAA;
|
||||
/* Configure PGx pins speed to 100 MHz */
|
||||
GPIOG->OSPEEDR = 0x000CAFFF;
|
||||
/* Configure PGx pins Output type to push-pull */
|
||||
GPIOG->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PGx pins */
|
||||
GPIOG->PUPDR = 0x00000000;
|
||||
|
||||
/*-- FMC/FSMC Configuration --------------------------------------------------*/
|
||||
/* Enable the FMC/FSMC interface clock */
|
||||
RCC->AHB3ENR |= 0x00000001;
|
||||
|
||||
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
|
||||
/* Configure and enable Bank1_SRAM2 */
|
||||
FMC_Bank1->BTCR[2] = 0x00001011;
|
||||
FMC_Bank1->BTCR[3] = 0x00000201;
|
||||
FMC_Bank1E->BWTR[2] = 0x0fffffff;
|
||||
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
|
||||
#if defined(STM32F469xx) || defined(STM32F479xx)
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
|
||||
/* Configure and enable Bank1_SRAM2 */
|
||||
FMC_Bank1->BTCR[2] = 0x00001091;
|
||||
FMC_Bank1->BTCR[3] = 0x00110212;
|
||||
FMC_Bank1E->BWTR[2] = 0x0fffffff;
|
||||
#endif /* STM32F469xx || STM32F479xx */
|
||||
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)\
|
||||
|| defined(STM32F412Zx) || defined(STM32F412Vx)
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);
|
||||
/* Configure and enable Bank1_SRAM2 */
|
||||
FSMC_Bank1->BTCR[2] = 0x00001011;
|
||||
FSMC_Bank1->BTCR[3] = 0x00000201;
|
||||
FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF;
|
||||
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx */
|
||||
|
||||
#endif /* DATA_IN_ExtSRAM */
|
||||
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
|
||||
STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx */
|
||||
(void)(tmp);
|
||||
}
|
||||
#endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
117
Core/Src/tim.c
Normal file
117
Core/Src/tim.c
Normal file
@@ -0,0 +1,117 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file tim.c
|
||||
* @brief This file provides code for the configuration
|
||||
* of the TIM instances.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "tim.h"
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
TIM_HandleTypeDef htim1;
|
||||
|
||||
/* TIM1 init function */
|
||||
void MX_TIM1_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN TIM1_Init 0 */
|
||||
|
||||
/* USER CODE END TIM1_Init 0 */
|
||||
|
||||
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
|
||||
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||||
|
||||
/* USER CODE BEGIN TIM1_Init 1 */
|
||||
|
||||
/* USER CODE END TIM1_Init 1 */
|
||||
htim1.Instance = TIM1;
|
||||
htim1.Init.Prescaler = 160;
|
||||
htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
htim1.Init.Period = 65535;
|
||||
htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||
htim1.Init.RepetitionCounter = 0;
|
||||
htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||
if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
|
||||
if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
||||
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||||
if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN TIM1_Init 2 */
|
||||
|
||||
/* USER CODE END TIM1_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
|
||||
{
|
||||
|
||||
if(tim_baseHandle->Instance==TIM1)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_MspInit 0 */
|
||||
|
||||
/* USER CODE END TIM1_MspInit 0 */
|
||||
/* TIM1 clock enable */
|
||||
__HAL_RCC_TIM1_CLK_ENABLE();
|
||||
/* USER CODE BEGIN TIM1_MspInit 1 */
|
||||
|
||||
/* USER CODE END TIM1_MspInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
|
||||
{
|
||||
|
||||
if(tim_baseHandle->Instance==TIM1)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END TIM1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM1_CLK_DISABLE();
|
||||
/* USER CODE BEGIN TIM1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END TIM1_MspDeInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
void HAL_Delay(uint32_t Delay)
|
||||
{
|
||||
uint32_t tickstart = HAL_GetTick();
|
||||
while((HAL_GetTick() - tickstart) < Delay);
|
||||
}
|
||||
|
||||
void usDelay(uint16_t useconds)
|
||||
{
|
||||
__HAL_TIM_SET_COUNTER(&htim1, 0);
|
||||
while(__HAL_TIM_GET_COUNTER(&htim1) < useconds);
|
||||
}
|
||||
|
||||
/* USER CODE END 1 */
|
||||
194
Core/Src/usart.c
Normal file
194
Core/Src/usart.c
Normal file
@@ -0,0 +1,194 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file usart.c
|
||||
* @brief This file provides code for the configuration
|
||||
* of the USART instances.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "usart.h"
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
UART_HandleTypeDef huart2;
|
||||
UART_HandleTypeDef huart3;
|
||||
|
||||
/* USART2 init function */
|
||||
|
||||
void MX_USART2_UART_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN USART2_Init 0 */
|
||||
|
||||
/* USER CODE END USART2_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN USART2_Init 1 */
|
||||
|
||||
/* USER CODE END USART2_Init 1 */
|
||||
huart2.Instance = USART2;
|
||||
huart2.Init.BaudRate = 115200;
|
||||
huart2.Init.WordLength = UART_WORDLENGTH_8B;
|
||||
huart2.Init.StopBits = UART_STOPBITS_1;
|
||||
huart2.Init.Parity = UART_PARITY_NONE;
|
||||
huart2.Init.Mode = UART_MODE_TX_RX;
|
||||
huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||||
huart2.Init.OverSampling = UART_OVERSAMPLING_16;
|
||||
if (HAL_UART_Init(&huart2) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN USART2_Init 2 */
|
||||
|
||||
/* USER CODE END USART2_Init 2 */
|
||||
|
||||
}
|
||||
/* USART3 init function */
|
||||
|
||||
void MX_USART3_UART_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN USART3_Init 0 */
|
||||
|
||||
/* USER CODE END USART3_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN USART3_Init 1 */
|
||||
|
||||
/* USER CODE END USART3_Init 1 */
|
||||
huart3.Instance = USART3;
|
||||
huart3.Init.BaudRate = 115200;
|
||||
huart3.Init.WordLength = UART_WORDLENGTH_8B;
|
||||
huart3.Init.StopBits = UART_STOPBITS_1;
|
||||
huart3.Init.Parity = UART_PARITY_NONE;
|
||||
huart3.Init.Mode = UART_MODE_TX_RX;
|
||||
huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||||
huart3.Init.OverSampling = UART_OVERSAMPLING_16;
|
||||
if (HAL_UART_Init(&huart3) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN USART3_Init 2 */
|
||||
/* USER CODE END USART3_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
|
||||
{
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(uartHandle->Instance==USART2)
|
||||
{
|
||||
/* USER CODE BEGIN USART2_MspInit 0 */
|
||||
|
||||
/* USER CODE END USART2_MspInit 0 */
|
||||
/* USART2 clock enable */
|
||||
__HAL_RCC_USART2_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**USART2 GPIO Configuration
|
||||
PA2 ------> USART2_TX
|
||||
PA3 ------> USART2_RX
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* USART2 interrupt Init */
|
||||
HAL_NVIC_SetPriority(USART2_IRQn, 0, 0);
|
||||
HAL_NVIC_EnableIRQ(USART2_IRQn);
|
||||
/* USER CODE BEGIN USART2_MspInit 1 */
|
||||
|
||||
/* USER CODE END USART2_MspInit 1 */
|
||||
}
|
||||
else if(uartHandle->Instance==USART3)
|
||||
{
|
||||
/* USER CODE BEGIN USART3_MspInit 0 */
|
||||
|
||||
/* USER CODE END USART3_MspInit 0 */
|
||||
/* USART3 clock enable */
|
||||
__HAL_RCC_USART3_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
/**USART3 GPIO Configuration
|
||||
PD8 ------> USART3_TX
|
||||
PD9 ------> USART3_RX
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
|
||||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||
|
||||
/* USART3 interrupt Init */
|
||||
HAL_NVIC_SetPriority(USART3_IRQn, 0, 0);
|
||||
HAL_NVIC_EnableIRQ(USART3_IRQn);
|
||||
/* USER CODE BEGIN USART3_MspInit 1 */
|
||||
|
||||
/* USER CODE END USART3_MspInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
|
||||
{
|
||||
|
||||
if(uartHandle->Instance==USART2)
|
||||
{
|
||||
/* USER CODE BEGIN USART2_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END USART2_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_USART2_CLK_DISABLE();
|
||||
|
||||
/**USART2 GPIO Configuration
|
||||
PA2 ------> USART2_TX
|
||||
PA3 ------> USART2_RX
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3);
|
||||
|
||||
/* USART2 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(USART2_IRQn);
|
||||
/* USER CODE BEGIN USART2_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END USART2_MspDeInit 1 */
|
||||
}
|
||||
else if(uartHandle->Instance==USART3)
|
||||
{
|
||||
/* USER CODE BEGIN USART3_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END USART3_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_USART3_CLK_DISABLE();
|
||||
|
||||
/**USART3 GPIO Configuration
|
||||
PD8 ------> USART3_TX
|
||||
PD9 ------> USART3_RX
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_8|GPIO_PIN_9);
|
||||
|
||||
/* USART3 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(USART3_IRQn);
|
||||
/* USER CODE BEGIN USART3_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END USART3_MspDeInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
/* USER CODE END 1 */
|
||||
415
Core/Src/usart_tools.c
Normal file
415
Core/Src/usart_tools.c
Normal file
@@ -0,0 +1,415 @@
|
||||
#include "main.h"
|
||||
#include "usart.h"
|
||||
#include "tim.h"
|
||||
#include "usart_tools.h"
|
||||
#include "struc.h"
|
||||
#include "crc16.h"
|
||||
//#include "stdint.h"
|
||||
#include "flash_tools.h"
|
||||
|
||||
uint16_t modbus[Modbus_LEN+1];
|
||||
|
||||
uint8_t UART_Buffer[All_Buffer_Len*2];
|
||||
|
||||
int RS_Len[70]={0};
|
||||
|
||||
// The memory area into which the information arrays will be loaded.
|
||||
// There's only one; it is assumed that arrays will not be loaded on both ports at the same time.
|
||||
uint8_t * Array_Load_Address = (uint8_t *)0x10000000;
|
||||
|
||||
uint8_t Array_Load[0x8000];
|
||||
|
||||
uint8_t UART_get_command(UART_HandleTypeDef *huart)
|
||||
{
|
||||
int com=0;
|
||||
|
||||
if(huart->RxState == HAL_UART_STATE_BUSY)
|
||||
{
|
||||
com = Buffer_in[1];
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
}
|
||||
return com;
|
||||
}
|
||||
|
||||
void HAL_UART_Receive_IT_user_handler(UART_HandleTypeDef *huart)
|
||||
{
|
||||
uint8_t gotten_byte;
|
||||
static uint16_t C_crc, R_rcrc;
|
||||
|
||||
if(!__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE)) return;
|
||||
|
||||
gotten_byte = huart->Instance->DR;
|
||||
|
||||
huart->Timeout_counter = 0;
|
||||
|
||||
if (huart->RxState == HAL_UART_STATE_BUSY) return;
|
||||
|
||||
if (huart->RxState == HAL_UART_STATE_READY)
|
||||
{
|
||||
huart->RxState = HAL_UART_STATE_BUSY_RX;
|
||||
huart->RxEventType = Package_type; // Not array again, just a package
|
||||
huart->RxXferCount=0;
|
||||
C_crc = 0xFFFF;
|
||||
}
|
||||
|
||||
// Not array yet, just a package
|
||||
if(huart->RxEventType == Package_type) Buffer_in[huart->RxXferCount] = gotten_byte;
|
||||
|
||||
// Now it's time to receive an array
|
||||
if(huart->RxEventType == Array_type) Array_Load_Address[huart->RxXferCount-2] = gotten_byte;
|
||||
|
||||
if( (huart->RxXferCount > 2) && (huart->RxXferCount >= huart->RxXferSize-2) )
|
||||
{
|
||||
if(huart->RxXferCount == huart->RxXferSize-2) LOBYTE(R_rcrc) = gotten_byte;
|
||||
if(huart->RxXferCount == huart->RxXferSize-1 ) HIBYTE(R_rcrc) = gotten_byte;
|
||||
}
|
||||
else C_crc = get_crc_one(C_crc, gotten_byte);
|
||||
|
||||
huart->RxXferCount++;
|
||||
|
||||
if(huart->RxXferCount == 1)
|
||||
{
|
||||
if(gotten_byte != Mode)
|
||||
if(gotten_byte != UNIVERSAL_ADDR)
|
||||
// We don't know such an address
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
if(huart->RxXferCount == 2)
|
||||
{
|
||||
if(gotten_byte == CMD_LOAD)
|
||||
{
|
||||
huart->RxEventType = Array_type; // Now it's time to receive an array
|
||||
}
|
||||
else
|
||||
{
|
||||
huart->RxXferSize = RS_Len[gotten_byte];
|
||||
|
||||
if(huart->RxXferSize == 0)
|
||||
// We don't know such a command
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
} }
|
||||
|
||||
if(huart->RxXferCount >= huart->RxXferSize)
|
||||
{
|
||||
if(R_rcrc == C_crc) huart->RxState = HAL_UART_STATE_BUSY; // Received successfully
|
||||
else huart->RxState = HAL_UART_STATE_READY; // Received improperly
|
||||
} }
|
||||
|
||||
void HAL_UART_timeout_check()
|
||||
{
|
||||
#ifdef TIMEOUT_ON
|
||||
|
||||
if(huart2.RxState == HAL_UART_STATE_BUSY_RX)
|
||||
if(huart2.Timeout_counter++ >= TIMEOUT_EDGE)
|
||||
{
|
||||
huart2.RxState = HAL_UART_STATE_READY; // enough waiting!
|
||||
huart2.Timeout_counter= 0;
|
||||
}
|
||||
|
||||
if(huart3.RxState == HAL_UART_STATE_BUSY_RX)
|
||||
if(huart3.Timeout_counter++ >= TIMEOUT_EDGE)
|
||||
{
|
||||
huart3.RxState = HAL_UART_STATE_READY; // enough waiting!
|
||||
huart3.Timeout_counter= 0;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void Setup_cmd_length()
|
||||
{
|
||||
RS_Len[CMD_LOAD] = 12; // is
|
||||
RS_Len[CMD_UPLOAD] = 12; // is
|
||||
RS_Len[CMD_RUN] = 8;
|
||||
RS_Len[CMD_XFLASH] = 9;
|
||||
RS_Len[CMD_TFLASH] = 16; // is
|
||||
RS_Len[CMD_PEEK] = 8; // is
|
||||
RS_Len[CMD_POKE] = 12; // is
|
||||
RS_Len[CMD_INITLOAD] = 12; // is
|
||||
RS_Len[CMD_INIT] = 5; // is
|
||||
RS_Len[CMD_VECTOR] = sizeof(CMD_TO_TMS)-2;
|
||||
RS_Len[CMD_STD] = sizeof(CMD_TO_TMS)-1;
|
||||
RS_Len[CMD_IMPULSE] = 8;
|
||||
RS_Len[CMD_MODBUS_3] = 8; // is
|
||||
RS_Len[CMD_MODBUS_6] = 8; // is
|
||||
RS_Len[CMD_MODBUS_16] = 13;
|
||||
RS_Len[CMD_MODBUS_15] = 27;
|
||||
RS_Len[CMD_EXTEND] = 18; // is
|
||||
}
|
||||
|
||||
void HAL_UART_user_setup()
|
||||
{
|
||||
Setup_cmd_length();
|
||||
|
||||
huart2.pRxBuffPtr = UART_Buffer;
|
||||
huart3.pRxBuffPtr = UART_Buffer + All_Buffer_Len;
|
||||
|
||||
// These flags are not used for their intended purpose.
|
||||
// But only to tell if we have to switch the direction of this port.
|
||||
huart2.ReceptionType = RS485; // RS485, would be switched
|
||||
huart3.ReceptionType = RS232; // RS232, no need to switch
|
||||
|
||||
// These flags are not used for their intended purpose.
|
||||
// But only to tell if we are receiving an array of data or just a package
|
||||
huart2.RxEventType = Package_type; // Not array yet, just a package
|
||||
huart3.RxEventType = Package_type; // Not array yet, just a package
|
||||
|
||||
huart2.RxState = HAL_UART_STATE_READY;
|
||||
huart3.RxState = HAL_UART_STATE_READY;
|
||||
|
||||
huart2.Timeout_counter= 0;
|
||||
huart3.Timeout_counter= 0;
|
||||
|
||||
RS485_in;
|
||||
|
||||
/* Enable the UART Data Register not empty Interrupt */
|
||||
__HAL_UART_ENABLE_IT(&huart2, UART_IT_RXNE);
|
||||
|
||||
/* Enable the UART Data Register not empty Interrupt */
|
||||
__HAL_UART_ENABLE_IT(&huart3, UART_IT_RXNE);
|
||||
|
||||
}
|
||||
|
||||
static inline void switch_RS485_out(UART_HandleTypeDef *huart)
|
||||
{
|
||||
if(huart->ReceptionType == RS485)
|
||||
{
|
||||
RS485_out;
|
||||
usDelay(100);
|
||||
} }
|
||||
|
||||
static inline void CMD_answer(UART_HandleTypeDef *huart, uint8_t CMD)
|
||||
{
|
||||
uint16_t crc;
|
||||
|
||||
Buffer_out[0] = Buffer_in[0];
|
||||
Buffer_out[1] = CMD;
|
||||
|
||||
crc = get_crc_16(Buffer_out, 2);
|
||||
|
||||
Buffer_out[2] = LOBYTE(crc);
|
||||
Buffer_out[3] = HIBYTE(crc);
|
||||
|
||||
switch_RS485_out(huart);
|
||||
|
||||
HAL_UART_Transmit_IT(huart,Buffer_out,4);
|
||||
}
|
||||
|
||||
|
||||
void peek(UART_HandleTypeDef *huart)
|
||||
{
|
||||
uint32_t Address, Data;
|
||||
uint16_t crc;
|
||||
|
||||
BYTE0(Address) = Buffer_in[2];
|
||||
BYTE1(Address) = Buffer_in[3];
|
||||
BYTE2(Address) = Buffer_in[4];
|
||||
BYTE3(Address) = Buffer_in[5];
|
||||
/*
|
||||
if(Address>=0x10000000)
|
||||
{
|
||||
Address &= 0xFFFFFFF;
|
||||
// Data = watInTheFlash(FLASH_EEPROM_BASE + Address);
|
||||
}
|
||||
else*/ Data = (*(volatile int *)(Address));
|
||||
|
||||
Buffer_out[0] = Buffer_in[0];
|
||||
Buffer_out[1] = CMD_PEEK;
|
||||
|
||||
Buffer_out[2] = BYTE0(Data);
|
||||
Buffer_out[3] = BYTE1(Data);
|
||||
Buffer_out[4] = BYTE2(Data);
|
||||
Buffer_out[5] = BYTE3(Data);
|
||||
|
||||
crc = get_crc_16(Buffer_out, 6);
|
||||
|
||||
Buffer_out[6] = LOBYTE(crc);
|
||||
Buffer_out[7] = HIBYTE(crc);
|
||||
|
||||
switch_RS485_out(huart);
|
||||
|
||||
HAL_UART_Transmit_IT(huart,Buffer_out,8);
|
||||
}
|
||||
|
||||
void poke(UART_HandleTypeDef *huart)
|
||||
{
|
||||
uint32_t Address;
|
||||
uint16_t Data;
|
||||
|
||||
BYTE0(Address) = Buffer_in[2];
|
||||
BYTE1(Address) = Buffer_in[3];
|
||||
BYTE2(Address) = Buffer_in[4];
|
||||
BYTE3(Address) = Buffer_in[5];
|
||||
|
||||
HIBYTE(Data) = Buffer_in[7];
|
||||
LOBYTE(Data) = Buffer_in[6];
|
||||
|
||||
/*
|
||||
if(Address>=0x2000000)
|
||||
{
|
||||
Address&=0xFFFFFF;
|
||||
I2CA_WriteData(Address,Data);
|
||||
}
|
||||
else
|
||||
if(Address>=0x1000000)
|
||||
{
|
||||
Address&=0xFFFFFF;
|
||||
Seeprom_write(Address,(unsigned int *)&Data,2);
|
||||
}
|
||||
else
|
||||
{
|
||||
Address&=0xFFFFFF;
|
||||
write_memory(Address,Data);
|
||||
}
|
||||
*/
|
||||
*(volatile uint16_t *)Address = Data;
|
||||
|
||||
CMD_answer(huart,CMD_POKE);
|
||||
}
|
||||
|
||||
void initload(UART_HandleTypeDef *huart)
|
||||
{
|
||||
uint32_t Address, Length;
|
||||
|
||||
BYTE0(Address) = Buffer_in[2];
|
||||
BYTE1(Address) = Buffer_in[3];
|
||||
BYTE2(Address) = Buffer_in[4];
|
||||
BYTE3(Address) = Buffer_in[5];
|
||||
|
||||
BYTE0(Length) = Buffer_in[6];
|
||||
BYTE1(Length) = Buffer_in[7];
|
||||
BYTE2(Length) = Buffer_in[8];
|
||||
BYTE3(Length) = Buffer_in[9];
|
||||
|
||||
Array_Load_Address = Array_Load;//(uint8_t *)Address;
|
||||
|
||||
huart->RxXferSize = Length + 4; // +2 header, +2 crc
|
||||
|
||||
CMD_answer(huart,CMD_INITLOAD);
|
||||
}
|
||||
|
||||
void load(UART_HandleTypeDef *huart)
|
||||
{
|
||||
CMD_answer(huart, CMD_LOAD);
|
||||
}
|
||||
|
||||
void extendbios(UART_HandleTypeDef *huart)
|
||||
{
|
||||
uint32_t Address1,Address2,Length;
|
||||
uint8_t Code;
|
||||
|
||||
BYTE0(Address1) = Buffer_in[2];
|
||||
BYTE1(Address1) = Buffer_in[3];
|
||||
BYTE2(Address1) = Buffer_in[4];
|
||||
BYTE3(Address1) = Buffer_in[5];
|
||||
|
||||
BYTE0(Address1) = Buffer_in[6];
|
||||
BYTE1(Address1) = Buffer_in[7];
|
||||
BYTE2(Address1) = Buffer_in[8];
|
||||
BYTE3(Address1) = Buffer_in[9];
|
||||
|
||||
BYTE0(Length) = Buffer_in[10];
|
||||
BYTE1(Length) = Buffer_in[11];
|
||||
BYTE2(Length) = Buffer_in[12];
|
||||
BYTE3(Length) = Buffer_in[13];
|
||||
|
||||
Code = Buffer_in[14];
|
||||
|
||||
switch ( Code )
|
||||
{
|
||||
// ????????? EPROM ?? RAM
|
||||
case 4: //Seeprom_write(Address1,(unsigned int*)Address2,Length);
|
||||
|
||||
Put_Program_to_FLESH(Array_Load, Length);
|
||||
|
||||
|
||||
|
||||
break;
|
||||
// ?????? ?? EPROM ? RAM
|
||||
// case 5: Seeprom_read(Address1,(unsigned int*)Address2,Length);
|
||||
// break;
|
||||
|
||||
}
|
||||
|
||||
CMD_answer(huart,CMD_EXTEND);
|
||||
}
|
||||
|
||||
/***************************************************************/
|
||||
/* Ïåðåäà÷à äàííûõ ïî ïðîòîêîëó ModBus - êîìàíäà 3
|
||||
×òåíèå à÷ååê äàííûõ */
|
||||
/***************************************************************/
|
||||
void ReceiveCommandModbus3(UART_HandleTypeDef *huart)
|
||||
{
|
||||
uint16_t Address, Length, crc;
|
||||
uint8_t i;
|
||||
|
||||
// ïîëó÷èëè íà÷àëüíûé àäðåñ ÷òåíèà
|
||||
HIBYTE(Address) = Buffer_in[2];
|
||||
LOBYTE(Address) = Buffer_in[3];
|
||||
|
||||
// ïîëó÷èëè êîëè÷åñòâî ñëîâ äàííûõ
|
||||
HIBYTE(Length) = Buffer_in[4];
|
||||
LOBYTE(Length) = Buffer_in[5];
|
||||
|
||||
/////////////////////////////////////////////////
|
||||
// Îòñûëêà
|
||||
/* Ïîñ÷èòàëè êîíòðîëüíóþ ñóììó ïåðåä ñàìîé ïîñûëêîé */
|
||||
|
||||
Buffer_out[0] = Buffer_in[0];
|
||||
Buffer_out[1] = Buffer_in[1];
|
||||
Buffer_out[2] = Length*2;
|
||||
|
||||
for (i=0;i<Length;i++)
|
||||
{
|
||||
Buffer_out[3+i*2 ] = HIBYTE(modbus[Address+i]);
|
||||
Buffer_out[3+i*2+1] = LOBYTE(modbus[Address+i]);
|
||||
}
|
||||
|
||||
crc = get_crc_16(Buffer_out, Length*2+3);
|
||||
|
||||
Buffer_out[Length*2+3] = LOBYTE(crc);
|
||||
Buffer_out[Length*2+4] = HIBYTE(crc);
|
||||
|
||||
switch_RS485_out(huart);
|
||||
|
||||
HAL_UART_Transmit_IT(huart,Buffer_out,Length*2+5);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
void ReceiveCommandModbus6(UART_HandleTypeDef *huart)
|
||||
{
|
||||
uint16_t Address, Data;
|
||||
uint8_t i;
|
||||
|
||||
/////////////////////////////////////////////////
|
||||
// Îòñûëêà
|
||||
/* Îòïðàâëàåì íàçàä òî æå ñàìîå */
|
||||
|
||||
for (i=0;i<8;i++)
|
||||
Buffer_out[i] = Buffer_in[i];
|
||||
|
||||
// ïîëó÷èëè íà÷àëüíûé àäðåñ çàïèñè
|
||||
HIBYTE(Address) = Buffer_in[2];
|
||||
LOBYTE(Address) = Buffer_in[3];
|
||||
|
||||
// ïîëó÷èëè ñëîâî äàííûõ
|
||||
HIBYTE(Data) = Buffer_in[4];
|
||||
LOBYTE(Data) = Buffer_in[5];
|
||||
|
||||
if(Address < Modbus_LEN)
|
||||
modbus[Address] = Data;
|
||||
|
||||
switch_RS485_out(huart);
|
||||
|
||||
HAL_UART_Transmit_IT(huart,Buffer_out,8);
|
||||
}
|
||||
|
||||
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
|
||||
{
|
||||
if(huart->ReceptionType == RS485)
|
||||
if(RS485_dir) RS485_in;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user