ICE_22220_4/Source/Internal/ADC.c

171 lines
4.8 KiB
C

#include "DSP2833x_Device.h" // DSP281x Headerfile Include File
#include "DSP2833x_Examples.h" // DSP281x Examples Include File
#include "DSP2833x_SWPrioritizedIsrLevels.h"
#include "ADC.h"
#include "log_to_mem.h"
#include "RS485.h"
#include "filter_bat2.h"
#include "measure.h"
#include "message.h"
#include "package.h"
#include "peripher.h"
#define SIZE_ADC_BUF 1000
Uint16 ADC_table[24];
Uint16 raw_table[24];
Uint16 ConversionCount;
int MAY=0;
// Prototype statements for functions found within this file.
interrupt void adc_isr(void);
void setup_adc()
{
long CLKdiv,HSPCLKdiv,Rate;
#if (CPU_FRQ_150MHZ) // Default - 150 MHz SYSCLKOUT
#define ADC_MODCLK 0x3 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3) = 25.0 MHz
#endif
#if (CPU_FRQ_100MHZ)
#define ADC_MODCLK 0x2 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*2) = 25.0 MHz
#endif
// Specific clock setting for this example:
// EALLOW;
// SysCtrlRegs.HISPCP.all = ADC_MODCLK; // HSPCLK = SYSCLKOUT/ADC_MODCLK
// EDIS;
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
EALLOW; // This is needed to write to EALLOW protected register
PieVectTable.ADCINT = &adc_isr;
EDIS; // This is needed to disable write to EALLOW protected registers
InitAdc(); // For this example, init the ADC
// Enable ADCINT in PIE
PieCtrlRegs.PIEIER1.bit.INTx6 = 1;
IER |= M_INT1; // Enable CPU Interrupt 1
// EINT; // Enable Global interrupt INTM
// ERTM; // Enable Global realtime interrupt DBGM
// Configure ADC
if(Desk==dsk_COMM)
{
AdcRegs.ADCMAXCONV.bit.MAX_CONV1 = 0x000F; // Setup 2 conv's on SEQ1
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0B; // Äàëüøå òåìïåðàòóðû
AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x0A;
AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 0x09;
AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 0x08;
AdcRegs.ADCCHSELSEQ2.bit.CONV04 = 0x00;
AdcRegs.ADCCHSELSEQ2.bit.CONV05 = 0x01;
AdcRegs.ADCCHSELSEQ2.bit.CONV06 = 0x04;
AdcRegs.ADCCHSELSEQ2.bit.CONV07 = 0x03;
AdcRegs.ADCCHSELSEQ3.bit.CONV08 = 0x05;
AdcRegs.ADCCHSELSEQ3.bit.CONV09 = 0x02;
AdcRegs.ADCCHSELSEQ3.bit.CONV10 = 0x06;
AdcRegs.ADCCHSELSEQ3.bit.CONV11 = 0x07;
AdcRegs.ADCCHSELSEQ4.bit.CONV12 = 0x0F; // Òîêè-íàïðàæåíèà
AdcRegs.ADCCHSELSEQ4.bit.CONV13 = 0x0D;
AdcRegs.ADCCHSELSEQ4.bit.CONV14 = 0x0E;
AdcRegs.ADCCHSELSEQ4.bit.CONV15 = 0x0C;
}
AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;// Enable SOCA from ePWM to start SEQ1
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; // Enable SEQ1 interrupt (every EOS)
AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1; // Clear INT SEQ1 bit
AdcRegs.ADCTRL1.bit.SEQ_CASC = 1; // 1 Cascaded mode
//AdcRegs.ADCTRL1.bit.ACQ_PS=15;
//AdcRegs.ADCTRL1.bit.CPS=1;
AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1; // Reset SEQ1
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Acknowledge interrupt to PIE
// Assumes ePWM1 clock is already enabled in InitSysCtrl();
EPwm1Regs.ETSEL.bit.SOCAEN = 1; // Enable SOC on A group
EPwm1Regs.ETSEL.bit.SOCASEL = 4; // Select SOC from from CPMA on upcount
EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event
EPwm1Regs.CMPA.half.CMPA = 0x0080; // Set compare A value
EPwm1Regs.TBCTL.bit.HSPCLKDIV = CLKMULT;
EPwm1Regs.TBCTL.bit.CLKDIV=2;
CLKdiv = 1<<EPwm1Regs.TBCTL.bit.CLKDIV;
if(EPwm1Regs.TBCTL.bit.HSPCLKDIV) HSPCLKdiv = 2*EPwm1Regs.TBCTL.bit.HSPCLKDIV;
else HSPCLKdiv = 1;
Rate = (SYSCLKOUT/(HSPCLKdiv*CLKdiv))/ ADC_FREQ;//ïîêà íå ïîíàòíî ïî÷åìó óìíîæèòü íà äâà
EPwm1Regs.TBPRD = Rate;//0x4000; // Set period for ePWM1
EPwm1Regs.TBCTL.bit.CTRMODE = 0; // count up and start
}
interrupt void adc_isr(void)
{
float Numb;
int i;
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER1.all;
IER |= M_INT1;
IER &= MINT1; // Set "global" priority
PieCtrlRegs.PIEIER1.all &= MG16; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
if(!Read_Log)
if(MAY)
{
if(Desk==dsk_COMM)
{
Test_mem_limit(16);
for(i=0;i<16;i++)
if(sens_type[i])
{
Numb = *((&AdcRegs.ADCRESULT0)+i) >>4;
if(!no_write)
if(!cNoLog) Log_to_mem(Numb);
if(sens_type[i] != VOLTAGE)
Numb = filterbat(&filter[i],Numb);
ADC_table[i]=(int)Numb;
if(sens_type[i]==VOLTAGE) Current_count(i);
else Temper_count(i);
}
else
{
sens_data[i]=0;
modbus[i]=0;
}
sig.all = chk.all;
chk.all = 0;
} }
// Reinitialize for next ADC sequence
AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1; // Reset SEQ1
AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1; // Clear INT SEQ1 bit
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Acknowledge interrupt to PIE
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER1.all = TempPIEIER;
return;
}