/**************************************************************************
Данный файл необходим для объявления структур для отображения их в watch
В оригинальном stm32f407xx они объявлены дефайнами, которые не видны в watch. 
Поэтому дополнительно объявлены данные структуры. 
Называются также, как CMSISные, только в нижнем регистре

**************************************************************************/
#include "stm32f407xx_matlab.h"


TIM_TypeDef*			tim2				= TIM2;
TIM_TypeDef*			tim3				= TIM3;
TIM_TypeDef*			tim4				= TIM4;
TIM_TypeDef*			tim5				= TIM5;
TIM_TypeDef*			tim6				= TIM6;
TIM_TypeDef*			tim7				= TIM7;
TIM_TypeDef*			tim12				= TIM12;
TIM_TypeDef*			tim13				= TIM13;
TIM_TypeDef*			tim14				= TIM14;
RTC_TypeDef*			rtc					= RTC;
WWDG_TypeDef*			wwdg				= WWDG;
IWDG_TypeDef*			iwdg				= IWDG;
SPI_TypeDef*			i2s2ext				= I2S2ext;
SPI_TypeDef*			spi2				= SPI2;
SPI_TypeDef*			spi3				= SPI3;
SPI_TypeDef*			i2s3ext				= I2S3ext;
USART_TypeDef*			usart2				= USART2;
USART_TypeDef*			usart3				= USART3;
USART_TypeDef*			uart4				= UART4;
USART_TypeDef*			uart5				= UART5;
I2C_TypeDef*			i2c1				= I2C1;
I2C_TypeDef*			i2c2				= I2C2;
I2C_TypeDef*			i2c3				= I2C3;
CAN_TypeDef*			can1				= CAN1;
CAN_TypeDef*			can2				= CAN2;
PWR_TypeDef*			pwr					= PWR;
DAC_TypeDef*			dac1				= DAC1;
DAC_TypeDef*			dac					= DAC; /* Kept for legacy purpose = DAC                  */
TIM_TypeDef*			tim1				= TIM1;
TIM_TypeDef*			tim8				= TIM8;
USART_TypeDef*			usart1				= USART1;
USART_TypeDef*			usart6				= USART6;
ADC_TypeDef*			adc1				= ADC1;
ADC_TypeDef*			adc2				= ADC2;
ADC_TypeDef*			adc3				= ADC3;
ADC_Common_TypeDef*		adc123_common		= ADC123_COMMON; /* Legacy define */
ADC_Common_TypeDef*		adc					= ADC123_COMMON;
SDIO_TypeDef*			sdio				= SDIO;
SPI_TypeDef*			spi1				= SPI1;
SYSCFG_TypeDef*			syscfg				= SYSCFG;
EXTI_TypeDef*			exti				= EXTI;
TIM_TypeDef*			tim9				= TIM9;
TIM_TypeDef*			tim10				= TIM10;
TIM_TypeDef*			tim11				= TIM11;
GPIO_TypeDef*			gpioa				= GPIOA;
GPIO_TypeDef*			gpiob				= GPIOB;
GPIO_TypeDef*			gpioc				= GPIOC;
GPIO_TypeDef*			gpiod				= GPIOD;
GPIO_TypeDef*			gpioe				= GPIOE;
GPIO_TypeDef*			gpiof				= GPIOF;
GPIO_TypeDef*			gpiog				= GPIOG;
GPIO_TypeDef*			gpioh				= GPIOH;
GPIO_TypeDef*			gpioi				= GPIOI;
CRC_TypeDef*			crc					= CRC;
RCC_TypeDef*			rcc					= RCC;
FLASH_TypeDef*			flash_r				= FLASH;
DMA_TypeDef*			dma1				= DMA1;
DMA_Stream_TypeDef*		dma1_stream0		= DMA1_Stream0;
DMA_Stream_TypeDef*		dma1_stream1		= DMA1_Stream1;
DMA_Stream_TypeDef*		dma1_stream2		= DMA1_Stream2;
DMA_Stream_TypeDef*		dma1_stream3		= DMA1_Stream3;
DMA_Stream_TypeDef*		dma1_stream4		= DMA1_Stream4;
DMA_Stream_TypeDef*		dma1_stream5		= DMA1_Stream5;
DMA_Stream_TypeDef*		dma1_stream6		= DMA1_Stream6;
DMA_Stream_TypeDef*		dma1_stream7		= DMA1_Stream7;
DMA_TypeDef*			dma2				= DMA2;
DMA_Stream_TypeDef*		dma2_stream0		= DMA2_Stream0;
DMA_Stream_TypeDef*		dma2_stream1		= DMA2_Stream1;
DMA_Stream_TypeDef*		dma2_stream2		= DMA2_Stream2;
DMA_Stream_TypeDef*		dma2_stream3		= DMA2_Stream3;
DMA_Stream_TypeDef*		dma2_stream4		= DMA2_Stream4;
DMA_Stream_TypeDef*		dma2_stream5		= DMA2_Stream5;
DMA_Stream_TypeDef*		dma2_stream6		= DMA2_Stream6;
DMA_Stream_TypeDef*		dma2_stream7		= DMA2_Stream7;
ETH_TypeDef*			eth					= ETH;
DCMI_TypeDef*			dcmi				= DCMI;
RNG_TypeDef*			rng					= RNG;
FSMC_Bank1_TypeDef*		fsmc_bank1_r		= FSMC_Bank1;
FSMC_Bank1E_TypeDef*	fsmc_bank1e_r		= FSMC_Bank1E;
FSMC_Bank2_3_TypeDef*	fsmc_bank2_3_r		= FSMC_Bank2_3;
FSMC_Bank4_TypeDef*		fsmc_bank4_r		= FSMC_Bank4;
DBGMCU_TypeDef*			dbgmcu				= DBGMCU;
USB_OTG_GlobalTypeDef*	usb_otg_fs_periph	= USB_OTG_FS;
USB_OTG_GlobalTypeDef*	usb_otg_hs_periph	= USB_OTG_HS;