#ifndef _EDRK_MAIN_H__
#define _EDRK_MAIN_H__
#include "IQmathLib.h"
#include "rmp_cntl_v1.h"
#include "rmp_cntl_v2.h"
#include "alg_pll.h"
#define TIME_PAUSE_MODBUS_CAN_BS2BS 500 //900 //500
#define TIME_PAUSE_MODBUS_CAN_ZADATCHIK_VPU 250 //100//100
#define TIME_PAUSE_MODBUS_CAN_UKSS_SETUP 2500 //
#define TIME_PAUSE_MODBUS_CAN_MPU 1100 //500
#define TIME_PAUSE_MODBUS_CAN_TERMINALS 2000 //1000
#define TIME_PAUSE_MODBUS_CAN_OSCIL 5000
//#define TIME_PAUSE_MODBUS_CAN_BS2BS 100//20//500
//#define TIME_PAUSE_MODBUS_CAN_ZADATCHIK_VPU 250//20//100
//#define TIME_PAUSE_MODBUS_CAN_UKSS_SETUP 5000
//#define TIME_PAUSE_MODBUS_CAN_MPU 500//20//500
//#define TIME_PAUSE_MODBUS_CAN_TERMINALS 1000
//#define TIME_PAUSE_MODBUS_CAN_OSCIL 5000
//#define TIME_PAUSE_MODBUS_CAN_TMS2TMS_VIPR 75 //500
//#define FROM_OPENDOOR project.cds_in[1].read.pbus.data_in.bit.in15
// IN0
#define SENSOR_ROTOR_1 project.cds_in[0].read.pbus.data_in.bit.in0 // ������ ������� 1
#define SENSOR_ROTOR_2 project.cds_in[0].read.pbus.data_in.bit.in1 // ������ ������� 2
#define SENSOR_ROTOR_3 project.cds_in[0].read.pbus.data_in.bit.in2 // ������ ������� 3
#define FROM_ING_LOCAL_REMOUTE project.cds_in[0].read.pbus.data_in.bit.in3 // LOCAL=0/REMOUTE=1 �� ����� ��������
#define FROM_ING_LOCAL_KVITIR project.cds_in[0].read.pbus.data_in.bit.in4 // ������������ � ������
#define FROM_BSU_RAZBOR_SHEMA project.cds_in[0].read.pbus.data_in.bit.in5 // ��������� �����=0
#define FROM_BSU_SBOR_SHEMA project.cds_in[0].read.pbus.data_in.bit.in6 // ������� �����=0
#define FROM_ING_RAZBOR_SHEMA project.cds_in[0].read.pbus.data_in.bit.in5 // ��������� �����=0
#define FROM_ING_SBOR_SHEMA project.cds_in[0].read.pbus.data_in.bit.in6 // ������� �����=0
#define FROM_ING_OBOROTS_MINUS project.cds_in[0].read.pbus.data_in.bit.in7 // ������� ������
#define FROM_ING_OBOROTS_PLUS project.cds_in[0].read.pbus.data_in.bit.in8 // ������� ������
#define FROM_BSU_ZADA_DISPLAY project.cds_in[0].read.pbus.data_in.bit.in9 // ��������=1/�����=0 ���
#define FROM_BSU_SVU project.cds_in[0].read.pbus.data_in.bit.in10 // ��������� ���=0/�������=1 ���
#define FROM_SHEMA_QTV_ON_OFF ((project.cds_in[0].read.pbus.data_in.bit.in12))
// �� ������ ����� ������� ���, �� ������� ������ ����.
#define FROM_SVU_BLOCK_QTV project.cds_in[0].read.pbus.data_in.bit.in11 // ���������� ��� QTV �� ���
#define FROM_ING_ANOTHER_RASCEPITEL 1//project.cds_in[0].read.pbus.data_in.bit.in12 // ��������� ����������� ������� ��
#define FROM_SHEMA_UMP_ON_OFF project.cds_in[0].read.pbus.data_in.bit.in13 // ��������� �������� ��� �������������� ��������������
#define FROM_SHEMA_READY_UMP project.cds_in[0].read.pbus.data_in.bit.in14 // ���������� ��� �������������� ��������������
#define FROM_ING_RASCEPITEL_ON_OFF ((project.cds_in[0].read.pbus.data_in.bit.in15)) // ��������� ����������� ���
/////////////////
#define FROM_ING_OP_PIT_NORMA project.cds_in[1].read.pbus.data_in.bit.in0 // ��������� �������������� � ����� 0-�����
#define FROM_ING_OHLAD_UTE4KA_WATER !(project.cds_in[1].read.pbus.data_in.bit.in1) // ������ ���� // 1 - �����, 0 -������
#define FROM_ING_SOST_ZAMKA project.cds_in[1].read.pbus.data_in.bit.in2 // ��������� �����
#define FROM_ING_ZARYAD_ON project.cds_in[1].read.pbus.data_in.bit.in3 // ��������� ���� ���������� ������ 1-��� ������
#define FROM_ING_VENTIL_ON project.cds_in[1].read.pbus.data_in.bit.in4 // ����������� �������� 0-��������
#define FROM_ING_NASOS_ON project.cds_in[1].read.pbus.data_in.bit.in5 // ��������� ����� ������� 0 - �������
#define FROM_ING_NASOS_NORMA project.cds_in[1].read.pbus.data_in.bit.in6 // ������ � ����� 0? ����� ��������� ���� 0.
#define FROM_ING_ZAZEML_OFF project.cds_in[1].read.pbus.data_in.bit.in7 // ��������� ���������� 1-���������.
#define FROM_ING_NAGREV_ON project.cds_in[1].read.pbus.data_in.bit.in8 // ��������� ������������ 1-���������
#define FROM_ING_BLOCK_IZOL_NORMA project.cds_in[1].read.pbus.data_in.bit.in9 // �������������� �� �������� ���� ��������. 1-������.
#define FROM_ING_VIPR_PREDOHR_NORMA project.cds_in[1].read.pbus.data_in.bit.in10 // �������������� ����������� � ����� 0 - �����.
#define FROM_ING_BLOCK_IZOL_AVARIA project.cds_in[1].read.pbus.data_in.bit.in11 // ������ �� �������� ������.�������� 0-������
#define FROM_ALL_KNOPKA_AVARIA project.cds_in[1].read.pbus.data_in.bit.in12 // ������ ������ 1 - ������ ����.
#define FROM_ING_ZAZEML_ON project.cds_in[1].read.pbus.data_in.bit.in13 // ��������� ���������� 0-���������.
#define FROM_ING_ANOTHER_MASTER_PCH project.cds_in[1].read.pbus.data_in.bit.in14 // ������ �� � ������ ������.
#define FROM_ING_UPC_24V_NORMA project.cds_in[1].read.pbus.data_in.bit.in15 // 24 UPC � ����� 0-�����.
//#define FROM_REZERV_12 project.cds_in[1].read.pbus.data_in.bit.in12 // ������
#define TO_ING_ZARYAD_ON project.cds_out[0].write.sbus.data_out.bit.dout0 // �������� �����
#define TO_ING_NAGREV_OFF project.cds_out[0].write.sbus.data_out.bit.dout1 // ��������� �������
#define TO_ING_NASOS_1_ON project.cds_out[0].write.sbus.data_out.bit.dout2 // ����� 1 ��������
#define TO_ING_NASOS_2_ON project.cds_out[0].write.sbus.data_out.bit.dout3 // ����� 2 ��������
#define TO_ING_BLOCK_KEY_OFF project.cds_out[0].write.sbus.data_out.bit.dout4 // ���������� ����� ���������, ���������� �������� ������
#define TO_ING_RELOAD_UPC project.cds_out[0].write.sbus.data_out.bit.dout5 //5- ������������ ���������� �������
#define TO_SHEMA_ENABLE_QTV project.cds_out[0].write.sbus.data_out.bit.dout6 // 6 - ���������� ��������� QTV
#define TO_ING_LAMPA_ZARYAD project.cds_out[0].write.sbus.data_out.bit.dout7 //7- ������� �������� 80 ����. ��������� ��������
#define MODE_QTV_UPRAVLENIE 2 // 1 - �������, 2 - ���������
#if (MODE_QTV_UPRAVLENIE==1)
//////////////////////////////////////////////////////////
// QTV ��������� �������
#define TO_SHEMA_QTV_ON_OFF project.cds_out[0].write.sbus.data_out.bit.dout8 // 8 - ��������� QTV
#endif
#if (MODE_QTV_UPRAVLENIE==2)
// QTV ��������� ���������
#define TO_SHEMA_QTV_ON project.cds_out[0].write.sbus.data_out.bit.dout8 // 8 - ��������� QTV
#define TO_SHEMA_QTV_OFF project.cds_out[0].write.sbus.data_out.bit.dout9 // 9 - ���������� QTV
///////////////////////////////////////////////////////////
#endif
#define TO_ING_SMALL_LAMPA_AVARIA project.cds_out[0].write.sbus.data_out.bit.dout10 // ������ � ��� � �����
#define TO_SECOND_PCH_ALARM project.cds_out[0].write.sbus.data_out.bit.dout11 // 11 - ������ � ����. ��
#define TO_SECOND_PCH_MASTER project.cds_out[0].write.sbus.data_out.bit.dout12 // 12 - ����� - ������ � ����. ��
#define TO_SHEMA_UMP_ON_OFF project.cds_out[0].write.sbus.data_out.bit.dout13 // 13 - �������� ��� �������������� ��������������
#define TO_ING_RASCEPITEL_OFF project.cds_out[0].write.sbus.data_out.bit.dout14// 14- ��������� ������� ���
#define TO_ING_RASCEPITEL_ON project.cds_out[0].write.sbus.data_out.bit.dout15// 15 - �������� ������� ���
enum
{
ALG_MODE_UF_CONST = 1,
ALG_MODE_SCALAR_OBOROTS,
ALG_MODE_SCALAR_POWER,
ALG_MODE_FOC_OBOROTS,
ALG_MODE_FOC_POWER
};
enum
{
STAGE_SBOR_STATUS_NO_STATUS = 0,
STAGE_SBOR_STATUS_FIRST,
STAGE_SBOR_STATUS_PUMP,
STAGE_SBOR_STATUS_ZARYAD,
STAGE_SBOR_STATUS_UMP_ON,
STAGE_SBOR_STATUS_QTV,
STAGE_SBOR_STATUS_UMP_OFF,
STAGE_SBOR_STATUS_RASCEPITEL_1,
STAGE_SBOR_STATUS_RASCEPITEL_2,
STAGE_SBOR_STATUS_RASCEPITEL_3,
STAGE_SBOR_STATUS_RASCEPITEL_4,
STAGE_SBOR_STATUS_WAIT_READY_ANOTHER,
STAGE_SBOR_STATUS_FINISH
};
/*
#define TO_ING_KVITIR project.cds_out[0].write.sbus.data_out.bit.dout3
#define TO_QTV_OFF project.cds_out[0].write.sbus.data_out.bit.dout4
#define TO_ING_VOZB_PODKLU4EN project.cds_out[0].write.sbus.data_out.bit.dout5
#define TO_ING_VOZB_NEPODKLU4EN project.cds_out[0].write.sbus.data_out.bit.dout6
#define TO_ING_VOZB_READY project.cds_out[0].write.sbus.data_out.bit.dout7
#define TO_ING_QTV_VLU4EN project.cds_out[0].write.sbus.data_out.bit.dout9
#define TO_ING_QTV_READY project.cds_out[0].write.sbus.data_out.bit.dout10
#define TO_ING_START_GED project.cds_out[0].write.sbus.data_out.bit.dout11
#define TO_ING_SIL_BLOK_OTKL project.cds_out[0].write.sbus.data_out.bit.dout12
#define TO_ING_SIL_BLOK_VKL project.cds_out[0].write.sbus.data_out.bit.dout13
#define TO_ING_BLOK_VOZB_WORK project.cds_out[0].write.sbus.data_out.bit.dout15
#define TO_ING_OSTANOV_GED project.cds_out[0].write.sbus.data_out.bit.dout14
#define FROM_ING_SIL_BLOK_VKL project.cds_in[1].read.pbus.data_in.bit.in0
#define FROM_ING_SIL_BLOK_OTKL project.cds_in[1].read.pbus.data_in.bit.in1
#define FROM_ING_GED_NAMAGNI4EN project.cds_in[1].read.pbus.data_in.bit.in2
#define FROM_ING_GED_OSTANOVLEN project.cds_in[1].read.pbus.data_in.bit.in3
#define FROM_ING_QTV_ON project.cds_in[1].read.pbus.data_in.bit.in4
#define FROM_ING_QTV_OFF project.cds_in[1].read.pbus.data_in.bit.in5
#define FROM_ING_VOZB_PODKLU4IT project.cds_in[1].read.pbus.data_in.bit.in6
#define FROM_ING_VOZB_OTKLU4IT project.cds_in[1].read.pbus.data_in.bit.in7
#define FROM_ING_VOZB_PUSK project.cds_in[1].read.pbus.data_in.bit.in8
*/
typedef struct
{
int adc_temper_u[7];
float real_temper_u[7];
int real_int_temper_u[7];
int max_real_int_temper_u;
int adc_temper_water[2];
float real_temper_water[2];
int real_int_temper_water[2]; //0 - internal; 1 - external
int max_real_int_temper_water;
int adc_temper_air[4];
float real_temper_air[4];
int real_int_temper_air[4];
int max_real_int_temper_air;
int min_real_int_temper_air;
} TEMPER_EDRK;
#define TEMPER_EDRK_DEFAULT {{0,0,0,0,0,0,0},{0,0,0,0,0,0,0},{0,0,0,0,0,0,0},0,\
{0,0},{0,0},{0,0},0,\
{0,0,0,0},{0,0,0,0},{0,0,0,0},0,0\
}
typedef struct
{
int adc_p_water[1];
float real_p_water[1];
int real_int_p_water[1];
float filter_real_p_water[1];
int filter_real_int_p_water[1];
int flag_init_filter_temp[1];
} P_WATER_EDRK;
#define P_WATER_EDRK_DEFAULT {{0},{0},{0},{0},{0},{0}}
typedef struct
{
struct
{
int adc_temper[6];
float real_temper[6];
int real_int_temper[6];
float filter_real_temper[6];
int filter_real_int_temper[6];
int flag_init_filter_temp[6];
int max_size;
int max_real_int_temper;
} winding;
struct
{
int adc_temper[2];
float real_temper[2];
int real_int_temper[2];
float filter_real_temper[2];
int filter_real_int_temper[2];
int flag_init_filter_temp[2];
int max_size;
int max_real_int_temper;
} bear;
} TEMPER_ACDRIVE;
#define TEMPER_ACDRIVE_DEFAULT {{{0,0,0,0,0,0},{0,0,0,0,0,0},{0,0,0,0,0,0},{0,0,0,0,0,0},{0,0,0,0,0,0},{0,0,0,0,0,0},6,0},\
{{0,0},{0,0},{0,0},{0,0},{0,0},{0,0},2,0} }
///////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////
typedef struct
{
union {
unsigned int all;
struct {
unsigned int U_1_MAX: 1;
unsigned int U_2_MAX: 1;
unsigned int U_1_MIN: 1;
unsigned int U_2_MIN : 1;
unsigned int U_A1B1_MAX: 1;
unsigned int U_A2B2_MAX: 1;
unsigned int U_B1C1_MAX:1;
unsigned int U_B2C2_MAX :1;
unsigned int U_A1B1_MIN :1;
unsigned int U_A2B2_MIN: 1;
unsigned int U_B1C1_MIN:1;
unsigned int U_B2C2_MIN :1;
unsigned int U_IN_MAX:1;
unsigned int U_IN_MIN:1;
unsigned int I_1_MAX:1;
unsigned int I_2_MAX:1;
} bits;
} e0;
union {
unsigned int all;
struct {
unsigned int I_UO2_MAX: 1;
unsigned int I_UO3_MAX: 1;
unsigned int I_UO4_MAX: 1;
unsigned int I_UO5_MAX : 1;
unsigned int I_UO6_MAX: 1;
unsigned int I_UO7_MAX: 1;
unsigned int I_BREAK_1_MAX:1;
unsigned int I_BREAK_2_MAX :1;
unsigned int HWP_ERROR :1;
unsigned int BLOCK_DOOR: 1;
unsigned int NO_INPUT_SYNC_SIGNAL: 1;
unsigned int NO_CONFIRM_ON_RASCEPITEL: 1;
unsigned int ANOTHER_BS_NOT_ON_RASCEPITEL: 1;
unsigned int ANOTHER_BS_VERY_LONG_WAIT: 1;
unsigned int VERY_LONG_BOTH_READY2: 1;
unsigned int BOTH_KEYS_CHARGE_DISCHARGE: 1;
} bits;
} e1;
union {
unsigned int all;
struct {
unsigned int T_UO1_MAX:1;
unsigned int T_UO2_MAX :1;
unsigned int T_UO3_MAX :1;
unsigned int T_UO4_MAX :1;
unsigned int T_UO5_MAX :1;
unsigned int T_UO6_MAX:1;
unsigned int T_UO7_MAX:1;
unsigned int T_WATER_EXT_MAX:1;
unsigned int T_WATER_INT_MAX:1;
unsigned int P_WATER_INT_MAX: 1;
unsigned int P_WATER_INT_MIN: 1;
unsigned int T_AIR0_MAX :1;
unsigned int T_AIR1_MAX :1;
unsigned int T_AIR2_MAX :1;
unsigned int T_AIR3_MAX :1;
unsigned int ERROR_RAZBOR_SHEMA :1;
} bits;
} e2;
union {
unsigned int all;
struct {
unsigned int NOT_READY_TK_0: 1;
unsigned int NOT_READY_TK_1 : 1;
unsigned int NOT_READY_TK_2: 1;
unsigned int NOT_READY_TK_3: 1;
unsigned int NOT_READY_OUT_0:1;
unsigned int NOT_READY_OUT_1:1;
unsigned int NOT_READY_OUT_2:1;
unsigned int NOT_READY_IN_0 :1;
unsigned int NOT_READY_IN_1 :1;
unsigned int NOT_READY_IN_2 :1;
unsigned int NOT_READY_ADC_0: 1;
unsigned int NOT_READY_ADC_1: 1;
unsigned int NOT_READY_HWP_0: 1;
unsigned int NOT_READY_HWP_1: 1;
unsigned int NOT_READY_CONTR: 1;
unsigned int ERR_INT_PWM_LONG:1;
} bits;
} e3;
union {
unsigned int all;
struct {
unsigned int ERR_TK_0: 1;
unsigned int ERR_TK_1: 1;
unsigned int ERR_TK_2: 1;
unsigned int ERR_TK_3: 1;
unsigned int ERR_OUT_0:1;
unsigned int ERR_OUT_1:1;
unsigned int ERR_OUT_2:1;
unsigned int ERR_IN_0 :1;
unsigned int ERR_IN_1 :1;
unsigned int ERR_IN_2 :1;
unsigned int ERR_ADC_0:1;
unsigned int ERR_ADC_1:1;
unsigned int ERR_HWP_0:1;
unsigned int ERR_HWP_1:1;
unsigned int ANOTHER_BS_POWER_OFF:1;
unsigned int FAST_OPTICAL_ALARM:1;
} bits;
} e4;
union {
unsigned int all;
struct {
unsigned int LINE_ERR0: 1;
unsigned int LINE_HWP : 1;
unsigned int KEY_AVARIA: 1;
unsigned int PUMP_1: 1;
unsigned int PUMP_2 : 1;
unsigned int FAN : 1;
unsigned int OP_PIT : 1;
unsigned int POWER_UPC :1;
unsigned int UTE4KA_WATER :1;
unsigned int T_VIPR_MAX :1;
unsigned int ERROR_PRE_CHARGE_ON: 1;
unsigned int PRE_READY_PUMP: 1;
unsigned int ERROR_GROUND_NET: 1;
unsigned int ERROR_HEAT: 1;
unsigned int ERROR_ISOLATE: 1;
unsigned int ERROR_PRED_VIPR: 1;
} bits;
} e5;
union {
unsigned int all;
struct {
unsigned int QTV_ERROR_NOT_ANSWER: 1;
unsigned int QTV_ERROR_NOT_U : 1;
unsigned int ERROR_PRE_CHARGE_U: 1;
unsigned int ERROR_PRE_CHARGE_ANSWER: 1;
unsigned int UO2_KEYS :1;
unsigned int UO3_KEYS :1;
unsigned int UO4_KEYS :1;
unsigned int UO5_KEYS :1;
unsigned int UO6_KEYS:1;
unsigned int UO7_KEYS:1;
unsigned int UO1_KEYS:1;
unsigned int ERR_PBUS:1;
unsigned int ERR_SBUS:1;
unsigned int ER_DISBAL_BATT:1;
unsigned int ER_RAZBALANS_ALG:1;
unsigned int RASCEPITEL_ERROR_NOT_ANSWER:1;
} bits;
} e6;
union {
unsigned int all;
struct {
unsigned int MASTER_SLAVE_SYNC: 1;
unsigned int WRITE_OPTBUS: 1;
unsigned int READ_OPTBUS: 1;
unsigned int ANOTHER_PCH_NOT_ANSWER: 1;
unsigned int AUTO_SET_MASTER: 1;
unsigned int UMP_NOT_READY: 1;
unsigned int ERROR_SBOR_SHEMA: 1;
unsigned int NOT_VALID_CONTROL_STATION:1;
unsigned int VERY_FAST_GO_0to1:1;
unsigned int T_ACDRIVE_WINDING_MAX:1;
unsigned int T_ACDRIVE_BEAR_MAX_DNE:1;
unsigned int SVU_BLOCK_ON_QTV:1;
unsigned int UMP_NOT_ANSWER: 1;
unsigned int ANOTHER_RASCEPITEL_ON: 1;
unsigned int CAN2CAN_BS: 1;
unsigned int ANOTHER_BS_ALARM: 1;
} bits;
} e7;
union {
unsigned int all;
struct {
unsigned int LOSS_OUTPUT_U1: 1;
unsigned int LOSS_OUTPUT_V1: 1;
unsigned int LOSS_OUTPUT_W1: 1;
unsigned int LOSS_OUTPUT_U2: 1;
unsigned int LOSS_OUTPUT_V2: 1;
unsigned int LOSS_OUTPUT_W2: 1;
unsigned int LOSS_INPUT_A1B1: 1;
unsigned int LOSS_INPUT_B1C1: 1;
unsigned int LOSS_INPUT_A2B2: 1;
unsigned int LOSS_INPUT_B2C2: 1;
unsigned int LOW_FREQ_50HZ: 1;
unsigned int U_IN_10_PROCENTS_LOW: 1;
unsigned int U_IN_20_PROCENTS_LOW: 1;
unsigned int U_IN_20_PROCENTS_HIGH: 1;
unsigned int DISBALANCE_IM1_IM2: 1;
unsigned int WDOG_OPTICAL_BUS: 1;
} bits;
} e8;
union {
unsigned int all;
struct {
unsigned int T_ACDRIVE_BEAR_MAX_NE :1;
unsigned int I_GED_MAX :1;
unsigned int CHANGE_ACTIVE_CONTROL_TO_LOCAL_FROM_SVU :1;
unsigned int DISBALANCE_Uin_1 :1;
unsigned int DISBALANCE_Uin_2 :1;
unsigned int U_IN_FREQ_NOT_NORMA :1;
unsigned int U_IN_FREQ_NOT_STABLE :1;
unsigned int ERR_PWM_WDOG :1;
unsigned int ERR_INT_PWM_VERY_LONG : 1;
unsigned int SENSOR_ROTOR_1_BREAK : 1;
unsigned int SENSOR_ROTOR_2_BREAK : 1;
unsigned int SENSOR_ROTOR_1_2_BREAK : 1;
unsigned int SENSOR_ROTOR_BREAK_DIRECTION : 1;
unsigned int BREAK_TEMPER_WARNING : 1;
unsigned int BREAK_TEMPER_ALARM : 1;
unsigned int BREAKER_GED_ON : 1;
} bits;
} e9;
union {
unsigned int all;
struct {
unsigned int WARNING_I_OUT_OVER_1_6_NOMINAL :1;
unsigned int T_BSU_Sensor_BK1 :1;
unsigned int T_BSU_Sensor_BK2 :1;
unsigned int T_ACDRIVE_WINDING_U1 :1;
unsigned int T_ACDRIVE_WINDING_V1 :1;
unsigned int T_ACDRIVE_WINDING_W1 :1;
unsigned int T_ACDRIVE_WINDING_U2 :1;
unsigned int T_ACDRIVE_WINDING_V2 :1;
unsigned int T_ACDRIVE_WINDING_W2 :1;
unsigned int res: 7;
} bits;
} e10;
union {
unsigned int all;
struct {
unsigned int ERROR_PUMP_ON_SBOR:1;
unsigned int ERROR_RESTART_PUMP_1_ON_SBOR:1;
unsigned int ERROR_RESTART_PUMP_2_ON_SBOR:1;
unsigned int ERROR_RESTART_PUMP_ALL_ON_SBOR:1;
unsigned int ERROR_PRED_ZARYAD:1;
unsigned int ERROR_PRED_ZARYAD_AFTER:1;
unsigned int ERROR_READY_UMP_BEFORE_QTV:1;
unsigned int ERROR_STATUS_QTV:1;
unsigned int ERROR_UMP_ON_AFTER :1;
unsigned int ERROR_UMP_NOT_ON:1;
unsigned int ERROR_UMP_NOT_OFF :1;
unsigned int ERROR_RASCEPITEL_WAIT_CMD:1;
unsigned int ERROR_RASCEPITEL_ON_AFTER:1;
unsigned int ERROR_DISABLE_SBOR:1;
unsigned int ERROR_VERY_LONG_SBOR:1;
unsigned int ERROR_CONTROLLER_BUS:1;
// unsigned int :1;
} bits;
} e11;
union {
unsigned int all;
struct {
unsigned int res: 16;
} bits;
} e12;
} ERRORS_EDRK;
#define ERRORS_EDRK_DEFAULT {0,0,0,0,0,0,0,0,0,0,0,0}
////////////////////////////////////////////////////////
typedef struct
{
struct
{
unsigned int alive_can_to_another_bs;
unsigned int alive_sync_line;
unsigned int alive_sync_line_local;
unsigned int alive_opt_bus_read;
unsigned int alive_opt_bus_write;
unsigned int input_master_slave;
unsigned int input_alarm_another_bs;
unsigned int another_rascepitel;
unsigned int fast_optical_alarm;
} err_lock_signals;
struct
{
unsigned int alive_can_to_another_bs;
unsigned int alive_sync_line;
unsigned int alive_sync_line_local;
unsigned int alive_opt_bus_read;
unsigned int alive_opt_bus_write;
unsigned int input_master_slave;
unsigned int input_alarm_another_bs;
unsigned int another_rascepitel;
unsigned int fast_optical_alarm;
} err_signals;
struct
{
unsigned int alive_can_to_another_bs;
unsigned int alive_sync_line;
unsigned int alive_sync_line_local;
unsigned int alive_opt_bus_read;
unsigned int alive_opt_bus_write;
unsigned int input_master_slave;
unsigned int input_alarm_another_bs;
unsigned int another_rascepitel;
unsigned int fast_optical_alarm;
} warning_signals;
struct
{
unsigned int alive_can_to_another_bs;
unsigned int alive_sync_line;
unsigned int alive_sync_line_local;
unsigned int alive_opt_bus_read;
unsigned int alive_opt_bus_write;
unsigned int input_master_slave;
unsigned int input_alarm_another_bs;
unsigned int another_rascepitel;
unsigned int fast_optical_alarm;
} errors_count;
struct
{
unsigned int alive_can_to_another_bs;
unsigned int alive_sync_line;
unsigned int alive_sync_line_local;
unsigned int alive_opt_bus_read;
unsigned int alive_opt_bus_write;
unsigned int input_master_slave;
unsigned int input_alarm_another_bs;
unsigned int another_rascepitel;
unsigned int fast_optical_alarm;
} wait_count;
unsigned int sum_err; // ����� ������
unsigned int sum_warning; // ����� ��������������
unsigned int another_bs_maybe_on; // ��� �� �������
unsigned int another_bs_maybe_off; // ��� �� ��������
unsigned int ready1; // ������� ����������1 ����
unsigned int ready2; // ������� ����������2 ����
unsigned int ready3; // ���� ����� � master/slave � ����������� ���������
unsigned int count_time_wait_ready1; // ������� �������� ���������� ����
unsigned int count_time_wait_ready2; // ������� �������� ���������� ����
unsigned int status; // ��� ���������, � ����� ����: �������, ���� ������, ���� ������.
} MASTER_SLAVE_COM;
#define MASTER_SLAVE_COM_DEFAULT {{0,0,0,0,0,0,0,0},\
{0,0,0,0,0,0,0,0},\
{0,0,0,0,0,0,0,0},\
{0,0,0,0,0,0,0,0},\
{0,0,0,0,0,0,0,0},\
0,0,0,0,0,0,0,0,0}
////////////////////////////////////////////////////////
////////////////////////////////////////////////////////
typedef union {
unsigned int all;
struct {
unsigned int master: 1;
unsigned int slave: 1;
unsigned int try_master: 1;
unsigned int try_slave: 1;
unsigned int nothing: 1;
unsigned int sync1_2: 1;
unsigned int bus_off: 1;
unsigned int in_err: 1;
unsigned int sync_line_detect:1;
unsigned int tick:1;
} bits;
} AUTO_MASTER_SLAVE_DATA;
////////////////////////////////////////////////////////
typedef union {
unsigned int all;
struct {
unsigned int ready1: 1;
unsigned int ready2: 1;
unsigned int ready3: 1;
unsigned int ready4: 1;
unsigned int ready5: 1;
unsigned int ready6: 1;
unsigned int ready7: 1;
unsigned int ready_final: 1;
unsigned int Batt: 1;
unsigned int ImitationReady2: 1;
unsigned int MasterSlaveActive: 1; // �������� ���� ���� master ��� slave
unsigned int preImitationReady2: 1;
unsigned int res:4;
} bits;
} STATUS_READY;
////////////////////////////////////////////////////////
typedef union {
unsigned int all;
struct {
unsigned int ZARYAD_ON: 1;
unsigned int NAGREV_OFF: 1;
unsigned int NASOS_1_ON: 1;
unsigned int NASOS_2_ON: 1;
unsigned int BLOCK_KEY_OFF: 1;
unsigned int RESET_BLOCK_IZOL: 1;
unsigned int SMALL_LAMPA_AVARIA: 1;
unsigned int RASCEPITEL_OFF: 1;
unsigned int RASCEPITEL_ON: 1;
unsigned int res:7;
} bits;
} TO_ING;
////////////////////////////////////////////////////////
typedef union {
unsigned int all;
struct {
unsigned int OP_PIT_NORMA : 1;
unsigned int OHLAD_UTE4KA_WATER: 1;
unsigned int RASCEPITEL_ON: 1;
unsigned int ZARYAD_ON: 1;
unsigned int VENTIL_ON : 1;
unsigned int NASOS_ON: 1;
unsigned int NASOS_NORMA: 1;
unsigned int ZAZEML_OFF: 1;
unsigned int NAGREV_ON: 1;
unsigned int BLOCK_IZOL_NORMA: 1;
unsigned int VIPR_PREDOHR_NORMA: 1;
unsigned int UPC_24V_NORMA: 1;
unsigned int LOCAL_REMOUTE: 1;
unsigned int ZAZEML_ON: 1;
unsigned int ALL_KNOPKA_AVARIA: 1;
unsigned int BLOCK_IZOL_AVARIA: 1;
} bits;
} FROM_ING1;
////////////////////////////////////////////////////////
typedef union {
unsigned int all;
struct {
unsigned int KEY_PLUS : 1;
unsigned int KEY_MINUS : 1;
unsigned int KEY_SBOR : 1;
unsigned int KEY_RAZBOR : 1;
unsigned int KEY_KVITIR : 1;
unsigned int SOST_ZAMKA : 1;
unsigned int res: 9;
} bits;
} FROM_ING2;
////////////////////////////////////////////////////////
typedef union {
unsigned int all;
struct {
unsigned int MASTER: 1;
unsigned int RASCEPITEL: 1;
unsigned int res:14;
} bits;
} FROM_SECOND_PCH;
////////////////////////////////////////////////////////
typedef union {
unsigned int all;
struct {
unsigned int MASTER: 1;
unsigned int ALARM: 1;
unsigned int res:14;
} bits;
} TO_SECOND_PCH;
////////////////////////////////////////////////////////
typedef union {
unsigned int all;
struct {
unsigned int QTV_ON: 1;
unsigned int QTV_OFF: 1;
unsigned int UMP_ON_OFF: 1;
unsigned int ENABLE_QTV: 1;
unsigned int QTV_ON_OFF: 1;
unsigned int CROSS_UMP_ON_OFF: 1;
unsigned int CROSS_QTV_ON_OFF: 1;
unsigned int res:9;
} bits;
} TO_SHEMA;
////////////////////////////////////////////////////////
typedef union {
unsigned int all;
struct {
unsigned int QTV_ON_OFF: 1;
// unsigned int KNOPKA_AVARIA: 1;
unsigned int ZADA_DISPLAY : 1;
unsigned int RAZBOR_SHEMA :1 ;
unsigned int SBOR_SHEMA : 1;
// unsigned int OPENDOOR : 1;
unsigned int SVU : 1;
// unsigned int ACTIVE : 1;
unsigned int READY_UMP : 1;
unsigned int UMP_ON_OFF : 1;
unsigned int SVU_BLOCK_QTV : 1;
// unsigned int res:10;
} bits;
} FROM_SHEMA;
////////////////////////////////////////////////////////
typedef union {
unsigned int all;
struct {
unsigned int KVITIR: 1;
unsigned int PLUS: 1;
unsigned int MINUS : 1;
unsigned int PROVOROT :1 ;
unsigned int UOM_READY_ACTIVE : 1;
unsigned int UOM_LIMIT_3 : 1;
unsigned int UOM_LIMIT_2 : 1;
unsigned int UOM_LIMIT_1 : 1;
unsigned int res:8;
} bits;
} FROM_ZADAT4IK;
////////////////////////////////////////////////////////
typedef union {
unsigned int all;
struct {
unsigned int SBOR_SHEMA: 1;
unsigned int RAZBOR_SHEMA: 1;
unsigned int KVITIR: 1;
unsigned int ACTIVE : 1;
unsigned int res:12;
} bits;
} FROM_RS;
////////////////////////////////////////////////////////
typedef union {
unsigned int all;
struct {
unsigned int SBOR_SHEMA: 1;
unsigned int RAZBOR_SHEMA: 1;
unsigned int KVITIR: 1;
unsigned int ACTIVE : 1;
unsigned int BLOCKED : 1;
unsigned int res:11;
} bits;
} FROM_DISPLAY;
////////////////////////////////////////////////////////
typedef struct {
union {
int all;
} OBOROTS1;
union {
int all;
} OBOROTS2;
union {
unsigned int all;
struct {
unsigned int GOTOV1 : 1;
unsigned int GOTOV2 : 1;
unsigned int EMKOST : 1; //For 23550.3 and AVARIA moved up
unsigned int NEISPRAVNOST : 1;
unsigned int PEREGREV : 1;
unsigned int OGRAN_POWER : 1;
unsigned int AVARIA : 1;
unsigned int res:9;
} bits;
} BIG_LAMS;
union {
unsigned int all;
struct {
unsigned int PCH1_READY1: 1;
unsigned int PCH1_SHEMA_SOBRANA: 1;
unsigned int PCH1_PODKLU4EN: 1;
unsigned int PCH1_MESTNOE: 1;
unsigned int PCH2_READY1: 1;
unsigned int PCH2_SHEMA_SOBRANA: 1;
unsigned int PCH2_PODKLU4EN: 1;
unsigned int PCH2_MESTNOE: 1;
unsigned int GED_PEREGREV: 1;
unsigned int PCH1_PCH2_SYNC: 1;
unsigned int GED_PEREGRUZ: 1;
unsigned int OBOROT_SVU: 1;
unsigned int OBOROT_ZADAT: 1;
unsigned int OBOROT_MONITOR: 1;
unsigned int OBOROT_VPU: 1;
unsigned int HOD: 1;
} bits;
} APL_LAMS0;
union {
unsigned int all;
struct {
unsigned int PCH_READY1: 1;
unsigned int PCH_SHEMA_SOBRANA: 1;
unsigned int PCH_PODKLU4EN: 1;
unsigned int PCH_MESTNOE: 1;
unsigned int reserv: 12;
} bits;
} APL_LAMS_PCH;
} TO_ZADAT4IK;
#define TO_ZADAT4IK_DEFAULT {0,0,0,0,0}
////////////////////////////////////////////////////////
typedef struct {
union {
int all;
} OBOROTS1;
union {
int all;
} OBOROTS2;
union {
unsigned int all;
struct {
unsigned int VPU: 1;
unsigned int GOTOV2: 1;
unsigned int PODDERG_OBOROTS : 1;
unsigned int PEREGRUZKA :1 ;
unsigned int res:12;
} bits;
} BIG_LAMS;
} TO_VPU;
#define TO_VPU_DEFAULT {0,0,0}
////////////////////////////////////////////////////////
typedef struct {
unsigned int level_value;
unsigned int ready;
unsigned int error;
unsigned int code;
_iq iq_level_value;
_iq iq_level_value_kwt;
union {
unsigned int all;
struct {
unsigned int ready: 1;
unsigned int level0: 1;
unsigned int level1: 1;
unsigned int level2: 1;
unsigned int level3: 12;
} bits;
} digital_line;
} FROM_UOM;
////////////////////////////////////////////////////////
////////////////////////////////////////////////////////
////////////////////////////////////////////////////////
////////////////////////////////////////////////////////
////////////////////////////////////////////////////////
typedef struct {
int int_ZadanieU_Charge;
float ZadanieU_Charge;
_iq iq_ZadanieU_Charge;
_iq iq_ZadanieU_Charge_rmp;
int int_oborots_zad;
float oborots_zad;
float oborots_zad_hz;
_iq iq_oborots_zad_hz;
_iq iq_oborots_zad_hz_rmp;
int int_fzad;
float fzad;
_iq iq_fzad;
_iq iq_fzad_rmp;
int int_kzad;
float kzad;
_iq iq_kzad;
_iq iq_kzad_rmp;
int int_Izad;
float Izad;
_iq iq_Izad;
_iq iq_Izad_rmp;
int int_power_zad;
float power_zad;
_iq iq_power_zad;
_iq iq_power_zad_rmp;
} ZADANIE_FROM_ANOTHER_BS;
#define ZADANIE_FROM_ANOTHER_BS_DEFAULT {\
0,0,0,0, 0,0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 }
////////////////////////////////////////////////////////
typedef struct {
RMP_V1 rmp_ZadanieU_Charge;
RMP_V1 rmp_fzad;
RMP_V1 rmp_k_u_disbalance;
RMP_V1 rmp_kplus_u_disbalance;
RMP_V1 rmp_Izad;
RMP_V2 rmp_powers_zad;
RMP_V2 rmp_limit_powers_zad;
RMP_V1 rmp_kzad;
RMP_V2 rmp_oborots_zad_hz;
RMP_V1 rmp_oborots_imitation;
_iq rmp_oborots_imitation_rmp;
float ZadanieU_Charge;
_iq iq_ZadanieU_Charge;
_iq iq_ZadanieU_Charge_rmp;
float oborots_zad;
float oborots_zad_hz;
_iq iq_oborots_zad_hz;
_iq iq_oborots_zad_hz_rmp;
float fzad;
_iq iq_fzad;
_iq iq_fzad_rmp;
float kzad;
_iq iq_kzad;
_iq iq_kzad_rmp;
float k_u_disbalance;
_iq iq_k_u_disbalance;
_iq iq_k_u_disbalance_rmp;
float kplus_u_disbalance;
_iq iq_kplus_u_disbalance;
_iq iq_kplus_u_disbalance_rmp;
float Izad;
_iq iq_Izad;
_iq iq_Izad_rmp;
float power_zad;
_iq iq_power_zad;
_iq iq_power_zad_rmp;
float limit_power_zad;
_iq iq_limit_power_zad;
_iq iq_limit_power_zad_rmp;
_iq iq_set_break_level;
float oborots_zad_no_dead_zone;
} ZADANIE;
#define ZADANIE_DEFAULT { RMP_V1_DEFAULTS, RMP_V1_DEFAULTS,RMP_V1_DEFAULTS,\
RMP_V1_DEFAULTS,RMP_V1_DEFAULTS,\
RMP_V2_DEFAULTS,\
RMP_V2_DEFAULTS,RMP_V1_DEFAULTS,\
RMP_V2_DEFAULTS,\
RMP_V1_DEFAULTS,\
0, 0,0,0,0,0, 0,0,0,0,0, 0,0,0,0,0, 0,0,0,0,0,0,0,0,0,0 , 0,0,0, 0,0}
typedef union {
struct {
unsigned int limit_by_temper:1;
unsigned int limit_Iout:1;
unsigned int limit_UOM:1; //���������� ����������� ��������
unsigned int limit_from_SVU:1;
unsigned int limit_from_freq:1;
unsigned int limit_from_uom_fast:1;
unsigned int limit_moment:1;
unsigned int res:9;
} bits;
unsigned int all;
} POWER_LIMIT;
#define POWER_LIMIT_DEFAULTS {0}
typedef struct {
_iq temper_limit;
_iq power_limit;
_iq moment_limit;
_iq uin_freq_limit;
_iq uom_limit;
_iq local_temper_limit;
_iq local_power_limit;
_iq local_moment_limit;
_iq local_uin_freq_limit;
_iq local_uom_limit;
_iq sum_limit;
_iq local_sum_limit;
int code_status;
} ALL_LIMIT_KOEFFS;
#define ALL_LIMIT_KOEFFS_DEFAULTS {0,0,0,0,0, 0,0,0,0,0, 0,0,0}
typedef struct {
_iq power_units;
_iq area;
_iq water_int;
_iq water_ext;
_iq acdrive_windings;
_iq acdrive_bears;
_iq sum_limit;
int code_status;
} TEMPERATURE_LIMIT_KOEFFS;
#define TEMPERATURE_LIMIT_KOEFFS_DEFAULTS {0,0,0,0,0, 0,CONST_IQ_1,0}
#define COUNT_MOTO_PULT 18
typedef struct
{
int nPCH;
int TimeToChangePump;
int count_revers; // ���-�� ��������
int count_build; // ���-�� ������ ����
int LastWorkPump; // ����� ��� ��������� ���������� �����
int moto[COUNT_MOTO_PULT];
} t_params_pult_ing_one;
#define PARAMS_PULT_ING_ONE_DEFAULTS {-1,-1, -1,-1, 0, \
{-1,-1,-1,-1,-1, -1,-1,-1,-1,-1, -1,-1,-1,-1,-1, -1,-1,-1 } }
#define PARAMS_PULT_ING_TWO_DEFAULTS {0,0, 0,0, 0, \
{0,0,0,0,0, 0,0,0,0,0, 0,0,0,0,0, 0,0,0 } }
typedef struct
{
int flagSaveDataPCH;
int flagSaveDataMoto;
int flagSaveSlowLogs;
int flagSaveParamLogs;
int logger_params[28];
t_params_pult_ing_one data;
t_params_pult_ing_one data_from_pult;
t_params_pult_ing_one data_to_pult;
// int nPCH_from_pult;
// int nPCH_to_pult;
// int nPCH;
//
// int TimeToChangePump_from_pult;
// int TimeToChangePump_to_pult;
// int TimeToChangePump;
//
// int moto_from_pult[COUNT_MOTO_PULT];
// int mot_to_pult[COUNT_MOTO_PULT];
// int moto[COUNT_MOTO_PULT];
//
// int count_revers_from_pult;
// int count_revers_to_pult;
} t_params_pult_ing;
#define PARAMS_PULT_ING_DEFAULTS {0,0,0,0, \
{0,0,0,0,0, 0,0,0,0,0, 0,0,0,0,0, 0,0,0,0,0, 0,0,0,0,0, 0,0,0}, \
PARAMS_PULT_ING_TWO_DEFAULTS, \
PARAMS_PULT_ING_ONE_DEFAULTS, \
PARAMS_PULT_ING_ONE_DEFAULTS \
}
typedef struct
{
int log_what_memory; // �������� 0 - ��� �� ������, �� �����;
//�������� 1 - ��� ������, ���� �����;
//�������� 2 - ���� ������, ��� �����;
//�������� 3 - ���� � ������ � �����;
int kvitir; //
int sbor;
int send_log;
int pump_mode;
int sdusb;// 0 - sd, 1 usb
} t_pult_cmd_ing;
#define PULT_CMD_ING_DEFAULTS 0,0,0,0,0,0
////////////////////////////////////////////////////////
typedef struct
{
ZADANIE zadanie;
ZADANIE_FROM_ANOTHER_BS zadanie_from_another_bs;
TEMPER_EDRK temper_edrk;
P_WATER_EDRK p_water_edrk;
ERRORS_EDRK errors;
ERRORS_EDRK warnings;
TEMPER_ACDRIVE temper_acdrive;
POWER_LIMIT power_limit;
TEMPERATURE_LIMIT_KOEFFS temper_limit_koeffs;
ALL_LIMIT_KOEFFS all_limit_koeffs;
MASTER_SLAVE_COM ms;
////////
struct {
AUTO_MASTER_SLAVE_DATA local; // 1
AUTO_MASTER_SLAVE_DATA prev_local;//1
AUTO_MASTER_SLAVE_DATA remoute;//1
AUTO_MASTER_SLAVE_DATA prev_remoute;//1
unsigned int status;
unsigned int prev_status;
} auto_master_slave; // 6
STATUS_READY Status_Ready; //1
TO_ING to_ing; //1
FROM_ING1 from_ing1;//1
FROM_ING2 from_ing2;//1
FROM_SECOND_PCH from_second_pch;//1
TO_SECOND_PCH to_second_pch;//1
TO_SHEMA to_shema;//1
FROM_SHEMA from_shema;//1
FROM_SHEMA from_shema_filter;//1
FROM_ZADAT4IK from_zadat4ik;//1
FROM_ZADAT4IK from_vpu;//1
FROM_RS from_rs;//1
FROM_RS from_can;//1
FROM_DISPLAY from_display;//1
FROM_DISPLAY from_mpu;//1
FROM_DISPLAY from_svu;//1
TO_ZADAT4IK to_zadat4ik;//5
TO_VPU to_vpu;//3
FROM_UOM from_uom;//7
///////////////////////////////////////////////
unsigned int Discharge;
unsigned int ManualDischarge;
unsigned int NoDetectUZeroDischarge;
unsigned int TimeSbor;
unsigned int TimeRazbor;
unsigned int AutoStartPump;
unsigned int SumStartPump;
unsigned int ManualStartPump;
unsigned int SumSbor;
int Kvitir;
int KvitirProcess;//10
unsigned int prevGo;
unsigned int Go;
unsigned int GoBreak;
unsigned int GoWait;
int flag_wait_set_to_zero_zadanie;
int flag_block_zadanie;
int StartGEDfromControl;
int StartGEDfromZadanie;
int prevStartGEDfromZadanie;
int StartGED;
int test_mode;
int cmd_to_qtv;//20
int cmd_to_ump;//20
int prepare_stop_PWM;
int StartGEDfromSyncBus;
int cmd_to_rascepitel;
int Mode_ScalarVectorUFConst;
int Mode_OborotsOrPower;
int SelectPump1_2;//25
int summ_errors;
int Status_Charge;
unsigned int Sbor_Mode;
unsigned int Razbor_Mode;
unsigned int time_wait_sbor;
int Status_Sbor;
int Stage_Sbor;
int StatusPumpFanAll;
int StatusPump0;
int StatusPump1;
int StatusFunAll;
int StatusPumpAll;//35
int Run_Pred_Zaryad;
int Zaryad_OK;
int Rascepitel_OK;
int Run_QTV;
int Run_Rascepitel;
int Run_Rascepitel_from_RS;
int Run_UMP;
int Zaryad_UMP_Ok;
int Status_UMP_Ok;
int Status_QTV_Ok;
int Status_Rascepitel_Ok;
int Status_Perehod_Rascepitel;
int Final_Status_Rascepitel;
int you_can_on_rascepitel;
int RunZahvatRascepitel;
int RunUnZahvatRascepitel;
_iq iqMAX_U_ZPT;
_iq iqMAX_U_ZPT_Global;
_iq iqMAX_U_ZPT_Predzaryad;
_iq iqMIN_U_ZPT;//50
_iq iqMAX_U_IN;
_iq iqMIN_U_IN;
int SborFinishOk;
int RazborNotFinish;
int Obmotka1;
int Obmotka2;
_iq f_stator;
_iq k_stator1;
_iq k_stator2;//60
_iq iq_f_rotor_hz;
float f_rotor_hz;
int oborots;
int rotor_direction;
int power_kw;
// _iq iq_oborots;
_iq Izad_out;
unsigned int period_calc_pwm_int1;
unsigned int period_calc_pwm_int2;
unsigned int count_lost_interrupt;
unsigned int into_pwm_interrupt;
int disable_alg_u_disbalance;
_iq Kplus;
_iq Kminus;
unsigned int Revers;
_iq Uzad_max;
_iq iq_bpsi_normal;
_iq iq_f_provorot;//70
int flag_second_PCH;
int test;
int Stop;
int warning;
int overheat;
unsigned int MasterSlave;
_iq master_theta;
_iq master_Uzad;
_iq master_Iq;
_iq master_Izad;
_iq tetta_to_slave;
_iq Uzad_to_slave;
_iq Iq_to_slave;
_iq P_from_slave;
_iq P_to_master;//82
int flag_wait_both_ready2;
int number_can_box_terminal_cmd;
int number_can_box_terminal_oscil;
int Provorot;
int int_koef_ogran_power;
_iq iq_koef_ogran_power;
int int_koef_ogran_power_another_bs;
_iq iq_koef_ogran_power_another_bs;
int power_kw_another_bs;
_iq iq_power_kw_another_bs;
int run_razbor_shema;
int Ready1_another_bs;
int Ready2_another_bs;
int ump_cmd_another_bs;
int qtv_cmd_another_bs;
int active_post_upravl;
int active_post_upravl_another_bs;
int MasterSlave_another_bs;
int freq_50hz_1;
int freq_50hz_2;
_iq test_rms_Iu;
_iq test_rms_Ua;
//
int disable_interrupt_pwm;
int disable_interrupt_timer1;
int disable_interrupt_timer2;
int disable_interrupt_timer3;
int disable_interrupt_timer4;
int disable_interrupt_sync;
int get_new_data_from_hmi;
int flag_enable_update_hmi;
int flag_disable_pult_485;
int disable_rascepitel_work;
int enable_pwm_test_lines;
int count_bs_work;
unsigned int run_to_pwm_async;
int power_kw_full;
int stop_logs_rs232;
int sbor_wait_ump1;
int sbor_wait_ump2;
int flag_enable_on_ump;
int local_ump_on_off;
int local_ump_on_off_count;
int local_ready_ump;
int local_ready_ump_count;
t_params_pult_ing pult_data;
int logs_rotor;
int stop_slow_log;
int t_slow_log;
int disable_limit_power_from_svu;
int disable_uom;
int disable_break_work;
int flag_another_bs_first_ready12;
int flag_this_bs_first_ready12;
int enter_to_pump_stage;
int buildYear;
int buildMonth;
int buildDay;
int errors_another_bs_from_can;
unsigned int count_sbor;
unsigned int count_revers;
unsigned int count_run;
int flag_slow_in_main;
t_pult_cmd_ing pult_cmd;
int get_new_data_from_hmi2;
_iq iq_freq_50hz;
int imit_limit_freq;
int imit_limit_uom;
int set_limit_uom_50;
_iq iq_power_kw_full_znak;
_iq iq_power_kw_one_znak;
_iq iq_power_kw_full_filter_znak;
_iq iq_power_kw_one_filter_znak;
_iq iq_power_kw_full_abs;
_iq iq_power_kw_one_abs;
_iq iq_power_kw_full_filter_abs;
_iq iq_power_kw_one_filter_abs;
unsigned int sum_count_err_read_opt_bus;
int imit_save_slow_logs;
int imit_send_alarm_log_pult;
int current_active_control;
// int data_to_message2[100];
//101
unsigned long canes_reg;
unsigned long cantec_reg; // Transmit Error Counter
unsigned long canrec_reg; // Receive Error Counter
int cmd_clear_can_error;
int cmd_very_slow_start;
int cmd_imit_low_isolation;
int breaker_on;
int break_tempers[4];
int cmd_disable_calc_km_on_slave;
} EDRK;
#define EDRK_DEFAULT { \
ZADANIE_DEFAULT,\
ZADANIE_FROM_ANOTHER_BS_DEFAULT,\
TEMPER_EDRK_DEFAULT, \
P_WATER_EDRK_DEFAULT, \
ERRORS_EDRK_DEFAULT, \
ERRORS_EDRK_DEFAULT, \
TEMPER_ACDRIVE_DEFAULT, \
POWER_LIMIT_DEFAULTS, \
TEMPERATURE_LIMIT_KOEFFS_DEFAULTS, \
ALL_LIMIT_KOEFFS_DEFAULTS, \
MASTER_SLAVE_COM_DEFAULT, \
0,0,0,0,0,0, \
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, \
0,0,0,0,0, \
0,0,0,0, \
0,0,0, \
0,0,0,0,0,0,0, \
\
0,0,0,0,0,0,0,0,0,0, \
0,0,0,0,0,0,0,0,0,0, \
0,0,0,0,0,0,0,0,0,0, \
0,0,0,0,0,0,0,0,0,0, \
0,0,0,0,0,0,0,0,0,0, \
0,0,0,0,0,0,0,0,0,0, \
0,0,0,0,0,0,0,0,0,0, \
0,0,0,0,0,0,0,0,0,0, \
0,0,0,0,0,0,0,0,0,0, \
0,0,0,0,0,0,0,0,0,0,0,0, \
0,0,0,0,0,0,0,0,0,0, 0,0, \
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, \
0,0,0,0, \
PARAMS_PULT_ING_DEFAULTS, \
0,0,0,0,0,0,0,0, \
0,0,0,\
0, 0,0,0, 0, \
PULT_CMD_ING_DEFAULTS, 0,0, 0,0,0, 0,0,0,0, 0,0,0,0, \
0, 0,0, 0, 0, \
0,0,0, 0, 0, 0, \
0, {0,0,0,0}, \
0 \
}
extern EDRK edrk;
extern PLL_REC pll1;
//float get_sensor_ing(void);
//float get_i_vozbud(void);
//float get_zad_vozbud(void);
//unsigned int convert_w_to_mA(float inp);
void edrk_init(void);
void update_input_edrk(void);
void update_output_edrk(void);
//float get_amper_vozbud(void);
//void set_amper_vozbud(float set_curr, float cur_curr);
//void write_dac(int ndac, int Value);
void run_edrk(void);
void set_oborots_from_zadat4ik(void);
void get_where_oborots(void);
//void update_errors(void);
//unsigned int zaryad_on_off(unsigned int flag);
void update_lamp_alarm(void);
//int get_status_temper_acdrive_winding(int nc);
//int get_status_temper_acdrive_bear(int nc);
//int get_status_temper_air(int nc);
//int get_status_temper_u(int nc);
//int get_status_temper_water(int nc);
//int get_status_p_water_max(void);
//int get_status_p_water_min(int pump_on_off);
void detect_kvitir_from_all(void);
//void set_status_pump_fan(void);
int qtv_on_off(unsigned int flag);
///int detect_error_u_zpt(void);
//int detect_error_u_zpt_on_predzaryad(void);
void set_zadanie_u_charge(void);
void edrk_init_variables(void);
void edrk_init_before_main(void);
void edrk_init_before_loop(void);
void edrk_go_main(void);
int get_start_ged_from_zadanie(void);
//void UpdateTableSecondBS(void);
unsigned int get_ready_1(void);
//int detect_zaryad_ump(void);
void cross_stend_automats(void);
void get_sumsbor_command(void);
//unsigned int read_cmd_sbor_from_bs(void);
//void read_data_from_bs(void);
void check_change_post_upravl(void);
int get_code_active_post_upravl(void);
void auto_detect_zero_u_zpt(void);
void run_can_from_mpu(void);
void set_new_level_i_protect(int n_af, int level);
void update_maz_level_i_af(int n_af, unsigned int new_maz_level);
void calc_count_build_revers(void);
int calc_auto_moto_pump(void);
void prepare_logger_pult(void);
void read_can_error(void);
void clear_can_error(void);
void cmd_clear_can_error(void);
void check_temper_break(void);
void check_breaker_ged(void);
//extern int ccc[40];
void reinit_before_sbor(void);
unsigned int toggle_status_lamp(unsigned int bb1, unsigned int flag);
#endif