/************************************************************************** Description: Âñÿêèå ðàçíûå ïåðåêëþ÷àòåëè è óñòàâêè. Àâòîð: Óëèòîâñêèé Ä.È. Äàòà ïîñëåäíåãî îáíîâëåíèÿ: 2021.11.08 **************************************************************************/ #ifndef DEF #define DEF // ðàñêîììåíòèðîâàòü, åñëè åñòü ñäâèã ìåæäó îáìîòêàìè ÃÝÄ (30 ãðàä.) #define SHIFT #define SIMULINK_SEQUENCE V_PWM24_PHASE_SEQ_REVERS_BAC /* V_PWM24_PHASE_SEQ_NORMAL_ABC, - íå òî V_PWM24_PHASE_SEQ_NORMAL_BCA, - ïîõîæå íà ïðàâäó V_PWM24_PHASE_SEQ_NORMAL_CAB, - æîïà V_PWM24_PHASE_SEQ_REVERS_ACB, - æîïà V_PWM24_PHASE_SEQ_REVERS_CBA, - æîïà V_PWM24_PHASE_SEQ_REVERS_BAC - æîïà */ // ðåæèìû ðàáîòû (äëÿ state) #define STATE_SHUTDOWN 0 //àâàðèéíàÿ îñòàíîâêà #define STATE_STOP 1 //øòàòíàÿ îñòàíîâêà #define STATE_WORK 2 //ðàáîòà // ÷àñòîòà òàêòîâûõ èìïóëüñîâ ïðîöåññîðà, Ãö #define FSYSCLKOUT 200e6 //150e6 // // prescaled version of the system clock and is used by // all submodules within the ePWM, Ãö // (ñì. EPwmxRegs.TBCTL.bit.CLKDIV è EPwmxRegs.TBCTL.bit.HSPCLKDIV) #define FTBCLK (FSYSCLKOUT*0.5*0.5) //#define FTBCLK (FSYSCLKOUT*0.5*0.5*0.5*0.5) // ïåðèîä ØÈÌ, c #define T_PWM 2220e-6 //F_PWM = 450 Ãö //#define T_PWM 6000e-6 //F_PWM = 166.7 Ãö // ïåðèîä âûçîâà îñíîâíîé ïðîãðàììû, ñ #define TY (T_PWM*0.5) // "ìåðòâîå âðåìÿ", ñ #define DT 30e-6 //#define DT 60e-6 // Time-Base Period Register, åä. ñ÷¸ò÷èêà òàéìåðà #define T1_PRD (FTBCLK*T_PWM*0.5) // ìàêñèìàëüíîå çíà÷åíèå àìïëèòóäû íàïðÿæåíèÿ óïðàâëåíèÿ óñòàíàâëèâàåì òàê, // ÷òîáû ìèíèìàëüíàÿ øèðèíà èìïóëüñà áûëà 10 ìêñ, åä. ñ÷¸ò÷èêà òàéìåðà #define Y_LIM (T1_PRD - (DT + 10e-6)*FTBCLK) // êîíñòàíòû äëÿ âû÷èñëåíèÿ âñÿêîãî #define PI2 6.283185307179586476925286766559 //pi*2 #define SQRT2 1.4142135623730950488016887242097 //sqrt(2) #define SQRT3 1.7320508075688772935274463415059 //sqrt(3) #define ISQRT3 0.57735026918962576450914878050196 //1./sqrt(3) // Íîìèíàëüíûå âåëè÷èíû ÃÝÄ // ... ìîùíîñòü íà âàëó, Âò #define P_NOM (6300e3.) // ... ëèíåéíîå íàïðÿæåíèå,  (ampl) #define U_NOM (3300.*SQRT2) // ... ìåõàíè÷åñêàÿ ñêîðîñòü, îá/ìèí #define N_NOM 180. // ... ÷èñëî ïàð ïîëþñîâ #define PP 6. // ... êîýôôèöèåíò ìîùíîñòè #define COS_FI 0.89 // ... ÊÏÄ #define EFF 0.968 // ... ïðèâåäåííûé ê âàëó ìîìåíò èíåðöèè, êã*ì^2 #define J (87e3*0.50) // ... ïîëíàÿ ìîùíîñòü, ÂÀ #define S_NOM (P_NOM/(COS_FI*EFF)) // ... ìåõàíè÷åñêàÿ ñêîðîñòü, ðàä/ñ #define WM_NOM (N_NOM/60.*PI2) // ... ìîìåíò íà âàëó, Í*ì #define M_NOM (P_NOM/WM_NOM) // Áàçîâûå âåëè÷èíû ÃÝÄ // ... ïîëíàÿ ìîùíîñòü, BA #define S_BAZ S_NOM // ... ëèíåéíîå íàïðÿæåíèå,  (ampl) #define U_BAZ U_NOM // ... ôàçíûé òîê, À (ampl) #define I_BAZ (S_BAZ*2./(U_BAZ*SQRT3)*0.5) //0.5 - ò.ê. îáìîòîê äâå // ... ìåõàíè÷åñêàÿ ñêîðîñòü, îá/ìèí #define N_BAZ N_NOM // ... ìåõàíè÷åñêàÿ ñêîðîñòü, ðàä/ñ #define WM_BAZ (N_BAZ/60.*PI2) // ... ýëåêòðè÷åñêàÿ ñêîðîñòü, ðàä/ñ #define WE_BAZ (WM_BAZ*PP) // ... ìîìåíò íà âàëó, Í*ì #define M_BAZ (S_BAZ/WM_BAZ) // ... ïîòîêîñöåïëåíèå ñòàòîðà, Âá #define PSI_BAZ (U_BAZ/(WE_BAZ*SQRT3)) // ... èíäóêòèâíîñòü, Ãí #define L_BAZ (PSI_BAZ/I_BAZ) // ... ñîïðîòèâëåíèå, Îì #define R_BAZ (U_BAZ/(I_BAZ*SQRT3)) // äëÿ ïåðåñ÷¸òà èç àìïëèòóäû ôàçíîãî íàïðÿæåíèÿ â åäèíèöû ñèãíàëà óïðàâëåíèÿ #define U_2_Y (T1_PRD*SQRT3/U_BAZ) // íàïðÿæåíèå â çâåíå ïîñò. òîêà, êîòîðîå äàëî áû íà âûõîäå ÀÖÏ çíà÷. 2048,  #define UDC_SENS_MAX (U_BAZ*1.15*1.3) // âûõîäíîé òîê, êîòîðûé äàë áû íà âûõîäå ÀÖÏ çíà÷. 2048, À (ampl) #define IAC_SENS_MAX (I_BAZ*1.5) // number of pulses per rev. (from tacho, Hall, optical sensor...etc) #define NOP 1024. // ïðèðàùåíèå ñ÷¸ò÷èêà QEP çà TY ñåê. ïðè ÷àñòîòå âðàù. WM_BAZ #define QEP_CNT_DEL_NOM (NOP*4.*TY*WM_BAZ/PI2) // êîýôôèöèåíòû äëÿ ïåðåâîäà èçìåðåííûõ âåëè÷èí â o.e. #define GAIN_UDC (UDC_SENS_MAX/(2048.*U_BAZ)) #define GAIN_IAC (IAC_SENS_MAX/(2048.*I_BAZ)) #define GAIN_WM (1.0/QEP_CNT_DEL_NOM) // ìèíèìàëüíàÿ ñêîðîñòü äëÿ ïåðåñ÷¸òà ìîùíîñòè â òîê, o.e. #define WM_MIN 0.03 //0.003 //? // äëÿ ïðîðåæèâàíèÿ ðåãóëÿòîðîâ ïîòîêà, ñêîðîñòè è ìîùíîñòè #define DECIM_PSI_WM_PM 2. //1. //5. //? // for specify the PLL #define PLLSTS_DIVSEL 2 #define PLLCR_DIV 10 // äëÿ âûâîäà #define CONTROLLER_BIAS 3.2 #define CONTROLLER_GAIN 2500. // îáùåå êîëè÷åñòâî ïàðàìåòðîâ #define PAR_NUMBER 400 // íîìåð ïåðâîãî ðåäàêòèðóåìîãî ïàðàìåòðà #define FIRST_WRITE_PAR_NUM 150 // Äèñêðåòíûå âõîäû/âûõîäû (begin) //------------------------------------------------------------------------- // âõîäû // ---------------------------- #define DI_24V_SOURCE_FAULT GpioDataRegs.GPBDAT.bit.GPIO50 // âûõîäû // ---------------------------- // ... ðàçíîå #define DO_GPIO00_SET GpioDataRegs.GPASET.bit.GPIO0 = 1 #define DO_GPIO00_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO0 = 1 #define DO_GPIO01_SET GpioDataRegs.GPASET.bit.GPIO1 = 1 #define DO_GPIO01_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO1 = 1 #define DO_GPIO02_SET GpioDataRegs.GPASET.bit.GPIO2 = 1 #define DO_GPIO02_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO2 = 1 #define DO_GPIO03_SET GpioDataRegs.GPASET.bit.GPIO3 = 1 #define DO_GPIO03_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO3 = 1 #define DO_GPIO04_SET GpioDataRegs.GPASET.bit.GPIO4 = 1 #define DO_GPIO04_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO4 = 1 #define DO_GPIO05_SET GpioDataRegs.GPASET.bit.GPIO5 = 1 #define DO_GPIO05_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO5 = 1 #define DO_GPIO06_SET GpioDataRegs.GPASET.bit.GPIO6 = 1 #define DO_GPIO06_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO6 = 1 #define DO_GPIO07_SET GpioDataRegs.GPASET.bit.GPIO7 = 1 #define DO_GPIO07_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO7 = 1 #define DO_GPIO08_SET GpioDataRegs.GPASET.bit.GPIO8 = 1 #define DO_GPIO08_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO8 = 1 #define DO_GPIO09_SET GpioDataRegs.GPASET.bit.GPIO9 = 1 #define DO_GPIO09_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO9 = 1 #define DO_GPIO10_SET GpioDataRegs.GPASET.bit.GPIO10 = 1 #define DO_GPIO10_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO10 = 1 #define DO_GPIO11_SET GpioDataRegs.GPASET.bit.GPIO11 = 1 #define DO_GPIO11_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO11 = 1 // ... íå èñïîëüçóþòñÿ #define DO_GPIO019_SET GpioDataRegs.GPASET.bit.GPIO19 = 1 #define DO_GPIO019_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO19 = 1 #define DO_GPIO020_SET GpioDataRegs.GPASET.bit.GPIO20 = 1 #define DO_GPIO020_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO20 = 1 #define DO_GPIO022_SET GpioDataRegs.GPASET.bit.GPIO22 = 1 #define DO_GPIO022_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO22 = 1 #define DO_GPIO48_SET GpioDataRegs.GPBSET.bit.GPIO48 = 1 #define DO_GPIO48_CLEAR GpioDataRegs.GPBCLEAR.bit.GPIO48 = 1 #define DO_GPIO49_SET GpioDataRegs.GPBSET.bit.GPIO49 = 1 #define DO_GPIO49_CLEAR GpioDataRegs.GPBCLEAR.bit.GPIO49 = 1 // ... äëÿ óïðàâëåíèÿ íîæêîé CS EEPROM #define CS_SET GpioDataRegs.GPBSET.bit.GPIO57 = 1 #define CS_CLEAR GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1 // ... ñâåòîäèîäû // (çåë¸íûé "Ãîòîâíîñòü") #define LED_GREEN1_ON GpioDataRegs.GPBCLEAR.bit.GPIO59 = 1 #define LED_GREEN1_OFF GpioDataRegs.GPBSET.bit.GPIO59 = 1 #define LED_GREEN1_TOGGLE GpioDataRegs.GPBTOGGLE.bit.GPIO59 = 1 // (çåë¸íûé "Ðàáîòà") #define LED_GREEN2_ON GpioDataRegs.GPBCLEAR.bit.GPIO60 = 1 #define LED_GREEN2_OFF GpioDataRegs.GPBSET.bit.GPIO60 = 1 #define LED_GREEN2_TOGGLE GpioDataRegs.GPBTOGGLE.bit.GPIO60 = 1 // (êðàñíûé "Àâàðèÿ") #define LED_RED_ON GpioDataRegs.GPBCLEAR.bit.GPIO61 = 1 #define LED_RED_OFF GpioDataRegs.GPBSET.bit.GPIO61 = 1 #define LED_RED_TOGGLE GpioDataRegs.GPBTOGGLE.bit.GPIO61 = 1 // ... íå èñïîëüçóåòñÿ #define DO_GPIO63_SET GpioDataRegs.GPBSET.bit.GPIO63 = 1 #define DO_GPIO63_CLEAR GpioDataRegs.GPBCLEAR.bit.GPIO63 = 1 //------------------------------------------------------------------------- // Äèñêðåòíûå âõîäû/âûõîäû (end) #include "DSP2833x_Device.h" #include "math.h" #include "C28x_FPU_FastRTS.h" #endif //DEF