#include "DSP281x_Examples.h" // DSP281x Examples Include File
#include "DSP281x_Device.h" // DSP281x Headerfile Include File
#include "IQmathLib.h"
#include <adc_internal.h>
#include <adc_tools.h>
#include <edrk_main.h>
#include <master_slave.h>
#include <project.h>
#include "mathlib.h"
#include "filter_v1.h"
#include "xp_project.h"
//#include "spartan_tools.h"
//#define LOG_ACP_TO_BUF 1
#ifdef LOG_ACP_TO_BUF
#define SIZE_BUF_LOG_ACP 500
#pragma DATA_SECTION(BUF_ADC,".slow_vars")
int BUF_ADC[SIZE_BUF_LOG_ACP];
#pragma DATA_SECTION(BUF_ADC_2,".slow_vars")
int BUF_ADC_2[SIZE_BUF_LOG_ACP];
#endif
#if (USE_INTERNAL_ADC==1)
#if(C_adc_number==1)
unsigned int const R_ADC[COUNT_ARR_ADC_BUF][16] = { R_ADC_DEFAULT_0,R_ADC_DEFAULT_INTERNAL };
unsigned int const K_LEM_ADC[COUNT_ARR_ADC_BUF][16] = { K_LEM_ADC_DEFAULT_0, K_LEM_ADC_DEFAULT_INTERNAL};
float const K_NORMA_ADC[COUNT_ARR_ADC_BUF][16] = { NORMA_ADC_DEFAULT_0, NORMA_ADC_DEFAULT_INTERNAL};
#endif
#if(C_adc_number==2)
unsigned int const R_ADC[COUNT_ARR_ADC_BUF][16] = { R_ADC_DEFAULT_0, R_ADC_DEFAULT_1,R_ADC_DEFAULT_INTERNAL };
unsigned int const K_LEM_ADC[COUNT_ARR_ADC_BUF][16] = { K_LEM_ADC_DEFAULT_0, K_LEM_ADC_DEFAULT_1, K_LEM_ADC_DEFAULT_INTERNAL };
float const K_NORMA_ADC[COUNT_ARR_ADC_BUF][16] = { NORMA_ADC_DEFAULT_0, NORMA_ADC_DEFAULT_1, NORMA_ADC_DEFAULT_INTERNAL };
#endif
#if(C_adc_number==3)
unsigned int const R_ADC[COUNT_ARR_ADC_BUF][16] = { R_ADC_DEFAULT_0, R_ADC_DEFAULT_1, R_ADC_DEFAULT_2,R_ADC_DEFAULT_INTERNAL };
unsigned int const K_LEM_ADC[COUNT_ARR_ADC_BUF][16] = { K_LEM_ADC_DEFAULT_0, K_LEM_ADC_DEFAULT_1, K_LEM_ADC_DEFAULT_2, K_LEM_ADC_DEFAULT_INTERNAL };
float const K_NORMA_ADC[COUNT_ARR_ADC_BUF][16] = { NORMA_ADC_DEFAULT_0, NORMA_ADC_DEFAULT_1, NORMA_ADC_DEFAULT_2, NORMA_ADC_DEFAULT_INTERNAL };
#endif
#else
#if(C_adc_number==1)
#pragma DATA_SECTION(R_ADC,".slow_vars")
unsigned int R_ADC[COUNT_ARR_ADC_BUF][16] = { R_ADC_DEFAULT_0 };
#pragma DATA_SECTION(K_LEM_ADC,".slow_vars")
unsigned int K_LEM_ADC[COUNT_ARR_ADC_BUF][16] = { K_LEM_ADC_DEFAULT_0};
#pragma DATA_SECTION(K_NORMA_ADC,".slow_vars")
float K_NORMA_ADC[COUNT_ARR_ADC_BUF][16] = { NORMA_ADC_DEFAULT_0};
#endif
#if(C_adc_number==2)
#pragma DATA_SECTION(R_ADC,".slow_vars")
unsigned int R_ADC[COUNT_ARR_ADC_BUF][16] = { R_ADC_DEFAULT_0, R_ADC_DEFAULT_1 };
#pragma DATA_SECTION(K_LEM_ADC,".slow_vars")
unsigned int K_LEM_ADC[COUNT_ARR_ADC_BUF][16] = { K_LEM_ADC_DEFAULT_0, K_LEM_ADC_DEFAULT_1 };
#pragma DATA_SECTION(K_NORMA_ADC,".slow_vars")
float K_NORMA_ADC[COUNT_ARR_ADC_BUF][16] = { NORMA_ADC_DEFAULT_0, NORMA_ADC_DEFAULT_1 };
#endif
#if(C_adc_number==3)
#pragma DATA_SECTION(R_ADC,".slow_vars")
unsigned int R_ADC[COUNT_ARR_ADC_BUF][16] = { R_ADC_DEFAULT_0, R_ADC_DEFAULT_1, R_ADC_DEFAULT_2 };
#pragma DATA_SECTION(K_LEM_ADC,".slow_vars")
unsigned int K_LEM_ADC[COUNT_ARR_ADC_BUF][16] = { K_LEM_ADC_DEFAULT_0, K_LEM_ADC_DEFAULT_1, K_LEM_ADC_DEFAULT_2 };
#pragma DATA_SECTION(K_NORMA_ADC,".slow_vars")
float K_NORMA_ADC[COUNT_ARR_ADC_BUF][16] = { NORMA_ADC_DEFAULT_0, NORMA_ADC_DEFAULT_1, NORMA_ADC_DEFAULT_2 };
#endif
#endif
//unsigned int const R_ADC_1[16] = R_ADC_DEFAULT_1;
//unsigned int const K_LEM_ADC_1[16] = K_LEM_ADC_DEFAULT_1;
#if (USE_INTERNAL_ADC==1)
int error_ADC[COUNT_ARR_ADC_BUF][16] = { {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} };
#else
#if(C_adc_number==1)
int error_ADC[COUNT_ARR_ADC_BUF][16] = { {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} };
#endif
#if(C_adc_number==2)
int error_ADC[COUNT_ARR_ADC_BUF][16] = { {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} };
#endif
#if(C_adc_number==3)
int error_ADC[COUNT_ARR_ADC_BUF][16] = { {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} };
#endif
#endif
#pragma DATA_SECTION(ADC_f,".fast_vars");
int ADC_f[COUNT_ARR_ADC_BUF][16];
#pragma DATA_SECTION(ADC_fast,".fast_vars");
int ADC_fast[COUNT_ARR_ADC_BUF][16][COUNT_ARR_ADC_BUF_FAST_POINT];
#pragma DATA_SECTION(ADC_sf,".fast_vars");
int ADC_sf[COUNT_ARR_ADC_BUF][16];
#pragma DATA_SECTION(analog,".fast_vars");
ANALOG_VALUE analog = ANALOG_VALUE_DEFAULT;
#pragma DATA_SECTION(filter,".fast_vars");
ANALOG_VALUE filter = ANALOG_VALUE_DEFAULT;
#pragma DATA_SECTION(analog_zero,".fast_vars");
ANALOG_VALUE analog_zero = ANALOG_VALUE_DEFAULT;
unsigned int const level_err_ADC_PLUS[16] = level_err_ADC_PLUS_default;
unsigned int const level_err_ADC_MINUS[16] = level_err_ADC_MINUS_default;
#pragma DATA_SECTION(err_adc_protect,".fast_vars");
#pragma DATA_SECTION(mask_err_adc_protect,".fast_vars");
ERR_ADC_PROTECT err_adc_protect[COUNT_ARR_ADC_BUF],mask_err_adc_protect[COUNT_ARR_ADC_BUF];
_iq koef_Im_filter=0;
_iq koef_Power_filter=0;
_iq koef_Power_filter2=0;
#pragma DATA_SECTION(k_norm_ADC,".slow_vars")
_iq19 k_norm_ADC[COUNT_ARR_ADC_BUF][16];
#pragma DATA_SECTION(iq19_zero_ADC,".fast_vars");
_iq19 iq19_zero_ADC[COUNT_ARR_ADC_BUF][16];
#pragma DATA_SECTION(zero_ADC,".slow_vars")
int zero_ADC[COUNT_ARR_ADC_BUF][16];
#pragma DATA_SECTION(iq19_k_norm_ADC,".fast_vars");
_iq19 iq19_k_norm_ADC[COUNT_ARR_ADC_BUF][16];
#pragma DATA_SECTION(iq_norm_ADC,".fast_vars");
_iq iq_norm_ADC[COUNT_ARR_ADC_BUF][16];
#pragma DATA_SECTION(iq_norm_ADC_sf,".fast_vars");
_iq iq_norm_ADC_sf[COUNT_ARR_ADC_BUF][16];
#pragma DATA_SECTION(koef_Uzpt_long_filter,".fast_vars");
_iq koef_Uzpt_long_filter=0;
#pragma DATA_SECTION(koef_Uzpt_fast_filter,".fast_vars");
_iq koef_Uzpt_fast_filter=0;
#pragma DATA_SECTION(koef_Uin_filter,".fast_vars");
_iq koef_Uin_filter=0;
void fast_detect_protect_ACP();
//void fast_read_all_adc_one(int cc);
//void fast_read_all_adc_more(void);
#if (USE_INTERNAL_ADC==1)
#pragma CODE_SECTION(adc_isr,".fast_run");
interrupt void adc_isr(void)
{
// unsigned char k;
static char l_ir=0;
static char step_acp=0;
//i_led1_on_off(1);
// i_led1_on_off(1);
project.adc->read_pbus(&project.adc[0]);
ADC_f[0][0] = project.adc[0].read.pbus.adc_value[0];
ADC_f[0][1] = project.adc[0].read.pbus.adc_value[1];
ADC_f[0][2] = project.adc[0].read.pbus.adc_value[2];
ADC_f[0][3] = project.adc[0].read.pbus.adc_value[3];
ADC_f[0][4] = project.adc[0].read.pbus.adc_value[4];
ADC_f[0][5] = project.adc[0].read.pbus.adc_value[5];
ADC_f[0][6] = project.adc[0].read.pbus.adc_value[6];
ADC_f[0][7] = project.adc[0].read.pbus.adc_value[7];
ADC_f[0][8] = project.adc[0].read.pbus.adc_value[8];
ADC_f[0][9] = project.adc[0].read.pbus.adc_value[9];
ADC_f[0][10] = project.adc[0].read.pbus.adc_value[10];
ADC_f[0][11] = project.adc[0].read.pbus.adc_value[11];
ADC_f[0][12] = project.adc[0].read.pbus.adc_value[12];
ADC_f[0][13] = project.adc[0].read.pbus.adc_value[13];
ADC_f[0][14] = project.adc[0].read.pbus.adc_value[14];
ADC_f[0][15] = project.adc[0].read.pbus.adc_value[15];
ADC_sf[0][0] += (ADC_f[0][0] - ADC_sf[0][0]) >> Shift_Filter;
ADC_sf[0][1] += (ADC_f[0][1] - ADC_sf[0][1]) >> Shift_Filter;
ADC_sf[0][2] += (ADC_f[0][2] - ADC_sf[0][2]) >> Shift_Filter;
ADC_sf[0][3] += (ADC_f[0][3] - ADC_sf[0][3]) >> Shift_Filter;
/*
if (ADC_sf[2][0]>ERR_LEVEL_ADC_PLUS || ADC_sf[2][0]<ERR_LEVEL_ADC_MINUS //�� ��������� � ADC_f �� ADC_f
|| ADC_sf[2][1]>ERR_LEVEL_ADC_PLUS || ADC_sf[2][1]<ERR_LEVEL_ADC_MINUS //��� ����������� ������ �� 26.08.2009
// || ADC_f[2]>ERR_LEVEL_ADC_PLUS || ADC_f[2]<ERR_LEVEL_ADC_MINUS
|| ADC_sf[2][3]>ERR_LEVEL_ADC_PLUS || ADC_sf[2][3]<ERR_LEVEL_ADC_MINUS
// || ADC_f[8]>ERR_LEVEL_ADC_PLUS || ADC_f[8]<ERR_LEVEL_ADC_MINUS
// || ADC_f[9]>ERR_LEVEL_ADC_PLUS || ADC_f[9]<ERR_LEVEL_ADC_MINUS
// || ADC_f[10]>ERR_LEVEL_ADC_PLUS || ADC_f[10]<ERR_LEVEL_ADC_MINUS
// || ADC_f[2][11]>ERR_LEVEL_ADC_PLUS_6 || ADC_f[2][11]<ERR_LEVEL_ADC_MINUS_6
)
{
// fast_detect_protect_ACP();
if (active_rect1.disable_error_pwm_start==0)
fast_detect_protect_ACP_internal();
}
*/
// time_adc++;
// Reinitialize for next ADC sequence
AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1; // Reset SEQ1
AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1; // Clear INT SEQ1 bit
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Acknowledge interrupt to PIE
// i_led1_on_off(0);
// i_led2_on_off(0);
//i_led1_on_off(0);
return;
}
// ��� �� ��� ���
#pragma CODE_SECTION(timer2_isr,".fast_run");
interrupt void timer2_isr(void)
{
//led2_on_off(1);
//i_led2_on_off(1);
// EvaTimer2InterruptCount++;
// Enable more interrupts from this timer
EvaRegs.EVAIMRB.bit.T2PINT = 1;
// Note: To be safe, use a mask value to write to the entire
// EVAIFRB register. Writing to one bit will cause a read-modify-write
// operation that may have the result of writing 1's to clear
// bits other then those intended.
EvaRegs.EVAIFRB.all = BIT0;
// Acknowledge interrupt to receive more interrupts from PIE group 3
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
// AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;
/*
ADC_filter[15] = 333;
// DOut(Error,1);
// GpioDataRegs.GPDTOGGLE.bit.GPIOD5=1;
EvaRegs.EVAIMRA.bit.T1PINT = 1;
EvaRegs.EVAIFRA.all=0x80;
PieCtrlRegs.PIEACK.bit.ACK2=1; // Issue PIE ack
EvbRegs.EVBIFRA.all = BIT7;
// Acknowledge interrupt to receive more interrupts from PIE group 4
PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;
*/
// i_led2_on_off(1);
//i_led2_on_off(0);
}
//---------------------------------------------------------------------------
// InitAdc:
//---------------------------------------------------------------------------
// This function initializes ADC to a known state.
//
void Init_Internal_Adc(void)
{
static float adc_period=0;
int k,i;
extern void DSP28x_usDelay(Uint32 Count);
// To powerup the ADC the ADCENCLK bit should be set first to enable
// clocks, followed by powering up the bandgap and reference circuitry.
// After a 5ms delay the rest of the ADC can be powered up. After ADC
// powerup, another 20us delay is required before performing the first
// ADC conversion. Please note that for the delay function below to
// operate correctly the CPU_CLOCK_SPEED define statement in the
// DSP28_Examples.h file must contain the correct CPU clock period in
// nanoseconds. For example:
// SQRT_32 = _IQ(0.8660254037844);
// CONST_23 = _IQ(2.0/3.0);
// CONST_15 = _IQ(1.5);
AdcRegs.ADCTRL3.bit.ADCPWDN = 0; // Power up rest of ADC
DELAY_US(ADC_usDELAY); // Delay before powering up rest of ADC
AdcRegs.ADCTRL3.bit.ADCBGRFDN = 0x0; // Power up bandgap/reference circuitry
DELAY_US(ADC_usDELAY); // Delay before powering up rest of ADC
DELAY_US(ADC_usDELAY); // Delay before powering up rest of ADC
DELAY_US(ADC_usDELAY); // Delay before powering up rest of ADC
DELAY_US(ADC_usDELAY); // Delay before powering up rest of ADC
AdcRegs.ADCTRL3.bit.EXTREF=0;
// DELAY_US(ADC_usDELAY); // Delay before powering up rest of ADC
// asm(� RPT #10 || NOP;�); // Time to enable of external ref
AdcRegs.ADCTRL3.bit.ADCBGRFDN = 0x3; // Power up bandgap/reference circuitry
DELAY_US(ADC_usDELAY); // Delay before powering up rest of ADC
AdcRegs.ADCTRL3.bit.ADCPWDN = 1; // Power up rest of ADC
DELAY_US(ADC_usDELAY2); // Delay after powering up ADC
AdcRegs.ADCTRL1.bit.ACQ_PS=0x0;
AdcRegs.ADCTRL1.bit.CPS = 0; // Core clock prescaler. The prescaler is applied to divided device peripheral clock
// AdcRegs.ADCTRL1.bit.CONT_RUN = 0; // Continues run
// AdcRegs.ADCTRL3.bit.ADCCLKPS=0;
// Configure ADC
AdcRegs.ADCTRL3.bit.ADCCLKPS=0x3;
AdcRegs.ADCTRL1.bit.SEQ_CASC=1; // cascaded mode
AdcRegs.ADCMAXCONV.all = 0x000f; // Setup 16 conv's on SEQ1
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0; // Setup ADCINA3 as 1st SEQ1 conv.
AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x1; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 0x2; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 0x3; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ2.bit.CONV04 = 0x4; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ2.bit.CONV05 = 0x5; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ2.bit.CONV06 = 0x6; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ2.bit.CONV07 = 0x7; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ3.bit.CONV08 = 0x8; // Setup ADCINA3 as 1st SEQ1 conv.
AdcRegs.ADCCHSELSEQ3.bit.CONV09 = 0x9; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ3.bit.CONV10 = 0xa; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ3.bit.CONV11 = 0xb; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ4.bit.CONV12 = 0xc; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ4.bit.CONV13 = 0xd; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ4.bit.CONV14 = 0xe; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ4.bit.CONV15 = 0xf; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCTRL2.bit.EVA_SOC_SEQ1 = 1; // Enable EVASOC to start SEQ1
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; // Enable SEQ1 interrupt (every EOS)
// AdcRegs.ADCTRL2.bit.EVA_SOC_SEQ1 = 1; // Enable EVASOC to start SEQ1
// AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; // Enable SEQ1 interrupt (every EOS)
// Enable ADCINT in PIE
EALLOW;
PieCtrlRegs.PIEIER1.bit.INTx6 = 1;
IER |= M_INT1; // Enable CPU Interrupt 1
PieVectTable.ADCINT = &adc_isr;
EDIS;
EALLOW;
PieVectTable.T2PINT = &timer2_isr;
// Initialize EVA Timer 2:
// Setup Timer 2 Registers (EV A)
EvaRegs.GPTCONA.all = 0;
// Set the Period for the GP timer 2 to 0x0200;
adc_period = (float)HSPCLK/(float)FREQ_ADC;
EvaRegs.T2PR = adc_period; // Period
EvaRegs.T2CMPR = 0x0000; // Compare Reg
// Enable Period interrupt bits for GP timer 2
// Count up, x128, internal clk, enable compare, use own period
EvaRegs.EVAIMRB.bit.T2PINT = 1;// 1;
EvaRegs.EVAIFRB.bit.T2PINT = 1;//1;
// Clear the counter for GP timer 2
EvaRegs.T2CNT = 0x0000;
EvaRegs.T2CON.all = 0x1042;
// Start EVA ADC Conversion on timer 2 Period interrupt
EvaRegs.GPTCONA.bit.T2TOADC = 1;
// Enable PIE group 3 interrupt 1 for T2PINT
PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
// Enable CPU INT2 for T1PINT, INT3 for T2PINT, INT4 for T3PINT
// and INT5 for T4PINT:
IER |= (M_INT3);
EDIS;
// Start SEQ1
// AdcRegs.ADCTRL2.all = 0x2000;
// EvaRegs.T1CON.bit.TENABLE=1;
for (k=0;k<16;k++)
{
// ADC_filter[k]=0;
ADC_f[2][k]=0;
ADC_sf[2][k]=0;
k_norm_ADC[2][k] = _IQ19(K_LEM_ADC[2][k]*3.0/R_ADC[2][k]/4096.0);
// iq_k_norm_ADC[k] = _IQ(K_LEM_ADC[k]*300.0/R_ADC[k]/NORMA_ACP);
iq19_k_norm_ADC[2][k] = _IQ19(K_LEM_ADC[2][k]*300.0/R_ADC[2][k]/K_NORMA_ADC[2][k]/4096.0);
iq19_zero_ADC[2][k]=_IQ19(2100);//_IQ19(1770);
zero_ADC[2][k]=2100;//1835;
}
for (i=0;i<4;i++)
zero_ADC[2][i]=1768;//1770;
for (i=4;i<16;i++)
zero_ADC[2][i]=2130;
zero_ADC[2][0]=1787;
zero_ADC[2][1]=1774;
for (i=0;i<16;i++)
iq19_zero_ADC[2][i]=_IQ19(zero_ADC[2][i]);
// koef_allADC_filter = _IQ19(0.00002/0.00003185);//koef_ADC_filter[0];
// koef_zero_ADC_filter=_IQ19(0.00002/0.0003185);
// koef_Ud_long_filter = _IQ(0.001/0.016666);
// koef_Ud_fast_filter = _IQ(0.001/0.00931); //_IQ(0.001/0.00131);
// koef_Im_filter = _IQ(0.001/0.006);
// koef_Im_filter = _IQ(0.001/0.065);
// koef_Iabc_filter = _IQ(0.001/0.006);
mask_err_adc_protect[2].plus.all=0;
mask_err_adc_protect[2].minus.all=0x0;
// mask_err_adc_protect.minus.all=0xffff; // ����. ������ �� ���� �� ������
// mask_err_adc_protect.plus.all=0xffff; // ����. ������ �� ���� �� �����
err_adc_protect[2].plus.all=0;
err_adc_protect[2].minus.all=0x0;
AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;
}
#endif
//#pragma DATA_SECTION(buf_U1_3point,".fast_vars");
//_iq buf_U1_3point[3]={0,0,0};
//#pragma CODE_SECTION(filter_U1_3point,".fast_run");
//_iq filter_U1_3point(_iq d)
//{
// _iq maxU, minU, sumU;
//
// buf_U1_3point[2] = buf_U1_3point[1];
// buf_U1_3point[1] = buf_U1_3point[0];
// buf_U1_3point[0] = d;
//
// maxU = d;
// minU = d;
//
//
// if (buf_U1_3point[1]>maxU) maxU = buf_U1_3point[1];
// if (buf_U1_3point[2]>maxU) maxU = buf_U1_3point[2];
//
// if (buf_U1_3point[1]<minU) minU = buf_U1_3point[1];
// if (buf_U1_3point[2]<minU) minU = buf_U1_3point[2];
//
// sumU = buf_U1_3point[0] + buf_U1_3point[1] + buf_U1_3point[2] - maxU - minU;
//
// return sumU;
//}
//---------------------------------------------------------------------------
// InitAdc:
//---------------------------------------------------------------------------
// This function initializes ADC to a known state.
//
void Init_Adc_Variables(void)
{
unsigned int k,i,j;
int *panalog, *pfilter;
volatile float k_f;
for (i=0;i<COUNT_ARR_ADC_BUF;i++)
{
for (k=0;k<16;k++)
{
ADC_f[i][k]=0;
ADC_sf[i][k]=0;
for (j=0;j<COUNT_ARR_ADC_BUF_FAST_POINT;j++)
ADC_fast[i][k][j]=0;
k_f = K_LEM_ADC[i][k]*2.5/R_ADC[i][k]/4096.0;
k_norm_ADC[i][k] = _IQ19(k_f);
k_f = K_LEM_ADC[i][k]*250.0/R_ADC[i][k]/K_NORMA_ADC[i][k]/4096.0;
iq19_k_norm_ADC[i][k] = _IQ19(k_f);
zero_ADC[i][k] = DEFAULT_ZERO_ADC;//1835;
iq19_zero_ADC[i][k] = _IQ19 (zero_ADC[i][k]); //_IQ19(2030);//_IQ19(1770);
}
}
panalog = (int*)&analog;
pfilter = (int*)&filter;
for (k=0;k < sizeof(ANALOG_VALUE)/sizeof(int) ;k++)
{
*(panalog + k) = 0;
*(pfilter + k) = 0;
}
for (i=0;i<COUNT_ARR_ADC_BUF;i++)
{
if (project.adc[i].status >= component_Ready)
detect_zero_analog(i);
}
// zero_ADC[1][2] = 2010;//1976; // uab
// zero_ADC[1][3] = 2010;//1989; // ubc
// zero_ADC[1][4] = 2010;//1994; // uca
zero_ADC[0][0]=zero_ADC[0][2];//2042;//1992;//1835; //uzpt
zero_ADC[0][1]=zero_ADC[0][2];//2042;//1992;//1835; //uzpt
#if (COUNT_ARR_ADC_BUF>1)
zero_ADC[1][1]=zero_ADC[1][15];
zero_ADC[1][2]=zero_ADC[1][15];
zero_ADC[1][3]=zero_ADC[1][15];
zero_ADC[1][4]=zero_ADC[1][15];
zero_ADC[1][5]=zero_ADC[1][15];
zero_ADC[1][6]=zero_ADC[1][15];
zero_ADC[1][7]=zero_ADC[1][15];
zero_ADC[1][8]=zero_ADC[1][15];
zero_ADC[1][9]=zero_ADC[1][15];
zero_ADC[1][10]=zero_ADC[1][15];
zero_ADC[1][11]=zero_ADC[1][15];
zero_ADC[1][12]=zero_ADC[1][15];
zero_ADC[1][13]=zero_ADC[1][15];
zero_ADC[1][14]=zero_ADC[1][15];
#endif
for (k=0;k<16;k++)
{
for (i=0;i<COUNT_ARR_ADC_BUF;i++)
{
if ((zero_ADC[i][k]>2200) || (zero_ADC[i][k]<1900))
zero_ADC[i][k] = DEFAULT_ZERO_ADC;
}
}
for (k=0;k<16;k++)
{
for (i=0;i<COUNT_ARR_ADC_BUF;i++)
{
iq19_zero_ADC[i][k]=_IQ19(zero_ADC[i][k]);//_IQ19(1770);
}
}
// koef_allADC_filter = _IQ19(0.00002/0.00003185);//koef_ADC_filter[0];
// koef_zero_ADC_filter=_IQ19(0.00002/0.0003185);
koef_Uzpt_long_filter = _IQ(0.001/0.016666);
koef_Uzpt_fast_filter = _IQ(0.001/0.002); //_IQ(0.001/0.00131);
koef_Uin_filter = _IQ(0.001/0.00931);
// koef_Im_filter = _IQ(0.001/0.006);
koef_Im_filter = _IQ(0.001/0.065);
koef_Power_filter = _IQ(0.001/0.065);
koef_Power_filter2 = _IQ(0.001/0.2);
// koef_Iabc_filter = _IQ(0.001/0.006);
filter.iqU_1_fast = 0;
filter.iqU_1_long = 0;
filter.iqU_2_fast = 0;
filter.iqU_2_long = 0;
filter.iqUin_m1 = 0;
filter.iqUin_m2 = 0;
// filter.iqU_3_fast = 0;
// filter.iqU_4_fast = 0;
// filter.iqU_1_long = 0;
// filter.iqU_2_long = 0;
// filter.iqU_3_long = 0;
// filter.iqU_4_long = 0;
// filter.iqIin_1 = 0;
// filter.iqIin_2 = 0;
filter.iqIm_1 = 0;
filter.iqIm_2 = 0;
// filter.iqUin_m1 = 0;
// filter.iqUin_m2 = 0;
for (i=0;i<COUNT_ARR_ADC_BUF;i++)
{
mask_err_adc_protect[i].plus.all=0;
mask_err_adc_protect[i].minus.all=0x0;
err_adc_protect[i].plus.all=0;
err_adc_protect[i].minus.all=0x0;
}
#if (USE_INTERNAL_ADC==1)
Init_Internal_Adc();
#endif
}
#pragma CODE_SECTION(detect_protect_ACP_plus,".fast_run");
void detect_protect_ACP_plus(unsigned char nacp, unsigned char nc)
{
unsigned long mask;
mask=(unsigned int)(1 << nc);
if (mask_err_adc_protect[nacp].plus.all & mask) return;
// led1_on_off(1);
// led1_on_off(0);
// EvaRegs.COMCONA.all = 0xa400;//0xA600; // Init COMCONA Register
// EvbRegs.COMCONB.all = 0xa400;//0xA600; // Init COMCONA Register
// pwm_tms.stop_all(&pwm_tms);
// f.Restart=0;
// led1_on_off(1);
// stop_pwm();
if (err_adc_protect[nacp].plus.all==0 )
err_adc_protect[nacp].plus.all |= mask;
// led2_on_off(0);
}
#pragma CODE_SECTION(detect_protect_ACP_minus,".fast_run");
void detect_protect_ACP_minus(unsigned char nacp, unsigned char nc)
{
unsigned long mask;
mask=(unsigned int)(1 << nc);
if (mask_err_adc_protect[nacp].minus.all & mask) return;
// EvaRegs.COMCONA.all = 0xa400;//0xA600; // Init COMCONA Register
// EvbRegs.COMCONB.all = 0xa400;//0xA600; // Init COMCONA Register
// pwm_tms.stop_all(&pwm_tms);
// f.Restart=0;
if (err_adc_protect[nacp].minus.all==0 )
err_adc_protect[nacp].minus.all |= mask;
}
#pragma CODE_SECTION(fast_detect_protect_ACP,".fast_run");
void read_error_ACP()
{
int i,k;
// T_cds_paralle_bus_read_all* pr;
// pr = project.controller.fpga.cds_fpga_parallel_bus.pread;
for (i=0;i<COUNT_ARR_ADC_BUF;i++)
{
if (project.adc[i].status == component_Ready)
for (k=0;k<16;k++)
{
// if (pr->error_counts.adc_0)
// if (ADC_sf[i][k] >= ERR_LEVEL_ADC_PLUS) detect_protect_ACP_plus (i, k);
// if (ADC_sf[i][k] <= ERR_LEVEL_ADC_MINUS) detect_protect_ACP_minus(i, k);
}
}
}
#if (USE_INTERNAL_ADC==1)
#pragma CODE_SECTION(fast_detect_protect_ACP_internal,".fast_run");
void fast_detect_protect_ACP_internal(void)
{
int k;
k=0;
if (ADC_sf[COUNT_ARR_ADC_BUF-1][k] >= ERR_LEVEL_ADC_PLUS) detect_protect_ACP_plus (2, k);
if (ADC_sf[COUNT_ARR_ADC_BUF-1][k] <= ERR_LEVEL_ADC_MINUS) detect_protect_ACP_minus(2, k);
k=1;
if (ADC_sf[COUNT_ARR_ADC_BUF-1][k] >= ERR_LEVEL_ADC_PLUS) detect_protect_ACP_plus (2, k);
if (ADC_sf[COUNT_ARR_ADC_BUF-1][k] <= ERR_LEVEL_ADC_MINUS) detect_protect_ACP_minus(2, k);
k=3;
if (ADC_sf[COUNT_ARR_ADC_BUF-1][k] >= ERR_LEVEL_ADC_PLUS) detect_protect_ACP_plus (2, k);
if (ADC_sf[COUNT_ARR_ADC_BUF-1][k] <= ERR_LEVEL_ADC_MINUS) detect_protect_ACP_minus(2, k);
}
#endif
#pragma CODE_SECTION(fast_detect_protect_ACP,".fast_run");
void fast_detect_protect_ACP()
{
int i,k;
// for (i=0;i<2;i++)
{
// if (project.adc[i].status == component_Ready)
#if(C_adc_number>=1)
i = 0;
for (k=0;k<14;k++)
{
if (ADC_f[i][k] >= ERR_LEVEL_ADC_PLUS) detect_protect_ACP_plus (i, k);
if (ADC_f[i][k] <= ERR_LEVEL_ADC_MINUS) detect_protect_ACP_minus(i, k);
}
#endif
#if(C_adc_number>=2)
i = 1;
for (k=2;k<5;k++)
{
if (ADC_f[i][k] >= ERR_LEVEL_ADC_PLUS) detect_protect_ACP_plus (i, k);
if (ADC_f[i][k] <= ERR_LEVEL_ADC_MINUS) detect_protect_ACP_minus(i, k);
}
#endif
#if(C_adc_number>=3)
i = 2;
for (k=0;k<15;k++)
{
if (ADC_f[i][k] >= ERR_LEVEL_ADC_PLUS) detect_protect_ACP_plus (i, k);
if (ADC_f[i][k] <= ERR_LEVEL_ADC_MINUS) detect_protect_ACP_minus(i, k);
}
#endif
}
}
#pragma CODE_SECTION(norma_adc,".fast_run");
inline _iq norma_adc(int plane, int chan)
{
// return _IQ19toIQ(_IQ19mpy((iq19_zero_ADC[n_norm] - ((long)ADC_sf[plane][chan]<<19) ),iq19_k_norm_ADC[n_norm]));
return _IQ19toIQ(_IQ19mpy((((long)ADC_f[plane][chan]<<19) - iq19_zero_ADC[plane][chan]),iq19_k_norm_ADC[plane][chan]));
}
#if (USE_INTERNAL_ADC==1)
#pragma CODE_SECTION(norma_adc_internal_sf,".fast_run2");
_iq norma_adc_internal_sf(int l)
{
return _IQ19toIQ(_IQ19mpy((((long)ADC_sf[2][l]<<19) - iq19_zero_ADC[2][l]),iq19_k_norm_ADC[2][l]));
}
#endif
/////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////
//
//#pragma CODE_SECTION(fast_read_all_adc_one,".fast_run");
//void fast_read_all_adc_one(int cc)
//{
// int i,k;
// int t;
//
// i_led1_on_off(1);
//
// project.adc[0].read_pbus(&project.adc[0]);
//
// for (k=0;k<16;k++)
// {
// t = project.adc[0].read.pbus.adc_value[k];
// ADC_fast[0][k][cc] = t;
//
// // save max values
// if (t>ADC_fast[0][k][1] || cc==3)
// ADC_fast[0][k][1] = t;
// // save min values
// if (t<ADC_fast[0][k][2] || cc==3)
// ADC_fast[0][k][2] = t;
// }
//
//
//
//
//
////i_led2_off();
// i_led1_on_off(0);
//
//}
//#pragma CODE_SECTION(fast_read_all_adc_two,".fast_run");
//void fast_read_all_adc_two(void)
//{
// int i,k;
// int t;
//
//// i_led2_on_off(1);
//
// project.adc[1].read_pbus(&project.adc[1]);
//
// for (k=0;k<16;k++)
// {
// t = project.adc[1].read.pbus.adc_value[k];
// ADC_fast[1][k][0] = t;
// }
//
//// i_led2_on_off(0);
//
//}
/////////////////////////////////////////////////////////
//#define PAUSE_BETWEEN_ADC_FAST 5
//#pragma CODE_SECTION(fast_read_all_adc_more,".fast_run");
//void fast_read_all_adc_more(void)
//{
// int i,k;
// static int p = PAUSE_BETWEEN_ADC_FAST;
//
// project.read_errors_controller();
//
// if (project.adc[0].status == component_Ready
// && project.controller.read.errors.bit.error_pbus == 0
// && project.controller.read.errors_buses.bit.slave_addr_error==0
// && project.x_parallel_bus->flags.bit.error==0 )
// {
//
//
//
// fast_read_all_adc_one(3);
// pause_1000(p);
// fast_read_all_adc_one(4);
// pause_1000(p);
// fast_read_all_adc_one(5);
// pause_1000(p);
// fast_read_all_adc_one(6);
// pause_1000(p);
// fast_read_all_adc_one(7);
// pause_1000(p);
// fast_read_all_adc_one(8);
//
//
//
// for (k=0;k<16;k++)
// {
// ADC_fast[0][k][0] = (-ADC_fast[0][k][1] - ADC_fast[0][k][2] + ADC_fast[0][k][3] + ADC_fast[0][k][4]
// +ADC_fast[0][k][5] + ADC_fast[0][k][6] + ADC_fast[0][k][7] + ADC_fast[0][k][8]) >> 2; // ����� ����� �� 4
// }
//
// }
// else
// {
// for (k=0;k<16;k++)
// {
// ADC_fast[0][k][0] = 5000; // error
// }
// }
//
//
// if (project.adc[1].status == component_Ready
// && project.controller.read.errors.bit.error_pbus == 0
// && project.controller.read.errors_buses.bit.slave_addr_error==0
// && project.x_parallel_bus->flags.bit.error==0 )
// {
//
// fast_read_all_adc_two();
// }
// else
// {
// for (k=0;k<16;k++)
// {
// ADC_fast[1][k][0] = 5000; // error
// }
// }
//
//}
/////////////////////////////////////////////////////////
//
//#pragma CODE_SECTION(norma_fast_adc,".fast_run");
//void norma_fast_adc(void)
//{
// int i,k;
//// int bb;
//
//#ifdef LOG_ACP_TO_BUF
// static int c_log=0;
// static int n_log_acp_p=0;
// static int n_log_acp_c=2;
// static int n_log_acp_p_2=0;
// static int n_log_acp_c_2=2;
//
//#endif
//
// for (i=0;i<COUNT_ARR_ADC_BUF_EXTERNAL;i++)
// {
//
// if ( project.adc[i].status == component_Ready
// && project.controller.read.errors.bit.error_pbus == 0
// && project.controller.read.errors_buses.bit.slave_addr_error==0
// && project.x_parallel_bus->flags.bit.error==0 )
// {
// for (k=0;k<16;k++)
// {
// iq_norm_ADC[i][k] = _IQ19toIQ(_IQ19mpy((-iq19_zero_ADC[i][k] + ((long)ADC_fast[i][k][0]<<19) ),iq19_k_norm_ADC[i][k]));
// }
// }
// else
// {
// for (k=0;k<16;k++)
// {
// iq_norm_ADC[i][k] = 0;
// }
//
// }
//
// }
//
//#ifdef LOG_ACP_TO_BUF
// if (c_log>=SIZE_BUF_LOG_ACP)
// c_log=0;
// BUF_ADC[c_log]=ADC_fast[n_log_acp_p][n_log_acp_c][0];
// BUF_ADC_2[c_log]=ADC_fast[n_log_acp_p_2][n_log_acp_c_2][3];
// c_log++;
//#endif
//
////i_led2_off();
//}
/////////////////////////////////////////////////////////
/*
#pragma CODE_SECTION(norma_all_adc,".fast_run");
void norma_all_adc(void)
{
int i,k;
// int bb;
#ifdef LOG_ACP_TO_BUF
static int c_log=0;
static int n_log_acp_p=0;
static int n_log_acp_c=2;
static int n_log_acp_p_2=0;
static int n_log_acp_c_2=5;
#endif
for (i=0;i<COUNT_ARR_ADC_BUF;i++)
{
project.read_errors_controller();
project.adc[i].read_pbus(&project.adc[i]);
// project.adc->read_pbus(&project.adc[i]);
if ( project.adc[i].status == component_Ready
&& project.controller.read.errors.bit.error_pbus == 0
&& project.controller.read.errors_buses.bit.slave_addr_error==0
&& project.x_parallel_bus->flags.bit.error==0 )
{
for (k=0;k<16;k++)
{
// ADC_f[i][k] = (int)pr->data.adc[i].acc_short[k];
#ifdef ADC_READ_FROM_PARALLEL_BUS
ADC_f[i][k] = project.adc[i].read.pbus.adc_value[k];
ADC_sf[i][k] += (((int)(ADC_f[i][k] - ADC_sf[i][k]))>>SDVIG_K_FILTER_S);
#else
// ADC_f[i][k] = project.adc[i].fpga.read.channels[k].value.acc_short;//iq_norm_ADC[i][k] = _IQ19toIQ(_IQ19mpy((iq19_zero_ADC[i][k] - ((long)project.adc[i].fpga.read.channels[k].value.acc_short<<19) ),iq19_k_norm_ADC[i][k]));
#endif
iq_norm_ADC[i][k] = _IQ19toIQ(_IQ19mpy((-iq19_zero_ADC[i][k] + ((long)ADC_f[i][k]<<19) ),iq19_k_norm_ADC[i][k]));
// iq_norm_ADC_sf[i][k] = _IQ19toIQ(_IQ19mpy((iq19_zero_ADC[i][k] - ((long)ADC_sf[i][k]<<19) ),iq19_k_norm_ADC[i][k]));
}
}
else
{
for (k=0;k<16;k++)
{
ADC_f[i][k] = 5000;//DEFAULT_ZERO_ADC;
ADC_sf[i][k] = 5000;//DEFAULT_ZERO_ADC;
iq_norm_ADC[i][k] = 0;
}
}
}
#ifdef LOG_ACP_TO_BUF
if (c_log>=SIZE_BUF_LOG_ACP)
c_log=0;
BUF_ADC[c_log]=ADC_f[n_log_acp_p][n_log_acp_c];
BUF_ADC_2[c_log]=ADC_f[n_log_acp_p_2][n_log_acp_c_2];
c_log++;
#endif
#if (USE_INTERNAL_ADC==1)
iq_norm_ADC[COUNT_ARR_ADC_BUF-1][0] = norma_adc_internal_sf(0);
iq_norm_ADC[COUNT_ARR_ADC_BUF-1][1] = norma_adc_internal_sf(1);
iq_norm_ADC[COUNT_ARR_ADC_BUF-1][3] = norma_adc_internal_sf(3);
#endif
//i_led2_off();
}
*/
////////////////////////////////////////////////////////////////////
#pragma CODE_SECTION(norma_adc_nc,".fast_run");
void norma_adc_nc(int nc)
{
int k;
// int bb;
project.read_errors_controller();
project.adc[nc].read_pbus(&project.adc[nc]);
if ( project.adc[nc].status == component_Ready
&& project.controller.read.errors.bit.error_pbus == 0
&& project.controller.read.errors_buses.bit.slave_addr_error==0
&& project.x_parallel_bus->flags.bit.error==0 )
{
for (k=0;k<16;k++)
{
ADC_f[nc][k] = project.adc[nc].read.pbus.adc_value[k];
ADC_sf[nc][k] += (((int)(ADC_f[nc][k] - ADC_sf[nc][k]))>>SDVIG_K_FILTER_S);
iq_norm_ADC[nc][k] = _IQ19toIQ(_IQ19mpy((-iq19_zero_ADC[nc][k] + ((long)ADC_f[nc][k]<<19) ),iq19_k_norm_ADC[nc][k]));
}
}
else
{
for (k=0;k<16;k++)
{
ADC_f[nc][k] = 5000;//DEFAULT_ZERO_ADC;
ADC_sf[nc][k] = 5000;//DEFAULT_ZERO_ADC;
iq_norm_ADC[nc][k] = 0;
}
}
}
////////////////////////////////////////////////////////////////////
#pragma CODE_SECTION(calc_norm_ADC_1,".fast_run");
void calc_norm_ADC_1(int run_norma)
{
_iq a1,a2,a3;
#if (USE_ADC_1)
if (run_norma)
norma_adc_nc(1);
#if (_FLOOR6==1)
analog.T_U01 =
analog.T_U02 =
analog.T_U03 =
analog.T_U04 =
analog.T_U05 =
analog.T_U06 =
analog.T_U07 =
analog.T_Water_external =
analog.T_Water_internal =
analog.P_Water_internal =
analog.T_Air_01 =
analog.T_Air_02 =
analog.T_Air_03 =
analog.T_Air_04 = 0;
#else
analog.T_U01 = iq_norm_ADC[1][1];
analog.T_U02 = iq_norm_ADC[1][2];
analog.T_U03 = iq_norm_ADC[1][3];
analog.T_U04 = iq_norm_ADC[1][4];
analog.T_U05 = iq_norm_ADC[1][5];
analog.T_U06 = iq_norm_ADC[1][6];
analog.T_U07 = iq_norm_ADC[1][7];
analog.T_Water_external = iq_norm_ADC[1][9];
analog.T_Water_internal = iq_norm_ADC[1][8];
analog.P_Water_internal = iq_norm_ADC[1][14];
analog.T_Air_01 = iq_norm_ADC[1][10];
analog.T_Air_02 = iq_norm_ADC[1][11];
analog.T_Air_03 = iq_norm_ADC[1][12];
analog.T_Air_04 = iq_norm_ADC[1][13];
#endif
#else
analog.T_U01 =
analog.T_U02 =
analog.T_U03 =
analog.T_U04 =
analog.T_U05 =
analog.T_U06 =
analog.T_U07 =
analog.T_Water_external =
analog.T_Water_internal =
analog.P_Water_internal =
analog.T_Air_01 =
analog.T_Air_02 =
analog.T_Air_03 =
analog.T_Air_04 = 0;
#endif
// analog.iqI_vozbud = iq_norm_ADC[1][13];
}
////////////////////////////////////////////////////////////////////
#pragma CODE_SECTION(calc_norm_ADC_0,".fast_run");
void calc_norm_ADC_0(int run_norma)
{
_iq a1,a2,a3;
#if (USE_ADC_0)
if (run_norma)
norma_adc_nc(0);
#if (_FLOOR6)
analog.iqU_1 = iq_norm_ADC[0][0] - analog_zero.iqU_1 + analog.iqU_1_imit;
analog.iqU_2 = iq_norm_ADC[0][1] - analog_zero.iqU_2 + analog.iqU_1_imit;
#else
analog.iqU_1 = iq_norm_ADC[0][0] - analog_zero.iqU_1;
analog.iqU_2 = iq_norm_ADC[0][1] - analog_zero.iqU_2;
#endif
analog.iqIu_1 = iq_norm_ADC[0][2];
analog.iqIv_1 = iq_norm_ADC[0][3];
analog.iqIw_1 = iq_norm_ADC[0][4];
analog.iqIu_2 = iq_norm_ADC[0][5];
analog.iqIv_2 = iq_norm_ADC[0][6];
analog.iqIw_2 = iq_norm_ADC[0][7];
analog.iqIin_1 = -iq_norm_ADC[0][9]; // ������ ����������
analog.iqIin_2 = -iq_norm_ADC[0][9]; // ������ ����������
analog.iqUin_A1B1 = iq_norm_ADC[0][10];
// ��� �������� ����������� �������� 23550.1 ����� ���������� - �� �����
// 23550.1
analog.iqUin_B1C1 = iq_norm_ADC[0][11]; // 23550.1
analog.iqUin_A2B2 = iq_norm_ADC[0][12]; // 23550.1
// 23550.3 bs1 bs2
// analog.iqUin_B1C1 = iq_norm_ADC[0][12]; // 23550.3
// analog.iqUin_A2B2 = iq_norm_ADC[0][11]; // 23550.3
//
analog.iqUin_B2C2 = iq_norm_ADC[0][13];
analog.iqIbreak_1 = iq_norm_ADC[0][14];
analog.iqIbreak_2 = iq_norm_ADC[0][15];
#else
analog.iqU_1 = analog.iqIu_1 = analog.iqIu_2 = analog.iqIv_1 = analog.iqIv_2 =
analog.iqIw_1 = analog.iqIw_2 = analog.iqIin_1 = analog.iqIin_2 = analog.iqUin_A1B1 =
analog.iqUin_B1C1 = analog.iqUin_A2B2 = analog.iqUin_B2C2 = analog.iqIbreak_1 = analog.iqIbreak_2
= 0;
#endif
analog.iqUin_C1A1 = -(analog.iqUin_A1B1 + analog.iqUin_B1C1);
analog.iqUin_C2A2 = -(analog.iqUin_A2B2 + analog.iqUin_B2C2);
filter.iqU_1_long = exp_regul_iq(koef_Uzpt_long_filter, filter.iqU_1_long, analog.iqU_1);
filter.iqU_2_long = exp_regul_iq(koef_Uzpt_long_filter, filter.iqU_2_long, analog.iqU_2);
// analog.iqU_1_fast = filter_U1_3point(analog.iqU_1_fast);
filter.iqU_1_fast = exp_regul_iq(koef_Uzpt_fast_filter, filter.iqU_1_fast, analog.iqU_1);
filter.iqU_2_fast = exp_regul_iq(koef_Uzpt_fast_filter, filter.iqU_2_fast, analog.iqU_2);
// filter.iqUzpt_2_2_fast = exp_regul_iq(koef_Uzpt_fast_filter, filter.iqUzpt_2_2_fast, analog.iqUzpt_2_2);
//15
analog.iqIm_1 = im_calc(analog.iqIu_1, analog.iqIv_1, analog.iqIw_1);
analog.iqIm_2 = im_calc(analog.iqIu_2, analog.iqIv_2, analog.iqIw_2);
analog.iqIu = analog.iqIu_1+analog.iqIu_2;
analog.iqIv = analog.iqIv_1+analog.iqIv_2;
analog.iqIw = analog.iqIw_1+analog.iqIw_2;
analog.iqIm = im_calc(analog.iqIu, analog.iqIv, analog.iqIw);
analog.iqIin_sum = analog.iqIin_1+analog.iqIin_2;
// analog.iqIm_3 = im_calc(analog.iqIa1_1_fir_n+analog.iqIa2_1_fir_n, analog.iqIb1_1_fir_n+analog.iqIb2_1_fir_n, analog.iqIc1_1_fir_n+analog.iqIc2_1_fir_n);
analog.iqUin_m1 = im_calc(analog.iqUin_A1B1, analog.iqUin_B1C1, analog.iqUin_C1A1);
analog.iqUin_m2 = im_calc(analog.iqUin_A2B2, analog.iqUin_B2C2, analog.iqUin_C2A2);
// analog.iqUin_m2 = im_calc(analog.UinA2, analog.UinB2, analog.UinC2);
filter.iqUin_m1 = exp_regul_iq(koef_Uin_filter, filter.iqUin_m1, analog.iqUin_m1);
filter.iqUin_m2 = exp_regul_iq(koef_Uin_filter, filter.iqUin_m2, analog.iqUin_m2);
// i_led1_on_off(0);
// i_led1_on_off(1);
//1
filter.iqIm_1 = exp_regul_iq(koef_Im_filter, filter.iqIm_1, analog.iqIm_1);
filter.iqIm_2 = exp_regul_iq(koef_Im_filter, filter.iqIm_2, analog.iqIm_2);
filter.iqIm = exp_regul_iq(koef_Im_filter, filter.iqIm, analog.iqIm);
filter.iqIin_sum = exp_regul_iq(koef_Im_filter, filter.iqIin_sum, analog.iqIin_sum);
//3
// filter_batter2_Iin.InpVarCurr = (analog.iqIin_1)-ZERO_I_IN;
// filter_batter2_Iin.calc(&filter_batter2_Iin);
// filter.iqIin = _IQmpy(filter_batter2_Iin.Out,_IQ_09);
filter.iqIin_1 = exp_regul_iq(koef_Im_filter, filter.iqIin_1, analog.iqIin_1);
filter.iqIin_2 = exp_regul_iq(koef_Im_filter, filter.iqIin_2, analog.iqIin_2);
a1 = analog.iqU_1+analog.iqU_2;
a2 = analog.iqIin_1;
a3 = _IQmpy(a1,a2);
analog.PowerScalar = a3;
// filter.Power = analog.iqU_1+analog.iqU_2;
filter.PowerScalar = exp_regul_iq(koef_Power_filter, filter.PowerScalar, analog.PowerScalar);
filter.PowerScalarFilter2 = exp_regul_iq(koef_Power_filter2, filter.PowerScalarFilter2, filter.PowerScalar);
}
#pragma DATA_SECTION(acp_zero,".slow_vars")
_iq19 acp_zero[16];
#pragma DATA_SECTION(acp_summ,".slow_vars")
long acp_summ[16];
/********************************************************************/
/* ����������� ���y ��������� ��� */
/********************************************************************/
void detect_zero_analog(int nc)
{
long i,k;
_iq koef_zero_ADC_filter = _IQ19(0.00002/0.0003185);
for (k=0;k<16;k++)
{
acp_zero[k] = 0;
acp_summ[k] = 0;
}
for (i=0; i<COUNT_DETECT_ZERO; i++)
{
// norma_all_adc();
norma_adc_nc(nc);
// norma_adc_nc(1);
for (k=0;k<16;k++)
{
acp_zero[k] = exp_regul_iq(koef_zero_ADC_filter, acp_zero[k], ((long)ADC_f[nc][k]<<19));
acp_summ[k] = acp_summ[k]+ADC_f[nc][k];
}
pause_1000(1000);
}
// 16 � 7 ����� ���������� �.�. ��� ����� ����y����y
for (k=0;k<16;k++)
{
// if ((k==15))
// {
// if (ADC_sf[k]<MIN_DETECT_UD_ZERO)
// iq19_zero_ADC[k] = acp_zero[k];
// }
// else
{
iq19_zero_ADC[nc][k] = acp_zero[k];
}
// zero_ADC[k] =_IQ19toF(acp_zero[k]);
zero_ADC[nc][k] = acp_summ[k]/COUNT_DETECT_ZERO;//_IQ19toF(acp_zero[k]);
}
}