/************************************************************************** Description: Âñÿêèå ðàçíûå ïåðåêëþ÷àòåëè è óñòàâêè. Àâòîð: Óëèòîâñêèé Ä.È. Äàòà ïîñëåäíåãî îáíîâëåíèÿ: 2021.11.08 **************************************************************************/ #ifndef DEF #define DEF // ðàñêîììåíòèðîâàòü, åñëè åñòü ñäâèã ìåæäó îáìîòêàìè ÃÝÄ (30 ãðàä.) #define SHIFT #define SIMULINK_SEQUENCE V_PWM24_PHASE_SEQ_NORMAL_BCA /* V_PWM24_PHASE_SEQ_NORMAL_ABC, - íå òî V_PWM24_PHASE_SEQ_NORMAL_BCA, - ïîõîæå íà ïðàâäó V_PWM24_PHASE_SEQ_NORMAL_CAB, - æîïà V_PWM24_PHASE_SEQ_REVERS_ACB, - æîïà V_PWM24_PHASE_SEQ_REVERS_CBA, - æîïà V_PWM24_PHASE_SEQ_REVERS_BAC - æîïà */ // ðåæèìû ðàáîòû (äëÿ state) #define STATE_SHUTDOWN 0 //àâàðèéíàÿ îñòàíîâêà #define STATE_STOP 1 //øòàòíàÿ îñòàíîâêà #define STATE_WORK 2 //ðàáîòà // ÷àñòîòà òàêòîâûõ èìïóëüñîâ ïðîöåññîðà, Ãö #define FSYSCLKOUT 200e6 //150e6 // // prescaled version of the system clock and is used by // all submodules within the ePWM, Ãö // (ñì. EPwmxRegs.TBCTL.bit.CLKDIV è EPwmxRegs.TBCTL.bit.HSPCLKDIV) #define FTBCLK (FSYSCLKOUT*0.5*0.5) //#define FTBCLK (FSYSCLKOUT*0.5*0.5*0.5*0.5) // ïåðèîä ØÈÌ, c #define T_PWM 2220e-6 //F_PWM = 450 Ãö //#define T_PWM 6000e-6 //F_PWM = 166.7 Ãö // ïåðèîä âûçîâà îñíîâíîé ïðîãðàììû, ñ #define TY (T_PWM*0.5) // "ìåðòâîå âðåìÿ", ñ #define DT 30e-6 //#define DT 60e-6 // Time-Base Period Register, åä. ñ÷¸ò÷èêà òàéìåðà #define T1_PRD (FTBCLK*T_PWM*0.5) // ìàêñèìàëüíîå çíà÷åíèå àìïëèòóäû íàïðÿæåíèÿ óïðàâëåíèÿ óñòàíàâëèâàåì òàê, // ÷òîáû ìèíèìàëüíàÿ øèðèíà èìïóëüñà áûëà 10 ìêñ, åä. ñ÷¸ò÷èêà òàéìåðà #define Y_LIM (T1_PRD - (DT + 10e-6)*FTBCLK) // êîíñòàíòû äëÿ âû÷èñëåíèÿ âñÿêîãî #define PI2 6.283185307179586476925286766559 //pi*2 #define SQRT2 1.4142135623730950488016887242097 //sqrt(2) #define SQRT3 1.7320508075688772935274463415059 //sqrt(3) #define ISQRT3 0.57735026918962576450914878050196 //1./sqrt(3) // Íîìèíàëüíûå âåëè÷èíû ÃÝÄ // ... ìîùíîñòü íà âàëó, Âò #define P_NOM (6300e3.) // ... ëèíåéíîå íàïðÿæåíèå,  (ampl) #define U_NOM (3300.*SQRT2) // ... ìåõàíè÷åñêàÿ ñêîðîñòü, îá/ìèí #define N_NOM 180. // ... ÷èñëî ïàð ïîëþñîâ #define PP 6. // ... êîýôôèöèåíò ìîùíîñòè #define COS_FI 0.89 // ... ÊÏÄ #define EFF 0.968 // ... ïðèâåäåííûé ê âàëó ìîìåíò èíåðöèè, êã*ì^2 #define J (87e3*0.50) // ... ïîëíàÿ ìîùíîñòü, ÂÀ #define S_NOM (P_NOM/(COS_FI*EFF)) // ... ìåõàíè÷åñêàÿ ñêîðîñòü, ðàä/ñ #define WM_NOM (N_NOM/60.*PI2) // ... ìîìåíò íà âàëó, Í*ì #define M_NOM (P_NOM/WM_NOM) // Áàçîâûå âåëè÷èíû ÃÝÄ // ... ïîëíàÿ ìîùíîñòü, BA #define S_BAZ S_NOM // ... ëèíåéíîå íàïðÿæåíèå,  (ampl) #define U_BAZ U_NOM // ... ôàçíûé òîê, À (ampl) #define I_BAZ (S_BAZ*2./(U_BAZ*SQRT3)*0.5) //0.5 - ò.ê. îáìîòîê äâå // ... ìåõàíè÷åñêàÿ ñêîðîñòü, îá/ìèí #define N_BAZ N_NOM // ... ìåõàíè÷åñêàÿ ñêîðîñòü, ðàä/ñ #define WM_BAZ (N_BAZ/60.*PI2) // ... ýëåêòðè÷åñêàÿ ñêîðîñòü, ðàä/ñ #define WE_BAZ (WM_BAZ*PP) // ... ìîìåíò íà âàëó, Í*ì #define M_BAZ (S_BAZ/WM_BAZ) // ... ïîòîêîñöåïëåíèå ñòàòîðà, Âá #define PSI_BAZ (U_BAZ/(WE_BAZ*SQRT3)) // ... èíäóêòèâíîñòü, Ãí #define L_BAZ (PSI_BAZ/I_BAZ) // ... ñîïðîòèâëåíèå, Îì #define R_BAZ (U_BAZ/(I_BAZ*SQRT3)) // äëÿ ïåðåñ÷¸òà èç àìïëèòóäû ôàçíîãî íàïðÿæåíèÿ â åäèíèöû ñèãíàëà óïðàâëåíèÿ #define U_2_Y (T1_PRD*SQRT3/U_BAZ) // íàïðÿæåíèå â çâåíå ïîñò. òîêà, êîòîðîå äàëî áû íà âûõîäå ÀÖÏ çíà÷. 2048,  #define UDC_SENS_MAX (U_BAZ*1.15*1.3) // âûõîäíîé òîê, êîòîðûé äàë áû íà âûõîäå ÀÖÏ çíà÷. 2048, À (ampl) #define IAC_SENS_MAX (I_BAZ*1.5) // number of pulses per rev. (from tacho, Hall, optical sensor...etc) #define NOP 1024. // ïðèðàùåíèå ñ÷¸ò÷èêà QEP çà TY ñåê. ïðè ÷àñòîòå âðàù. WM_BAZ #define QEP_CNT_DEL_NOM (NOP*4.*TY*WM_BAZ/PI2) // êîýôôèöèåíòû äëÿ ïåðåâîäà èçìåðåííûõ âåëè÷èí â o.e. #define GAIN_UDC (UDC_SENS_MAX/(2048.*U_BAZ)) #define GAIN_IAC (IAC_SENS_MAX/(2048.*I_BAZ)) #define GAIN_WM (1.0/QEP_CNT_DEL_NOM) // ìèíèìàëüíàÿ ñêîðîñòü äëÿ ïåðåñ÷¸òà ìîùíîñòè â òîê, o.e. #define WM_MIN 0.03 //0.003 //? // äëÿ ïðîðåæèâàíèÿ ðåãóëÿòîðîâ ïîòîêà, ñêîðîñòè è ìîùíîñòè #define DECIM_PSI_WM_PM 2. //1. //5. //? // for specify the PLL #define PLLSTS_DIVSEL 2 #define PLLCR_DIV 10 // äëÿ âûâîäà #define CONTROLLER_BIAS 3.2 #define CONTROLLER_GAIN 2500. // îáùåå êîëè÷åñòâî ïàðàìåòðîâ #define PAR_NUMBER 400 // íîìåð ïåðâîãî ðåäàêòèðóåìîãî ïàðàìåòðà #define FIRST_WRITE_PAR_NUM 150 // Äèñêðåòíûå âõîäû/âûõîäû (begin) //------------------------------------------------------------------------- // âõîäû // ---------------------------- #define DI_24V_SOURCE_FAULT GpioDataRegs.GPBDAT.bit.GPIO50 // âûõîäû // ---------------------------- // ... ðàçíîå #define DO_GPIO00_SET GpioDataRegs.GPASET.bit.GPIO0 = 1 #define DO_GPIO00_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO0 = 1 #define DO_GPIO01_SET GpioDataRegs.GPASET.bit.GPIO1 = 1 #define DO_GPIO01_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO1 = 1 #define DO_GPIO02_SET GpioDataRegs.GPASET.bit.GPIO2 = 1 #define DO_GPIO02_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO2 = 1 #define DO_GPIO03_SET GpioDataRegs.GPASET.bit.GPIO3 = 1 #define DO_GPIO03_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO3 = 1 #define DO_GPIO04_SET GpioDataRegs.GPASET.bit.GPIO4 = 1 #define DO_GPIO04_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO4 = 1 #define DO_GPIO05_SET GpioDataRegs.GPASET.bit.GPIO5 = 1 #define DO_GPIO05_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO5 = 1 #define DO_GPIO06_SET GpioDataRegs.GPASET.bit.GPIO6 = 1 #define DO_GPIO06_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO6 = 1 #define DO_GPIO07_SET GpioDataRegs.GPASET.bit.GPIO7 = 1 #define DO_GPIO07_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO7 = 1 #define DO_GPIO08_SET GpioDataRegs.GPASET.bit.GPIO8 = 1 #define DO_GPIO08_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO8 = 1 #define DO_GPIO09_SET GpioDataRegs.GPASET.bit.GPIO9 = 1 #define DO_GPIO09_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO9 = 1 #define DO_GPIO10_SET GpioDataRegs.GPASET.bit.GPIO10 = 1 #define DO_GPIO10_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO10 = 1 #define DO_GPIO11_SET GpioDataRegs.GPASET.bit.GPIO11 = 1 #define DO_GPIO11_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO11 = 1 // ... íå èñïîëüçóþòñÿ #define DO_GPIO019_SET GpioDataRegs.GPASET.bit.GPIO19 = 1 #define DO_GPIO019_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO19 = 1 #define DO_GPIO020_SET GpioDataRegs.GPASET.bit.GPIO20 = 1 #define DO_GPIO020_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO20 = 1 #define DO_GPIO022_SET GpioDataRegs.GPASET.bit.GPIO22 = 1 #define DO_GPIO022_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO22 = 1 #define DO_GPIO48_SET GpioDataRegs.GPBSET.bit.GPIO48 = 1 #define DO_GPIO48_CLEAR GpioDataRegs.GPBCLEAR.bit.GPIO48 = 1 #define DO_GPIO49_SET GpioDataRegs.GPBSET.bit.GPIO49 = 1 #define DO_GPIO49_CLEAR GpioDataRegs.GPBCLEAR.bit.GPIO49 = 1 // ... äëÿ óïðàâëåíèÿ íîæêîé CS EEPROM #define CS_SET GpioDataRegs.GPBSET.bit.GPIO57 = 1 #define CS_CLEAR GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1 // ... ñâåòîäèîäû // (çåë¸íûé "Ãîòîâíîñòü") #define LED_GREEN1_ON GpioDataRegs.GPBCLEAR.bit.GPIO59 = 1 #define LED_GREEN1_OFF GpioDataRegs.GPBSET.bit.GPIO59 = 1 #define LED_GREEN1_TOGGLE GpioDataRegs.GPBTOGGLE.bit.GPIO59 = 1 // (çåë¸íûé "Ðàáîòà") #define LED_GREEN2_ON GpioDataRegs.GPBCLEAR.bit.GPIO60 = 1 #define LED_GREEN2_OFF GpioDataRegs.GPBSET.bit.GPIO60 = 1 #define LED_GREEN2_TOGGLE GpioDataRegs.GPBTOGGLE.bit.GPIO60 = 1 // (êðàñíûé "Àâàðèÿ") #define LED_RED_ON GpioDataRegs.GPBCLEAR.bit.GPIO61 = 1 #define LED_RED_OFF GpioDataRegs.GPBSET.bit.GPIO61 = 1 #define LED_RED_TOGGLE GpioDataRegs.GPBTOGGLE.bit.GPIO61 = 1 // ... íå èñïîëüçóåòñÿ #define DO_GPIO63_SET GpioDataRegs.GPBSET.bit.GPIO63 = 1 #define DO_GPIO63_CLEAR GpioDataRegs.GPBCLEAR.bit.GPIO63 = 1 //------------------------------------------------------------------------- // Äèñêðåòíûå âõîäû/âûõîäû (end) #include "DSP2833x_Device.h" #include "math.h" #include "C28x_FPU_FastRTS.h" // ñòðóêòóðà äëÿ ðåãóëÿòîðîâ òîêà (ñì. control_current()) struct Cc { short once; float KpOrig; float KiOrig; float Kp; float Ki; float K1; float K2; float K3; float Xyff; float yffAux2; float yffAux3; float del; float kYlim; float yd1P; float yd1I; float yd1FF; float yd1; float yq1P; float yq1I; float yq1FF; float yq1; float y1; float yd2P; float yd2I; float yd2FF; float yd2; float yq2P; float yq2I; float yq2FF; float yq2; float y2; short y1LimFlag; short y2LimFlag; }; //Cc // ñòðóêòóðà äëÿ ðåãóëÿòîðà ïîòîêà (ñì. control_flux()) struct Cf { short once; float KpOrig; float KiOrig; float Kp; float Ki; float IdLim; float IdLimNeg; float del; float idP; float idI; float idFF; short idLimFlag; }; //Cf // ñòðóêòóðà äëÿ ðåãóëÿòîðîâ ñêîðîñòè è ìîùíîñòè (ñì. control_speed_power()) struct Csp { short once; float KpOrig; float KiOrig; float Kp; float Ki; float kMeNom; float del; float iqP; float iqI; float iqFF; float IlimIncr; float iqLimAux; float iqLimZi; float IqLim; float IqLimNeg; float iqLim; float iqLimNeg; float delWmAbs; float KizIncr; float pmZiRampDown; float wmLimZi; float pmLimZi; short iqLimFlag; }; //Csp // ñòðóêòóðà äëÿ çàïèñè â EEPROM âñÿêîãî struct Eprom { short writeRequestNumber; short readFaultNo; }; //Eprom // ñòðóêòóðà äëÿ çàïîìèíàíèÿ âåëè÷èí â ìîìåíò ñðàáàòûâàíèÿ çàùèòû struct Emerg { float udc1; float udc2; float iac1; float iac2; float me; float wm; float pm; }; //Emerg // ñòðóêòóðà äëÿ inverse park (ñì. ipark()) struct Ip { float yx1Aux; float yy1Aux; float yx2Aux; float yy2Aux; float theta; float sinTheta; float cosTheta; float yx1; float yy1; float yx2; float yy2; }; //Ip // ñòðóêòóðà äëÿ indirect vector control (ñì. indirect_vector_control()) struct Ivc { short once; float im; float wr; float wsNf; float ws; float sinTheta; float cosTheta; float id1; float iq1; float psi; float id2; float iq2; }; //Ivc // ñòðóêòóðà äëÿ äàííûõ, ïîëó÷åííûõ ñ ÂÓ struct Mst { short pzMode; short faultReset; short start; float wmZz; float pmZz; float wmLim; float pmLim; float pIncrMaxTy; float pDecrMaxTy; }; //Mst // ñòðóêòóðà äëÿ ñìåùåíèé íóëÿ äàò÷èêîâ struct Offset { short Udc1; short Udc2; short Ic1; short Ic2; short Ia1; short Ia2; short Ib1; short Ib2; }; //Offset // ñòðóêòóðà äëÿ âûâîäà struct Out { float K; float udc1; float udc2; float iac1; float iac2; float me; float wm; float pm; }; //Out // ñòðóêòóðà äëÿ çàùèò struct Protect { short IacMax; short IacMin; unsigned short Tdi24VSource; volatile unsigned short tDI24VSource; unsigned short TudcMin; volatile unsigned short tUdc1Min; volatile unsigned short tUdc2Min; unsigned short TwmMax; volatile unsigned short tWmMax; float UdcMin; float UdcMax; float WmMax; }; //Protect // ñòðóêòóðà äëÿ ðåçóëüòàòîâ ÀÖÏ struct Result { short udc1; short udc2; short ic1; short ic2; short ia1; short ia2; short ib1; short ib2; }; //Result // ñòðóêòóðà äëÿ çàäàííîãî ïîòîêà (ñì. reference_flux()) struct Rf { short once; float PsiZ; float PsizIncr; float psiZi; float psiZCorr; float psiSub; float psiZCorr2; float psiZ; float KpsiSub; float Kpsiz; float WmNomPsi; float YlimPsi; float pPsiZ; float psiZPrev1; float psiZPrev2; float psiZPrev3; }; //Rf // ñòðóêòóðà äëÿ çàäàííîé ìîùíîñòè (ñì. reference_power()) struct Rp { short once; float pmZz; float pmZi; float pmZ; float Kpmz; float PlimIncr; float KpIncrDecr; volatile float pmEqv; }; //Rp // ñòðóêòóðà äëÿ çàäàííîé ñêîðîñòè (ñì. reference_speed()) struct Rs { short once; float wmZz; float wmZi; float wmZ; float Kwmz; float WlimIncr; float wzIncrNf; float wzIncr; float pWmZ; float wmZPrev1; float wmZPrev2; float wmZPrev3; short tPwmZ; }; //Rs // ñòðóêòóðà äëÿ ïàðàìåòðîâ ÃÝÄ struct SgmPar { float Rs; float Lls; float Rr; float Llr; float Lm; float Ls; float Lr; float SigmaLs; float LmInv; float LrInv; float Tr; float TrInv; float Kl; float KlInv; }; //SgmPar #endif //DEF