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Куууча всякой логики для управления тиристорами

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Запустилось но неправильно пока
This commit is contained in:
Razvalyaev
2025-11-15 19:08:50 +03:00
parent d7dec9df35
commit 8041598cc5
31 changed files with 1445 additions and 482 deletions
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370
MATLAB/MCU_STM32_Matlab/Drivers/STM32_SIMULINK/stm32_matlab_tim.c
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@@ -91,167 +91,215 @@ void Channels_Simulation(TIM_TypeDef* TIMx, struct TIM_Sim* TIMS)
/* Выбор режима CaptureCompare или PWM и симуляция для каждого канала */
void CC_PWM_Ch1_Simulation(TIM_TypeDef *TIMx, struct TIM_Sim *TIMS)
{ // определяет режим канала
switch (TIMx->CCMR1 & TIM_CCMR1_OC1M)
{
case (TIM_OCMODE_ACTIVE): // ACTIVE mode
if (abs(TIMx->CNT - TIMx->CCR1) < 2*TIMS->tx_step)
TIMS->Channels.OC1REF = 1;
break;
switch (TIMx->CCMR1 & TIM_CCMR1_OC1M)
{
case (TIM_OCMODE_ACTIVE): // ACTIVE mode
if (abs(TIMx->CNT - TIMx->CCR1) < 2*TIMS->tx_step)
TIMS->Channels.OC1REF = 1;
break;
case (TIM_OCMODE_INACTIVE): // INACTIVE mode
if (abs(TIMx->CNT - TIMx->CCR1) < 2*TIMS->tx_step)
TIMS->Channels.OC1REF = 0;
break;
case (TIM_OCMODE_INACTIVE): // INACTIVE mode
if (abs(TIMx->CNT - TIMx->CCR1) < 2*TIMS->tx_step)
TIMS->Channels.OC1REF = 0;
break;
case (TIM_OCMODE_TOGGLE): // TOOGLE mode
if (abs(TIMx->CNT - TIMx->CCR1) < 2*TIMS->tx_step)
TIMS->Channels.OC1REF = ~TIMS->Channels.OC1REF;
break;
case (TIM_OCMODE_TOGGLE): // TOOGLE mode
if (abs(TIMx->CNT - TIMx->CCR1) < 2*TIMS->tx_step)
TIMS->Channels.OC1REF = ~TIMS->Channels.OC1REF;
break;
case (TIM_OCMODE_PWM1): // PWM MODE 1 mode
if (TIMx->CNT < TIMx->CCR1)
TIMS->Channels.OC1REF = 1;
else
TIMS->Channels.OC1REF = 0;
break;
case (TIM_OCMODE_PWM1): // PWM MODE 1 mode
if (TIMx->CNT < TIMx->CCR1)
TIMS->Channels.OC1REF = 1;
else
TIMS->Channels.OC1REF = 0;
break;
case (TIM_OCMODE_PWM2): // PWM MODE 2 mode
if (TIMx->CNT < TIMx->CCR1)
TIMS->Channels.OC1REF = 0;
else
TIMS->Channels.OC1REF = 1;
break;
case (TIM_OCMODE_PWM2): // PWM MODE 2 mode
if (TIMx->CNT < TIMx->CCR1)
TIMS->Channels.OC1REF = 0;
else
TIMS->Channels.OC1REF = 1;
break;
case (TIM_OCMODE_FORCED_ACTIVE): // FORCED ACTIVE mode
TIMS->Channels.OC1REF = 1; break;
case (TIM_OCMODE_FORCED_ACTIVE): // FORCED ACTIVE mode
TIMS->Channels.OC1REF = 1; break;
case (TIM_OCMODE_FORCED_INACTIVE): // FORCED INACTIVE mode
TIMS->Channels.OC1REF = 0; break;
case (TIM_OCMODE_FORCED_INACTIVE): // FORCED INACTIVE mode
TIMS->Channels.OC1REF = 0; break;
}
}
if (TIMx->DIER & TIM_IT_CC1)
{
TIMx->SR |= TIM_SR_CC1IF;
if (((TIMS->tx_cnt - TIMS->tx_step) < TIMx->CCR1) && (TIMS->tx_cnt >= TIMx->CCR1))
{
TIM_Call_IRQHandller(TIMx);
}
else if (((TIMS->tx_cnt - TIMS->tx_step) > TIMx->CCR1) && (TIMS->tx_cnt <= TIMx->CCR1))
{
TIM_Call_IRQHandller(TIMx);
}
}
}
void CC_PWM_Ch2_Simulation(TIM_TypeDef *TIMx, struct TIM_Sim *TIMS)
{ // определяет режим канала
switch (TIMx->CCMR1 & TIM_CCMR1_OC2M)
{
case ((TIM_OCMODE_ACTIVE) << (TIM_OCMODE_SECOND_SHIFT)): // ACTIVE mode
if (abs(TIMx->CNT - TIMx->CCR2) < 2*TIMS->tx_step)
TIMS->Channels.OC2REF = 1;
break;
switch (TIMx->CCMR1 & TIM_CCMR1_OC2M)
{
case ((TIM_OCMODE_ACTIVE) << (TIM_OCMODE_SECOND_SHIFT)): // ACTIVE mode
if (abs(TIMx->CNT - TIMx->CCR2) < 2*TIMS->tx_step)
TIMS->Channels.OC2REF = 1;
break;
case ((TIM_OCMODE_INACTIVE) << (TIM_OCMODE_SECOND_SHIFT)): // INACTIVE mode
if (abs(TIMx->CNT - TIMx->CCR2) < 2*TIMS->tx_step)
TIMS->Channels.OC2REF = 0;
break;
case ((TIM_OCMODE_INACTIVE) << (TIM_OCMODE_SECOND_SHIFT)): // INACTIVE mode
if (abs(TIMx->CNT - TIMx->CCR2) < 2*TIMS->tx_step)
TIMS->Channels.OC2REF = 0;
break;
case ((TIM_OCMODE_TOGGLE) << (TIM_OCMODE_SECOND_SHIFT)): // Toogle mode
if (abs(TIMx->CNT - TIMx->CCR2) < 2*TIMS->tx_step)
TIMS->Channels.OC2REF = ~TIMS->Channels.OC2REF;
break;
case ((TIM_OCMODE_TOGGLE) << (TIM_OCMODE_SECOND_SHIFT)): // Toogle mode
if (abs(TIMx->CNT - TIMx->CCR2) < 2*TIMS->tx_step)
TIMS->Channels.OC2REF = ~TIMS->Channels.OC2REF;
break;
case ((TIM_OCMODE_PWM1) << (TIM_OCMODE_SECOND_SHIFT)): // PWM mode 1 mode
if (TIMx->CNT < TIMx->CCR2)
TIMS->Channels.OC2REF = 1;
else
TIMS->Channels.OC2REF = 0;
break;
case ((TIM_OCMODE_PWM1) << (TIM_OCMODE_SECOND_SHIFT)): // PWM mode 1 mode
if (TIMx->CNT < TIMx->CCR2)
TIMS->Channels.OC2REF = 1;
else
TIMS->Channels.OC2REF = 0;
break;
case ((TIM_OCMODE_PWM2) << (TIM_OCMODE_SECOND_SHIFT)): // PWM mode 2 mode
if (TIMx->CNT < TIMx->CCR2)
TIMS->Channels.OC2REF = 0;
else
TIMS->Channels.OC2REF = 1;
break;
case ((TIM_OCMODE_PWM2) << (TIM_OCMODE_SECOND_SHIFT)): // PWM mode 2 mode
if (TIMx->CNT < TIMx->CCR2)
TIMS->Channels.OC2REF = 0;
else
TIMS->Channels.OC2REF = 1;
break;
case ((TIM_OCMODE_FORCED_ACTIVE) << (TIM_OCMODE_SECOND_SHIFT)): // FORCED ACTIVE mode
TIMS->Channels.OC2REF = 1; break;
case ((TIM_OCMODE_FORCED_ACTIVE) << (TIM_OCMODE_SECOND_SHIFT)): // FORCED ACTIVE mode
TIMS->Channels.OC2REF = 1; break;
case ((TIM_OCMODE_FORCED_INACTIVE) << (TIM_OCMODE_SECOND_SHIFT)): // FORCED INACTIVE mode
TIMS->Channels.OC2REF = 0; break;
case ((TIM_OCMODE_FORCED_INACTIVE) << (TIM_OCMODE_SECOND_SHIFT)): // FORCED INACTIVE mode
TIMS->Channels.OC2REF = 0; break;
}
}
if (TIMx->DIER & TIM_IT_CC2)
{
TIMx->SR |= TIM_SR_CC2IF;
if (((TIMS->tx_cnt - TIMS->tx_step) < TIMx->CCR2) && (TIMS->tx_cnt >= TIMx->CCR2))
{
TIM_Call_IRQHandller(TIMx);
}
else if (((TIMS->tx_cnt - TIMS->tx_step) > TIMx->CCR2) && (TIMS->tx_cnt <= TIMx->CCR2))
{
TIM_Call_IRQHandller(TIMx);
}
}
}
void CC_PWM_Ch3_Simulation(TIM_TypeDef *TIMx, struct TIM_Sim *TIMS)
{ // определяет режим канала
switch (TIMx->CCMR2 & TIM_CCMR1_OC1M)
{
case (TIM_OCMODE_ACTIVE): // ACTIVE mode
if (abs(TIMx->CNT - TIMx->CCR3) < 2*TIMS->tx_step)
TIMS->Channels.OC3REF = 1;
break;
switch (TIMx->CCMR2 & TIM_CCMR1_OC1M)
{
case (TIM_OCMODE_ACTIVE): // ACTIVE mode
if (abs(TIMx->CNT - TIMx->CCR3) < 2*TIMS->tx_step)
TIMS->Channels.OC3REF = 1;
break;
case (TIM_OCMODE_INACTIVE): // INACTIVE mode
if (abs(TIMx->CNT - TIMx->CCR3) < 2*TIMS->tx_step)
TIMS->Channels.OC3REF = 0;
break;
case (TIM_OCMODE_INACTIVE): // INACTIVE mode
if (abs(TIMx->CNT - TIMx->CCR3) < 2*TIMS->tx_step)
TIMS->Channels.OC3REF = 0;
break;
case (TIM_OCMODE_TOGGLE): // Toogle mode
if (abs(TIMx->CNT - TIMx->CCR3) < 2*TIMS->tx_step)
TIMS->Channels.OC3REF = ~TIMS->Channels.OC3REF;
break;
case (TIM_OCMODE_TOGGLE): // Toogle mode
if (abs(TIMx->CNT - TIMx->CCR3) < 2*TIMS->tx_step)
TIMS->Channels.OC3REF = ~TIMS->Channels.OC3REF;
break;
case (TIM_OCMODE_PWM1): // PWM mode 1 mode
if (TIMx->CNT < TIMx->CCR3)
TIMS->Channels.OC3REF = 1;
else
TIMS->Channels.OC3REF = 0;
break;
case (TIM_OCMODE_PWM1): // PWM mode 1 mode
if (TIMx->CNT < TIMx->CCR3)
TIMS->Channels.OC3REF = 1;
else
TIMS->Channels.OC3REF = 0;
break;
case (TIM_OCMODE_PWM2): // PWM mode 2 mode
if (TIMx->CNT < TIMx->CCR3)
TIMS->Channels.OC3REF = 0;
else
TIMS->Channels.OC3REF = 1;
break;
case (TIM_OCMODE_PWM2): // PWM mode 2 mode
if (TIMx->CNT < TIMx->CCR3)
TIMS->Channels.OC3REF = 0;
else
TIMS->Channels.OC3REF = 1;
break;
case (TIM_OCMODE_FORCED_ACTIVE): // FORCED ACTIVE mode
TIMS->Channels.OC3REF = 1; break;
case (TIM_OCMODE_FORCED_ACTIVE): // FORCED ACTIVE mode
TIMS->Channels.OC3REF = 1; break;
case (TIM_OCMODE_FORCED_INACTIVE): // FORCED INACTIVE mode
TIMS->Channels.OC3REF = 0; break;
case (TIM_OCMODE_FORCED_INACTIVE): // FORCED INACTIVE mode
TIMS->Channels.OC3REF = 0; break;
}
}
if (TIMx->DIER & TIM_IT_CC3)
{
TIMx->SR |= TIM_SR_CC3IF;
if (((TIMS->tx_cnt - TIMS->tx_step) < TIMx->CCR3) && (TIMS->tx_cnt >= TIMx->CCR3))
{
TIM_Call_IRQHandller(TIMx);
}
else if (((TIMS->tx_cnt - TIMS->tx_step) > TIMx->CCR3) && (TIMS->tx_cnt <= TIMx->CCR3))
{
TIM_Call_IRQHandller(TIMx);
}
}
}
void CC_PWM_Ch4_Simulation(TIM_TypeDef *TIMx, struct TIM_Sim *TIMS)
{ // определяет режим канала
switch (TIMx->CCMR1 & TIM_CCMR1_OC2M)
{
case ((TIM_OCMODE_ACTIVE) << (TIM_OCMODE_SECOND_SHIFT)): // ACTIVE mode
if (abs(TIMx->CNT - TIMx->CCR4) < 2*TIMS->tx_step)
TIMS->Channels.OC4REF = 1;
break;
switch (TIMx->CCMR1 & TIM_CCMR1_OC2M)
{
case ((TIM_OCMODE_ACTIVE) << (TIM_OCMODE_SECOND_SHIFT)): // ACTIVE mode
if (abs(TIMx->CNT - TIMx->CCR4) < 2*TIMS->tx_step)
TIMS->Channels.OC4REF = 1;
break;
case ((TIM_OCMODE_INACTIVE) << (TIM_OCMODE_SECOND_SHIFT)): // INACTIVE mode
if (abs(TIMx->CNT - TIMx->CCR4) < 2*TIMS->tx_step)
TIMS->Channels.OC4REF = 0;
break;
case ((TIM_OCMODE_INACTIVE) << (TIM_OCMODE_SECOND_SHIFT)): // INACTIVE mode
if (abs(TIMx->CNT - TIMx->CCR4) < 2*TIMS->tx_step)
TIMS->Channels.OC4REF = 0;
break;
case ((TIM_OCMODE_TOGGLE) << (TIM_OCMODE_SECOND_SHIFT)): // Toogle mode
if (abs(TIMx->CNT - TIMx->CCR4) < 2*TIMS->tx_step)
TIMS->Channels.OC4REF = ~TIMS->Channels.OC4REF;
break;
case ((TIM_OCMODE_TOGGLE) << (TIM_OCMODE_SECOND_SHIFT)): // Toogle mode
if (abs(TIMx->CNT - TIMx->CCR4) < 2*TIMS->tx_step)
TIMS->Channels.OC4REF = ~TIMS->Channels.OC4REF;
break;
case ((TIM_OCMODE_PWM1) << (TIM_OCMODE_SECOND_SHIFT)): // PWM mode 1 mode
if (TIMx->CNT < TIMx->CCR4)
TIMS->Channels.OC4REF = 1;
else
TIMS->Channels.OC4REF = 0;
break;
case ((TIM_OCMODE_PWM1) << (TIM_OCMODE_SECOND_SHIFT)): // PWM mode 1 mode
if (TIMx->CNT < TIMx->CCR4)
TIMS->Channels.OC4REF = 1;
else
TIMS->Channels.OC4REF = 0;
break;
case ((TIM_OCMODE_PWM2) << (TIM_OCMODE_SECOND_SHIFT)): // PWM mode 2 mode
if (TIMx->CNT < TIMx->CCR4)
TIMS->Channels.OC4REF = 0;
else
TIMS->Channels.OC4REF = 1;
break;
case ((TIM_OCMODE_PWM2) << (TIM_OCMODE_SECOND_SHIFT)): // PWM mode 2 mode
if (TIMx->CNT < TIMx->CCR4)
TIMS->Channels.OC4REF = 0;
else
TIMS->Channels.OC4REF = 1;
break;
case ((TIM_OCMODE_FORCED_ACTIVE) << (TIM_OCMODE_SECOND_SHIFT)): // FORCED ACTIVE mode
TIMS->Channels.OC4REF = 1; break;
case ((TIM_OCMODE_FORCED_ACTIVE) << (TIM_OCMODE_SECOND_SHIFT)): // FORCED ACTIVE mode
TIMS->Channels.OC4REF = 1; break;
case ((TIM_OCMODE_FORCED_INACTIVE) << (TIM_OCMODE_SECOND_SHIFT)): // FORCED INACTIVE mode
TIMS->Channels.OC4REF = 0; break;
case ((TIM_OCMODE_FORCED_INACTIVE) << (TIM_OCMODE_SECOND_SHIFT)): // FORCED INACTIVE mode
TIMS->Channels.OC4REF = 0; break;
}
}
if (TIMx->DIER & TIM_IT_CC4)
{
TIMx->SR |= TIM_SR_CC4IF;
if (((TIMS->tx_cnt - TIMS->tx_step) < TIMx->CCR4) && (TIMS->tx_cnt >= TIMx->CCR4))
{
TIM_Call_IRQHandller(TIMx);
}
else if (((TIMS->tx_cnt - TIMS->tx_step) > TIMx->CCR4) && (TIMS->tx_cnt <= TIMx->CCR4))
{
TIM_Call_IRQHandller(TIMx);
}
}
}
/* Запись каналов таймера в порты GPIO */
void Write_OC_to_GPIO(TIM_TypeDef *TIMx, struct TIM_Sim *TIMS)
@@ -565,70 +613,68 @@ void TIM_SIM_DEINIT(void)
// Т.к. в MSVC нет понятия weak function, необходимо объявить все колбеки
// И если какой-то колбек не используется, его надо определить
//#ifndef USE_TIM1_UP_TIM10_HANDLER
//void TIM1_UP_TIM10_IRQHandler(void) {}
__weak void TIM1_UP_TIM10_IRQHandler(void) {}
//#endif
//#ifndef USE_TIM2_HANDLER
//void TIM2_IRQHandler(void) {}
__weak void TIM2_IRQHandler(void) {}
//#endif
//#ifndef USE_TIM3_HANDLER
//void TIM3_IRQHandler(void) {}
__weak void TIM3_IRQHandler(void) {}
//#endif
//#ifndef USE_TIM4_HANDLER
//void TIM4_IRQHandler(void) {}
__weak void TIM4_IRQHandler(void) {}
//#endif
//#ifndef USE_TIM5_HANDLER
//void TIM5_IRQHandler(void) {}
__weak void TIM5_IRQHandler(void) {}
//#endif
//#ifndef USE_TIM6_HANDLER
//void TIM6_DAC_IRQHandler(void) {}
__weak void TIM6_DAC_IRQHandler(void) {}
//#endif
//#ifndef USE_TIM7_HANDLER
//void TIM7_IRQHandler(void) {}
__weak void TIM7_IRQHandler(void) {}
//#endif
//#ifndef USE_TIM8_UP_TIM13_HANDLER
//void TIM8_UP_TIM13_IRQHandler(void) {}
__weak void TIM8_UP_TIM13_IRQHandler(void) {}
//#endif
//#ifndef USE_TIM1_BRK_TIM9_HANDLER
//void TIM1_BRK_TIM9_IRQHandler(void) {}
__weak void TIM1_BRK_TIM9_IRQHandler(void) {}
//#endif
//#ifndef USE_TIM1_TRG_COM_TIM11_HANDLER
//void TIM1_TRG_COM_TIM11_IRQHandler(void) {}
__weak void TIM1_TRG_COM_TIM11_IRQHandler(void) {}
//#endif
//#ifndef USE_TIM8_BRK_TIM12_HANDLER
//void TIM8_BRK_TIM12_IRQHandler(void) {}
__weak void TIM8_BRK_TIM12_IRQHandler(void) {}
//#endif
//#ifndef USE_TIM8_TRG_COM_TIM14_HANDLER
//void TIM8_TRG_COM_TIM14_IRQHandler(void) {}
__weak void TIM8_TRG_COM_TIM14_IRQHandler(void) {}
//#endif
/* Вызов прерывания */
void TIM_Call_IRQHandller(TIM_TypeDef* TIMx)
{ // calling HANDLER
//if (TIMx == TIM1)
// TIM1_UP_IRQHandler();
//if ((TIMx == TIM1) || (TIMx == TIM10))
// TIM1_UP_TIM10_IRQHandler();
//else if (TIMx == TIM2)
// TIM2_IRQHandler();
//else if (TIMx == TIM3)
// TIM3_IRQHandler();
//else if (TIMx == TIM4)
// TIM4_IRQHandler();
//else if (TIMx == TIM5)
// TIM5_IRQHandler();
//else if (TIMx == TIM6)
// TIM6_DAC_IRQHandler();
//else if (TIMx == TIM7)
// TIM7_IRQHandler();
//else if ((TIMx == TIM8) || (TIMx == TIM13))
// TIM8_UP_TIM13_IRQHandler();
//else if ((TIMx == TIM1) || (TIMx == TIM9))
// TIM1_BRK_TIM9_IRQHandler();
//else if ((TIMx == TIM1) || (TIMx == TIM11))
// TIM1_TRG_COM_TIM11_IRQHandler();
//else if ((TIMx == TIM8) || (TIMx == TIM12))
// TIM8_BRK_TIM12_IRQHandler();
//else if ((TIMx == TIM8) || (TIMx == TIM14))
// TIM8_TRG_COM_TIM14_IRQHandler();
if ((TIMx == TIM1) || (TIMx == TIM10))
TIM1_UP_TIM10_IRQHandler();
else if (TIMx == TIM2)
TIM2_IRQHandler();
else if (TIMx == TIM3)
TIM3_IRQHandler();
else if (TIMx == TIM4)
TIM4_IRQHandler();
else if (TIMx == TIM5)
TIM5_IRQHandler();
else if (TIMx == TIM6)
TIM6_DAC_IRQHandler();
else if (TIMx == TIM7)
TIM7_IRQHandler();
else if ((TIMx == TIM8) || (TIMx == TIM13))
TIM8_UP_TIM13_IRQHandler();
else if ((TIMx == TIM1) || (TIMx == TIM9))
TIM1_BRK_TIM9_IRQHandler();
else if ((TIMx == TIM1) || (TIMx == TIM11))
TIM1_TRG_COM_TIM11_IRQHandler();
else if ((TIMx == TIM8) || (TIMx == TIM12))
TIM8_BRK_TIM12_IRQHandler();
else if ((TIMx == TIM8) || (TIMx == TIM14))
TIM8_TRG_COM_TIM14_IRQHandler();
}
//------------------------------------------------------------------//