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Core/Config/SEGGER_RTT_Conf.h

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+/*********************************************************************
+*                    SEGGER Microcontroller GmbH                     *
+*                        The Embedded Experts                        *
+**********************************************************************
+*                                                                    *
+*            (c) 1995 - 2021 SEGGER Microcontroller GmbH             *
+*                                                                    *
+*       www.segger.com     Support: support@segger.com               *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SEGGER RTT * Real Time Transfer for embedded targets         *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+* All rights reserved.                                               *
+*                                                                    *
+* SEGGER strongly recommends to not make any changes                 *
+* to or modify the source code of this software in order to stay     *
+* compatible with the RTT protocol and J-Link.                       *
+*                                                                    *
+* Redistribution and use in source and binary forms, with or         *
+* without modification, are permitted provided that the following    *
+* condition is met:                                                  *
+*                                                                    *
+* o Redistributions of source code must retain the above copyright   *
+*   notice, this condition and the following disclaimer.             *
+*                                                                    *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
+* DAMAGE.                                                            *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       RTT version: 8.10g                                           *
+*                                                                    *
+**********************************************************************
+
+---------------------------END-OF-HEADER------------------------------
+File    : SEGGER_RTT_Conf.h
+Purpose : Implementation of SEGGER real-time transfer (RTT) which
+          allows real-time communication on targets which support
+          debugger memory accesses while the CPU is running.
+Revision: $Rev: 24316 $
+
+*/
+
+#ifndef SEGGER_RTT_CONF_H
+#define SEGGER_RTT_CONF_H
+
+#ifdef __IAR_SYSTEMS_ICC__
+  #include <intrinsics.h>
+#endif
+
+/*********************************************************************
+*
+*       Defines, configurable
+*
+**********************************************************************
+*/
+
+//
+// Take in and set to correct values for Cortex-A systems with CPU cache
+//
+//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE            (32)          // Largest cache line size (in bytes) in the current system
+//#define SEGGER_RTT_UNCACHED_OFF                   (0xFB000000)  // Address alias where RTT CB and buffers can be accessed uncached
+//
+// Most common case:
+// Up-channel 0: RTT
+// Up-channel 1: SystemView
+//
+#ifndef   SEGGER_RTT_MAX_NUM_UP_BUFFERS
+  #define SEGGER_RTT_MAX_NUM_UP_BUFFERS             (3)     // Max. number of up-buffers (T->H) available on this target    (Default: 3)
+#endif
+//
+// Most common case:
+// Down-channel 0: RTT
+// Down-channel 1: SystemView
+//
+#ifndef   SEGGER_RTT_MAX_NUM_DOWN_BUFFERS
+  #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS           (3)     // Max. number of down-buffers (H->T) available on this target  (Default: 3)
+#endif
+
+#ifndef   BUFFER_SIZE_UP
+  #define BUFFER_SIZE_UP                            (4096)  // Size of the buffer for terminal output of target, up to host (Default: 1k)
+#endif
+
+#ifndef   BUFFER_SIZE_DOWN
+  #define BUFFER_SIZE_DOWN                          (16)    // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16)
+#endif
+
+#ifndef   SEGGER_RTT_PRINTF_BUFFER_SIZE
+  #define SEGGER_RTT_PRINTF_BUFFER_SIZE             (64u)    // Size of buffer for RTT printf to bulk-send chars via RTT     (Default: 64)
+#endif
+
+#ifndef   SEGGER_RTT_MODE_DEFAULT
+  #define SEGGER_RTT_MODE_DEFAULT                   SEGGER_RTT_MODE_NO_BLOCK_TRIM // Mode for pre-initialized terminal channel (buffer 0)
+#endif
+
+/*********************************************************************
+*
+*       RTT memcpy configuration
+*
+*       memcpy() is good for large amounts of data,
+*       but the overhead is big for small amounts, which are usually stored via RTT.
+*       With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead.
+*
+*       SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions.
+*       This is may be required with memory access restrictions,
+*       such as on Cortex-A devices with MMU.
+*/
+#ifndef   SEGGER_RTT_MEMCPY_USE_BYTELOOP
+  #define SEGGER_RTT_MEMCPY_USE_BYTELOOP              0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop
+#endif
+//
+// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets
+//
+//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__))
+//  #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes)      SEGGER_memcpy((pDest), (pSrc), (NumBytes))
+//#endif
+
+//
+// Target is not allowed to perform other RTT operations while string still has not been stored completely.
+// Otherwise we would probably end up with a mixed string in the buffer.
+// If using  RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here.
+//
+// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4.
+// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches.
+// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly.
+// (Higher priority = lower priority number)
+// Default value for embOS: 128u
+// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC
+// or define SEGGER_RTT_LOCK() to completely disable interrupts.
+//
+#ifndef   SEGGER_RTT_MAX_INTERRUPT_PRIORITY
+  #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY         (0x20)   // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20)
+#endif
+
+/*********************************************************************
+*
+*       RTT lock configuration for SEGGER Embedded Studio,
+*       Rowley CrossStudio and GCC
+*/
+#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32))
+  #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__))
+    #define SEGGER_RTT_LOCK()   {                                                                   \
+                                    unsigned int _SEGGER_RTT__LockState;                                         \
+                                  __asm volatile ("mrs   %0, primask  \n\t"                         \
+                                                  "movs  r1, #1       \n\t"                         \
+                                                  "msr   primask, r1  \n\t"                         \
+                                                  : "=r" (_SEGGER_RTT__LockState)                                \
+                                                  :                                                 \
+                                                  : "r1", "cc"                                      \
+                                                  );
+
+    #define SEGGER_RTT_UNLOCK()   __asm volatile ("msr   primask, %0  \n\t"                         \
+                                                  :                                                 \
+                                                  : "r" (_SEGGER_RTT__LockState)                                 \
+                                                  :                                                 \
+                                                  );                                                \
+                                }
+  #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__))
+    #ifndef   SEGGER_RTT_MAX_INTERRUPT_PRIORITY
+      #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY   (0x20)
+    #endif
+    #define SEGGER_RTT_LOCK()   {                                                                   \
+                                    unsigned int _SEGGER_RTT__LockState;                                         \
+                                  __asm volatile ("mrs   %0, basepri  \n\t"                         \
+                                                  "mov   r1, %1       \n\t"                         \
+                                                  "msr   basepri, r1  \n\t"                         \
+                                                  : "=r" (_SEGGER_RTT__LockState)                                \
+                                                  : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY)          \
+                                                  : "r1", "cc"                                      \
+                                                  );
+
+    #define SEGGER_RTT_UNLOCK()   __asm volatile ("msr   basepri, %0  \n\t"                         \
+                                                  :                                                 \
+                                                  : "r" (_SEGGER_RTT__LockState)                                 \
+                                                  :                                                 \
+                                                  );                                                \
+                                }
+
+  #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__))
+    #define SEGGER_RTT_LOCK() {                                                \
+                                 unsigned int _SEGGER_RTT__LockState;                       \
+                                 __asm volatile ("mrs r1, CPSR \n\t"           \
+                                                 "mov %0, r1 \n\t"             \
+                                                 "orr r1, r1, #0xC0 \n\t"      \
+                                                 "msr CPSR_c, r1 \n\t"         \
+                                                 : "=r" (_SEGGER_RTT__LockState)            \
+                                                 :                             \
+                                                 : "r1", "cc"                  \
+                                                 );
+
+    #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t"              \
+                                                "mrs r1, CPSR \n\t"            \
+                                                "bic r1, r1, #0xC0 \n\t"       \
+                                                "and r0, r0, #0xC0 \n\t"       \
+                                                "orr r1, r1, r0 \n\t"          \
+                                                "msr CPSR_c, r1 \n\t"          \
+                                                :                              \
+                                                : "r" (_SEGGER_RTT__LockState)              \
+                                                : "r0", "r1", "cc"             \
+                                                );                             \
+                            }
+  #elif defined(__riscv) || defined(__riscv_xlen)
+    #define SEGGER_RTT_LOCK()  {                                               \
+                                 unsigned int _SEGGER_RTT__LockState;                       \
+                                 __asm volatile ("csrr  %0, mstatus  \n\t"     \
+                                                 "csrci mstatus, 8   \n\t"     \
+                                                 "andi  %0, %0,  8   \n\t"     \
+                                                 : "=r" (_SEGGER_RTT__LockState)            \
+                                                 :                             \
+                                                 :                             \
+                                                );
+
+  #define SEGGER_RTT_UNLOCK()    __asm volatile ("csrr  a1, mstatus  \n\t"     \
+                                                 "or    %0, %0, a1   \n\t"     \
+                                                 "csrs  mstatus, %0  \n\t"     \
+                                                 :                             \
+                                                 : "r"  (_SEGGER_RTT__LockState)            \
+                                                 : "a1"                        \
+                                                );                             \
+                               }
+  #else
+    #define SEGGER_RTT_LOCK()
+    #define SEGGER_RTT_UNLOCK()
+  #endif
+#endif
+
+/*********************************************************************
+*
+*       RTT lock configuration for IAR EWARM
+*/
+#ifdef __ICCARM__
+  #if (defined (__ARM6M__)          && (__CORE__ == __ARM6M__))             ||                      \
+      (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__))
+    #define SEGGER_RTT_LOCK()   {                                                                   \
+                                  unsigned int _SEGGER_RTT__LockState;                                           \
+                                  _SEGGER_RTT__LockState = __get_PRIMASK();                                      \
+                                  __set_PRIMASK(1);
+
+    #define SEGGER_RTT_UNLOCK()   __set_PRIMASK(_SEGGER_RTT__LockState);                                         \
+                                }
+  #elif (defined (__ARM7EM__)         && (__CORE__ == __ARM7EM__))          ||                      \
+        (defined (__ARM7M__)          && (__CORE__ == __ARM7M__))           ||                      \
+        (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__))  ||                      \
+        (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__))
+    #ifndef   SEGGER_RTT_MAX_INTERRUPT_PRIORITY
+      #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY   (0x20)
+    #endif
+    #define SEGGER_RTT_LOCK()   {                                                                   \
+                                  unsigned int _SEGGER_RTT__LockState;                                           \
+                                  _SEGGER_RTT__LockState = __get_BASEPRI();                                      \
+                                  __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
+
+    #define SEGGER_RTT_UNLOCK()   __set_BASEPRI(_SEGGER_RTT__LockState);                                         \
+                                }
+  #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__))                    ||                      \
+        (defined (__ARM7R__) && (__CORE__ == __ARM7R__))
+    #define SEGGER_RTT_LOCK() {                                                                     \
+                                 unsigned int _SEGGER_RTT__LockState;                                            \
+                                 __asm volatile ("mrs r1, CPSR \n\t"                                \
+                                                 "mov %0, r1 \n\t"                                  \
+                                                 "orr r1, r1, #0xC0 \n\t"                           \
+                                                 "msr CPSR_c, r1 \n\t"                              \
+                                                 : "=r" (_SEGGER_RTT__LockState)                                 \
+                                                 :                                                  \
+                                                 : "r1", "cc"                                       \
+                                                 );
+
+    #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t"                                   \
+                                                "mrs r1, CPSR \n\t"                                 \
+                                                "bic r1, r1, #0xC0 \n\t"                            \
+                                                "and r0, r0, #0xC0 \n\t"                            \
+                                                "orr r1, r1, r0 \n\t"                               \
+                                                "msr CPSR_c, r1 \n\t"                               \
+                                                :                                                   \
+                                                : "r" (_SEGGER_RTT__LockState)                                   \
+                                                : "r0", "r1", "cc"                                  \
+                                                );                                                  \
+                            }
+  #endif
+#endif
+
+/*********************************************************************
+*
+*       RTT lock configuration for IAR RX
+*/
+#ifdef __ICCRX__
+  #define SEGGER_RTT_LOCK()   {                                                                     \
+                                unsigned long _SEGGER_RTT__LockState;                                            \
+                                _SEGGER_RTT__LockState = __get_interrupt_state();                                \
+                                __disable_interrupt();
+
+  #define SEGGER_RTT_UNLOCK()   __set_interrupt_state(_SEGGER_RTT__LockState);                                   \
+                              }
+#endif
+
+/*********************************************************************
+*
+*       RTT lock configuration for IAR RL78
+*/
+#ifdef __ICCRL78__
+  #define SEGGER_RTT_LOCK()   {                                                                     \
+                                __istate_t _SEGGER_RTT__LockState;                                               \
+                                _SEGGER_RTT__LockState = __get_interrupt_state();                                \
+                                __disable_interrupt();
+
+  #define SEGGER_RTT_UNLOCK()   __set_interrupt_state(_SEGGER_RTT__LockState);                                   \
+                              }
+#endif
+
+/*********************************************************************
+*
+*       RTT lock configuration for KEIL ARM
+*/
+#ifdef __CC_ARM
+  #if (defined __TARGET_ARCH_6S_M)
+    #define SEGGER_RTT_LOCK()   {                                                                   \
+                                  unsigned int _SEGGER_RTT__LockState;                                           \
+                                  register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask");                 \
+                                  _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK;                                              \
+                                  _SEGGER_RTT__PRIMASK = 1u;                                                     \
+                                  __schedule_barrier();
+
+    #define SEGGER_RTT_UNLOCK()   _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState;                                              \
+                                  __schedule_barrier();                                             \
+                                }
+  #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M))
+    #ifndef   SEGGER_RTT_MAX_INTERRUPT_PRIORITY
+      #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY   (0x20)
+    #endif
+    #define SEGGER_RTT_LOCK()   {                                                                   \
+                                  unsigned int _SEGGER_RTT__LockState;                                           \
+                                  register unsigned char BASEPRI __asm( "basepri");                 \
+                                  _SEGGER_RTT__LockState = BASEPRI;                                              \
+                                  BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY;                      \
+                                  __schedule_barrier();
+
+    #define SEGGER_RTT_UNLOCK()   BASEPRI = _SEGGER_RTT__LockState;                                              \
+                                  __schedule_barrier();                                             \
+                                }
+  #endif
+#endif
+
+/*********************************************************************
+*
+*       RTT lock configuration for TI ARM
+*/
+#ifdef __TI_ARM__
+  #if defined (__TI_ARM_V6M0__)
+    #define SEGGER_RTT_LOCK()   {                                                                   \
+                                  unsigned int _SEGGER_RTT__LockState;                                           \
+                                  _SEGGER_RTT__LockState = __get_PRIMASK();                                      \
+                                  __set_PRIMASK(1);
+
+    #define SEGGER_RTT_UNLOCK()   __set_PRIMASK(_SEGGER_RTT__LockState);                                         \
+                                }
+  #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__))
+    #ifndef   SEGGER_RTT_MAX_INTERRUPT_PRIORITY
+      #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY   (0x20)
+    #endif
+    #define SEGGER_RTT_LOCK()   {                                                                   \
+                                  unsigned int _SEGGER_RTT__LockState;                                           \
+                                  _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
+
+    #define SEGGER_RTT_UNLOCK()   _set_interrupt_priority(_SEGGER_RTT__LockState);                               \
+                                }
+  #endif
+#endif
+
+/*********************************************************************
+*
+*       RTT lock configuration for CCRX
+*/
+#ifdef __RX
+  #include <machine.h>
+  #define SEGGER_RTT_LOCK()   {                                                                     \
+                                unsigned long _SEGGER_RTT__LockState;                                            \
+                                _SEGGER_RTT__LockState = get_psw() & 0x010000;                                   \
+                                clrpsw_i();
+
+  #define SEGGER_RTT_UNLOCK()   set_psw(get_psw() | _SEGGER_RTT__LockState);                                     \
+                              }
+#endif
+
+/*********************************************************************
+*
+*       RTT lock configuration for embOS Simulation on Windows
+*       (Can also be used for generic RTT locking with embOS)
+*/
+#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS)
+
+void OS_SIM_EnterCriticalSection(void);
+void OS_SIM_LeaveCriticalSection(void);
+
+#define SEGGER_RTT_LOCK()       {                                                                   \
+                                  OS_SIM_EnterCriticalSection();
+
+#define SEGGER_RTT_UNLOCK()       OS_SIM_LeaveCriticalSection();                                    \
+                                }
+#endif
+
+/*********************************************************************
+*
+*       RTT lock configuration fallback
+*/
+#ifndef   SEGGER_RTT_LOCK
+  #define SEGGER_RTT_LOCK()                // Lock RTT (nestable)   (i.e. disable interrupts)
+#endif
+
+#ifndef   SEGGER_RTT_UNLOCK
+  #define SEGGER_RTT_UNLOCK()              // Unlock RTT (nestable) (i.e. enable previous interrupt lock state)
+#endif
+
+#endif
+/*************************** End of file ****************************/

Core/Config/memspi_config.h

@@ -0,0 +1,70 @@
+/**
+******************************************************************************
+* @file memspi_config.h
+* @brief Конфигурационные параметры для общения с FLASH/EEPROM по SPI
+******************************************************************************
+@addtogroup MEMSPI_CONFIGS Memory SPI configs
+@ingroup    MEMSPI
+@brief Конфигурация библиотеки
+@{
+******************************************************************************
+* @details
+Файл содержит настройки для работы Memory SPI:
+Размеры страниц и секторов внешней памяти
+Включение двойного статус регистра (если соответствующая микросхема)
+- Низкоуровневые функции для приема/передачи по SPI и выбора чипа ChipSelect
+******************************************************************************/
+#ifndef __SPI_MEMORY_CONFIG_H_
+#define __SPI_MEMORY_CONFIG_H_
+#include "upp_defs.h"
+
+/////////////////////////---USER SETTINGS---/////////////////////////
+
+//#define MEMSPI_SEPARATED_STATUS_REGISTER ///< Использовать двойной статус регистр
+
+#define     MEMSPI_SECTOR_SIZE          (0x1000)  ///< Размер одного сектора памяти (4096 байт)
+#define     MEMSPI_PAGE_SIZE            (0x100)   ///< Размер одной страницы памяти (256 байт)
+
+
+/** @defgroup MEMSPI_LowLevel Config Hardware SPI
+ *  @brief Конфигурация функций для доступа к SPI
+ *  @{
+ */
+
+/** 
+	* @brief 	SPI Transmit.
+	* @param 	_hmemspi_   Указатель на хендл внешней памяти.
+	* @param 	_data_ 		Указатель на данные для отправки.
+	* @param 	_size_ 		Размер данных для отправки.
+	* @param 	_timeout_	Время, за которое должна быть осуществлена отправка.
+	* @note 	Здесь вызывается только функция HAL, и ничего больше.
+	*/
+#define MEMSPI_SPI_Transmit(_hmemspi_, _data_, _size_, _timeout_)  HAL_SPI_Transmit(_hmemspi_->hspi, _data_, _size_, _timeout_)
+/** 
+	* @brief 	SPI Receive.
+	* @param 	_hmemspi_ Указатель на хендл внешней памяти.
+	* @param 	_data_ 		Указатель на буффер для прниема данных.
+	* @param 	_size_ 		Размер данных для приема.
+	* @param 	_timeout_	Время, за которое должен быть осуществлен прием.
+	* @note 	Здесь вызывается только функция HAL, и ничего больше.
+	*/
+#define MEMSPI_SPI_Receive(_hmemspi_, _data_, _size_, _timeout_)  	HAL_SPI_Receive(_hmemspi_->hspi, _data_, _size_, _timeout_)
+
+/**  
+	* @brief 	Select MEMORY chip.
+	*/
+#define     MEMSPI_Select(_hmemspi_)    (_hmemspi_->CS_GPIOx->BSRR = _hmemspi_->CS_PIN << 16)
+/**  
+	* @brief 	Deselect MEMORY chip.
+	*/
+#define     MEMSPI_Deselect(_hmemspi_)  (_hmemspi_->CS_GPIOx->BSRR = _hmemspi_->CS_PIN)
+
+/**  //MEMSPI_LowLevel
+  * @}
+  */
+
+#endif // __SPI_MEMORY_CONFIG_H_
+
+/**  //MEMSPI_CONFIGS
+  * @}
+  */

Core/Config/modbus_config.h

@@ -0,0 +1,70 @@
+/**
+******************************************************************************
+* @file modbus_config.h
+* @brief Конфигурационные параметры Modbus устройства
+******************************************************************************
+@addtogroup MODBUS_CONFIGS Modbus configs
+@ingroup    MODBUS
+@brief Конфигурация библиотеки
+@{
+******************************************************************************
+* @details
+Файл содержит настройки для работы Modbus:
+- Подключение библиотек контроллера
+- ID устройства и таймауты
+- Строковые идентификаторы (Vendor, Product, Revision)
+- Настройки периферии (UART, TIMER)
+- Подключение модулей Modbus
+- Опциональные функции (переключение команд 0x03/0x04)
+******************************************************************************/
+#ifndef _MODBUS_CONFIG_H_
+#define _MODBUS_CONFIG_H_
+
+// Общие параметры
+#define MODBUS_DEVICE_ID              1       ///< Адрес устройства в сети Modbus
+#define MODBUS_TIMEOUT                5000    ///< Таймаут в тиках таймера
+
+// Строковые идентификаторы устройства
+#define MODBUS_VENDOR_NAME            "NIO-12"
+#define MODBUS_PRODUCT_CODE           ""
+#define MODBUS_REVISION               ""
+#define MODBUS_VENDOR_URL             ""
+#define MODBUS_PRODUCT_NAME           ""
+#define MODBUS_MODEL_NAME             ""
+#define MODBUS_USER_APPLICATION_NAME  ""
+
+#define MODBUS_NUMB_OF_USEROBJECTS    0   ///< Количество пользовательских объектов
+#define MODBUS_USEROBJECT_0_NAME      ""  ///< Строка пользовательского идентификатора 0. По аналогии можно определить строки до <=128 USEROBJECT
+
+// Периферия (опционально)
+//#define mb_huart                      huart1        ///< Удобный дефайн для модбасовского uart
+//#define mb_htim                       htim3         ///< Удобный дефайн для модбасовского таймера
+#define RS_EnableReceive()            UPP_UART1_SetDirection(GPIO_PIN_RESET) ///< Функция изменения направления передачи на ПРИЕМ для RS-485
+#define RS_EnableTransmit()           UPP_UART1_SetDirection(GPIO_PIN_RESET) ///< Функция изменения направления передачи на ПЕРЕДАЧУ для RS-485
+
+
+// Модули modbus
+#define MODBUS_ENABLE_SLAVE                   ///< Включить обработку СЛЕЙВ режима
+#define MODBUS_ENABLE_MASTER                  ///< Включить обработку МАСТЕР режима
+
+#define MODBUS_ENABLE_COILS                   ///< Включить обработку коилов
+#define MODBUS_ENABLE_HOLDINGS                ///< Включить обработку регистров хранения
+#define MODBUS_ENABLE_INPUTS                  ///< Включить обработку входных регистров
+#define MODBUS_ENABLE_DEVICE_IDENTIFICATIONS  ///< Включить обработку идентификаторы устройства
+#define MODBUS_ENABLE_DIAGNOSTICS             ///< Включить обработку диагностики модбас
+
+//#define MODBUS_PROTOCOL_TCP                   ///< Включить TCP-протокол, иначе - RTU
+
+/**
+  * @brief    Поменять комманды 0x03 и 0x04 местами (для LabView терминалки от двигателей)
+  * @details  Терминалка от двигателей использует для чтения регистров комманду R_HOLD_REGS вместо R_IN_REGS
+  *           Поэтому чтобы считывать Input Regs - надо поменять их местами.
+  */
+//#define MODBUS_SWITCH_COMMAND_R_IN_REGS_AND_R_HOLD_REGS
+
+/////////////////////////////////////////////////////////////////////
+/////////////////////////---CALC DEFINES---//////////////////////////
+
+
+  
+#endif //_MODBUS_CONFIG_H_

Core/Config/modbus_data.c

@@ -0,0 +1,151 @@
+/**
+******************************************************************************
+* @file modbus_data.c
+* @brief Функции доступа к данным Modbus
+******************************************************************************
+* @details
+Модуль реализует функции валидации адресов и доступа к данным:
+- Проверка корректности запрашиваемых адресов
+- Определение указателей на реальные данные в памяти
+- Поддержка пользовательских массивов регистров и coils
+
+@section Валидация адресов:
+- MB_Check_Address_For_Arr() - проверка принадлежности адреса массиву
+- MB_DefineRegistersAddress() - получение указателя на регистры
+- MB_DefineCoilsAddress() - получение указателя на coils
+
+******************************************************************************/
+
+#include "modbus_core.h"
+#include "modbus_coils.h"
+#include "modbus_holdregs.h"
+#include "modbus_inputregs.h"
+#include "modbus_devid.h"
+
+/* DEFINE DATA FOR MODBUS */
+MB_DataStructureTypeDef MB_DATA = {0};   ///< Coils & Registers
+MB_DataInternalTypeDef MB_INTERNAL;
+
+/** 
+  * @brief    Check is address valid for certain array.
+  * @param    Addr          Начальный адресс.
+  * @param    Qnt           Количество запрашиваемых элементов.
+  * @param    R_ARR_ADDR    Начальный адресс массива R_ARR.
+  * @param    R_ARR_NUMB    Количество элементов в массиве R_ARR.
+  * @return   ExceptionCode - ET_ILLEGAL_DATA_ADRESS если адресс недействителен, и ET_NO_ERRORS если все ок.
+  *
+  * @details  Позволяет определить, принадлежит ли адресс Addr массиву R_ARR:
+  *           Если адресс Addr находится в диапазоне адрессов массива R_ARR, то возвращаем NO_ERROR.
+  *           Если адресс Addr находится за пределами адрессов массива R_ARR - ET_ILLEGAL_DATA_ADDRESSю.
+  */
+MB_ExceptionTypeDef MB_Check_Address_For_Arr(uint16_t Addr, uint16_t Qnt, uint16_t R_ARR_ADDR, uint16_t R_ARR_NUMB)
+{
+  // if address from this array
+  if(Addr >= R_ARR_ADDR) 
+  {   
+    // if quantity too big return error
+    if ((Addr - R_ARR_ADDR) + Qnt > R_ARR_NUMB) 
+    {
+      return ET_ILLEGAL_DATA_ADDRESS;  // return exception code
+    }
+    // if all ok - return no errors
+    return ET_NO_ERRORS;
+  }
+  // if address isnt from this array return error
+  else 
+    return ET_ILLEGAL_DATA_ADDRESS;  // return exception code    
+}
+/** 
+  * @brief    Define Address Origin for Input/Holding Registers
+  * @param    pRegs         Указатель на указатель регистров.
+  * @param    Addr          Адрес начального регистра.
+  * @param    Qnt           Количество запрашиваемых регистров.
+  * @param    WriteFlag     Флаг регистр нужны для чтения или записи.
+  * @return   ExceptionCode Код исключения если есть, и ET_NO_ERRORS если нет.
+  *
+  * @details  Определение адреса начального регистра.
+  * @note     WriteFlag пока не используется.
+  */
+MB_ExceptionTypeDef MB_DefineRegistersAddress(uint16_t **pRegs, uint16_t Addr, uint16_t Qnt, uint8_t RegisterType, uint8_t WriteFlag)
+{ 
+  
+  /* check quantity error */
+  if (Qnt > MbData_size)  
+  {   
+      return ET_ILLEGAL_DATA_VALUE;  // return exception code
+  }
+  
+  if(RegisterType == RegisterType_Holding)
+  {
+    // Default holding registers
+    if(MB_Check_Address_For_Arr(Addr, Qnt, R_HOLDING_ADDR, R_HOLDING_QNT) == ET_NO_ERRORS)
+    {
+      *pRegs = MB_Set_Register_Ptr(&MB_DATA.HoldRegs, Addr - R_HOLDING_ADDR);  // указатель на выбранный по Addr регистр
+    }
+    else if(MB_Check_Address_For_Arr(Addr, Qnt, R_HOLDING_PRVT_PARAMS_ADR, R_HOLDING_PRVT_PARAMS_QNT) == ET_NO_ERRORS)
+    {
+      *pRegs = MB_Set_Register_Ptr(&MB_INTERNAL, Addr - R_HOLDING_PRVT_PARAMS_ADR);  // указатель на выбранный по Addr регистр
+    }
+    // if address doesnt match any array - return illegal data address response
+    else  
+    {
+      return ET_ILLEGAL_DATA_ADDRESS;
+    }
+  }
+  else if(RegisterType == RegisterType_Input)
+  {
+    // Default input registers
+    if(MB_Check_Address_For_Arr(Addr, Qnt, R_INPUT_ADDR, R_INPUT_QNT) == ET_NO_ERRORS)
+    {
+      *pRegs = MB_Set_Register_Ptr(&MB_DATA.InRegs, Addr - R_INPUT_ADDR);  // указатель на выбранный по Addr регистр
+    }
+    // if address doesnt match any array - return illegal data address response
+    else  
+    {
+      return ET_ILLEGAL_DATA_ADDRESS;
+    }
+  }
+  else
+  {
+      return ET_ILLEGAL_FUNCTION;
+  }
+  // if found requeried array return no err
+  return ET_NO_ERRORS; // return no errors
+}
+/** 
+  * @brief    Define Address Origin for coils
+  * @param    pCoils        Указатель на указатель коилов.
+  * @param    Addr          Адресс начального коила.
+  * @param    Qnt           Количество запрашиваемых коилов.
+  * @param    start_shift   Указатель на переменную содержащую сдвиг внутри регистра для начального коила.
+  * @param    WriteFlag     Флаг коилы нужны для чтения или записи.
+  * @return   ExceptionCode Код исключения если есть, и ET_NO_ERRORS если нет.
+  *
+  * @details  Определение адреса начального регистра запрашиваемых коилов.
+  * @note     WriteFlag используется для определния регистров GPIO: ODR или IDR.
+  */
+MB_ExceptionTypeDef MB_DefineCoilsAddress(uint16_t **pCoils, uint16_t Addr, uint16_t Qnt, uint16_t *start_shift, uint8_t WriteFlag)
+{ 
+  /* В режиме работа ничего не записываем */
+  
+  /* check quantity error */
+  if (Qnt > 2000) 
+  {
+    return ET_ILLEGAL_DATA_VALUE;  // return exception code
+  }
+    
+  // Default coils
+  if(MB_Check_Address_For_Arr(Addr, Qnt, C_COILS_ADDR, C_COILS_QNT) == ET_NO_ERRORS)
+  {
+    *pCoils = MB_Set_Coil_Reg_Ptr(&MB_DATA.Coils, Addr - C_COILS_ADDR);  // указатель на выбранный по Addr массив коилов
+  }
+  // if address doesnt match any array - return illegal data address response
+  else  
+  {
+    return ET_ILLEGAL_DATA_ADDRESS;
+  }
+  
+  *start_shift = Addr % 16; // set shift to requested coil
+  // if found requeried array return no err
+  return ET_NO_ERRORS; // return no errors
+}

Core/Config/modbus_data.h

@@ -0,0 +1,167 @@
+/**
+******************************************************************************
+* @file modbus_data.h
+* @brief Определения структур данных Modbus устройства
+******************************************************************************
+@defgroup MODBUS_DATA Modbus Registers Map
+@ingroup MODBUS
+@brief Определение карты регистров и коилов
+******************************************************************************
+* @details
+Файл содержит объявления структур данных, доступных через Modbus:
+- Holding Registers (R/W) - регистры хранения
+- Input Registers (R/O) - входные регистры  
+- Coils (R/W) - дискретные выходы
+
+@section datinit Базовая настройка под устройство:
+1. Настроить диапазоны адресов
+  - @ref R_INPUT_ADDR и @ref R_INPUT_QNT для входных регистров
+  - @ref R_HOLDING_ADDR и @ref R_HOLDING_QNT для регистров хранения
+  - @ref C_COILS_ADDR и @ref C_COILS_ADDR для коилов
+3. Настроить структуры данных:
+  - @ref MB_DataInRegsTypeDef
+  - @ref MB_DataHoldRegsTypeDef
+  - @ref MB_DataCoilsTypeDef
+    
+
+@section datexpert Расширенная настройка под устройство:
+1. Добавить новый массив с нужными данными.
+2. Добавить дефайны для определения его начального адреса и количества элементов
+3. Добавить проверку адресов в MB_DefineRegistersAddress/MB_DefineCoilsAddress. 
+
+   Пример:
+   @code
+    #define   R_USER_ADDR        555
+    #define   R_USER_QNT         16
+    uint16_t  user_regs[16];
+
+    //...
+    else if(MB_Check_Address_For_Arr(Addr, Qnt, R_USER_ADDR, R_USER_QNT) == ET_NO_ERRORS)
+    {
+      *pRegs = MB_Set_Register_Ptr(&user_regs, Addr-R_USER_ADDR); // ВАЖНО!
+      // -R_USER_ADDR нужен чтобы взять адрес относительно начала массива
+    }
+    else  
+    {
+      return ET_ILLEGAL_DATA_ADDRESS;
+    }
+   @endcode
+******************************************************************************/
+
+#ifndef _MODBUS_DATA_H_
+#define _MODBUS_DATA_H_
+
+#include "stdint.h"
+
+
+
+//--------------SIZES OF DATA---------------
+#define R_HOLDING_PRVT_PARAMS_ADR   555
+#define R_HOLDING_PRVT_PARAMS_QNT   (sizeof(UPP_PrvtParams_t)/sizeof(uint16_t))
+
+// DEFINES FOR INPUT REGISTERS ARRAYS
+#define   R_INPUT_ADDR        0   ///< Начальный адрес входных регистров
+#define   R_INPUT_QNT         (sizeof(UPP_PUI_Values_t)/sizeof(uint16_t))  ///< Количество входных регистров
+
+// DEFINES FOR HOLDING REGISTERS ARRAYS
+#define   R_HOLDING_ADDR      0   ///< Начальный адрес регистров хранения
+#define   R_HOLDING_QNT       (sizeof(UPP_PUI_Params_t)/sizeof(uint16_t))  ///< Количество регистров хранения
+
+// DEFINES FOR COIL ARRAYS
+#define   C_COILS_ADDR        0   ///< Начальный адрес коилов
+#define   C_COILS_QNT         16  ///< Количество регистров коилов
+
+//--------------DEFINES FOR REGISTERS---------------
+// DEFINES FOR ARRAYS
+/** 
+  * @addtogroup MODBUS_DATA_RERISTERS_DEFINES Registers structures
+  * @ingroup    MODBUS_DATA
+  * @brief      Стуруктура регистров (входных и хранения)
+  @code    
+  Для массивов регистров:
+    R_<NAME_ARRAY>_ADDR   -  модбас адресс первого регистра в массиве
+    R_<NAME_ARRAY>_QNT    -  количество регистров в массиве
+  @endcode
+  * @{
+  */
+  
+  
+/** 
+  * @brief Регистры хранения
+  */
+typedef struct //MB_DataInRegsTypeDef
+{
+  
+}MB_DataInRegsTypeDef;
+
+
+/** 
+  * @brief Входные регистры 
+  */
+typedef struct //MB_DataInRegsTypeDef
+{
+  
+}MB_DataHoldRegsTypeDef;
+
+
+/** MODBUS_DATA_RERISTERS_DEFINES
+  * @} 
+  */
+
+//----------------DEFINES FOR COILS-----------------
+/** 
+  * @addtogroup MODBUS_DATA_COILS_DEFINES Coils Structure
+  * @ingroup    MODBUS_DATA
+  * @brief      Структура коилов
+  @code    
+  Структура дефайна
+  Для массивов коилов:
+    C_<NAME_ARRAY>_ADDR   - модбас адресс первого коила в массиве
+    C_<NAME_ARRAY>_QNT    - количество коилов в массиве (минимум 16)
+  @endcode
+  * @{
+  */
+  
+  
+  
+/** 
+  * @brief     Коилы
+  * @details   Желательно с помощью reserved делать стркутуру кратной 16-битам
+  */
+typedef struct //MB_DataCoilsTypeDef
+{
+  unsigned reserved:16;
+}MB_DataCoilsTypeDef;
+
+/** MODBUS_DATA_COILS_DEFINES
+  * @} 
+  */
+  
+  
+//-----------MODBUS DEVICE DATA SETTING-------------
+// MODBUS DATA STRUCTTURE
+/** 
+  * @brief Структура со всеми регистрами и коилами модбас 
+  * @ingroup  MODBUS_DATA
+  */
+typedef struct // tester modbus data
+{
+  MB_DataInRegsTypeDef      InRegs;     ///< Modbus input registers @ref MB_DataInRegsTypeDef
+
+  MB_DataCoilsTypeDef       Coils;      ///< Modbus coils @ref MB_DataCoilsTypeDef
+  
+  MB_DataHoldRegsTypeDef    HoldRegs;   ///< Modbus holding registers @ref MB_DataHoldRegsTypeDef
+}MB_DataStructureTypeDef;
+extern MB_DataStructureTypeDef MB_DATA;
+
+
+typedef struct
+{
+  
+}MB_DataInternalTypeDef;
+extern MB_DataInternalTypeDef MB_INTERNAL;
+
+#endif //_MODBUS_DATA_H_
+
+/////////////////////////////////////////////////////////////
+///////////////////////TEMP/OUTDATE/OTHER////////////////////

Core/Config/mylibs_config.h

@@ -0,0 +1,152 @@
+/** 
+**************************************************************************
+* @file mylibs_config.h
+* @brief Конфигурации для библиотек MyLibs
+**************************************************************************
+* @defgroup MYLIBS_CONFIG   Configs
+* @ingroup  MYLIBS_ALL
+* @brief    Конфигурации для библиотек MyLibs
+* @{
+*************************************************************************/
+#ifndef __MYLIBS_CONFIG_H_
+#define __MYLIBS_CONFIG_H_
+#include "stm32g4xx_hal.h"
+// user includes
+/** 
+  * @addtogroup TRACE_CONFIG   Trace configs
+  * @ingroup    MYLIBS_CONFIG
+  * @brief      Конфигурация трекеров и трассировки
+  * @{
+  */
+
+//#define TRACKERS_ENABLE           ///< Включить трекеры
+//#define SERIAL_TRACE_ENABLE       ///< Включить serial трассировку
+//#define RTT_TRACE_ENABLE          ///< Включить serial трассировку через RTT
+//#define SWO_TRACE_ENABLE          ///< Включить serial трассировку через SWO
+/**
+  * @brief Уровень log serial трассировки @ref log_printf
+  *  - LOG_LEVEL == 0 - логирование отключено (макрос пустой)
+  *  - LOG_LEVEL == 1 - выводится время и TAG
+  *  - LOG_LEVEL >= 2 - выводится время, TAG, имя файла и номер строки
+  */
+#define LOG_LEVEL 1
+
+#define RTT_FLASH_BUFFER_SIZE   1024                    ///< Размер буфера RTT в Flash
+#define RTT_FLASH_SECTOR        FLASH_SECTOR_11         ///< Сектор FLASH куда положится RTT буфер
+#define RTT_FLASH_SECTOR_START  0x080E0000              ///< Начало сектора RTT_FLASH_SECTOR
+#define RTT_FLASH_SECTOR_END    0x080FFFFF              ///< Конец сектора RTT_FLASH_SECTOR
+
+
+#define HARDFAULT_SERIAL_TRACE  ///< Включить обработку и serial трассировку Hardfault
+#define HF_RTT_TAG_BASE         0xDEAD0000              ///< базовый тег для HardFault
+#define HF_RTT_TAIL_SIZE        RTT_FLASH_BUFFER_SIZE   ///< Размер буфера RTT, который сохранится при Hardfault
+#define HF_STACK_DUMP_WORDS     32                      ///< Сколько слов стека будет проанализировано во время Hardfault
+#define HF_FLASH_ADDR           ((uint32_t)0x080FF000)  ///< Адрес FLASH куда положится RTT буфер
+#define HF_RAM_END              0x20030000              ///< Конец RAM памяти (чтобы во время анализа стека не выйти за пределы)
+
+#define GPIO_TRACE_ENABLE         ///< Включить GPIO трассировку
+
+/** TRACE_CONFIG
+  * @}
+  */
+
+
+
+/** 
+  * @addtogroup FILTER_CONFIG   Filter configs
+  * @ingroup    MYLIBS_CONFIG
+  * @brief      Конфигурация фильтров
+  * @{
+  */
+
+
+#define FILTERS_ENABLE              ///<  Включить библиотеку фильтров
+//#define FILTER_MEDIAN_MAX_SIZE      ///< Максимальный размер окна медианного фильтра (по умолчанию 5)
+//#define FILTER_AVERAGE_MAX_SIZE     ///< Максимальный размер окна усредняющего фильтра (по умолчанию 8)
+//#define FILTER_POLY_MAX_ORDER       ///< Максимальный порядок полинома (по умолчанию 4)
+#define FILTERS_DISABLE_MOVING_AVERAGE
+/** GEN_CONFIG
+  * @}
+  */
+
+
+
+/** 
+  * @addtogroup GEN_CONFIG   Genetic configs
+  * @ingroup    MYLIBS_CONFIG
+  * @brief      Конфигурация генетического алгоритма обучения
+  * @{
+  */
+
+//#define GEN_OPTIMIZATION_ENABLE       ///< Включить оптимизацию параметров
+#define GEN_MAX_PARAMS       20       ///< Максимальное количество параметров
+#define GEN_MAX_CANDIDATES   100      ///< Максимальное количество кандидатов для обучения
+
+/** GEN_CONFIG
+  * @}
+  */
+
+
+/** 
+  * @addtogroup GEN_CONFIG   Genetic configs
+  * @ingroup    MYLIBS_CONFIG
+  * @brief      Конфигурация генетического алгоритма обучения
+  * @{
+  */
+
+
+#define BENCH_TIME_ENABLE             ///< Включить бенч времени
+#define BENCH_TIME_MAX_CHANNELS 6    ///< Максимальное количество каналов измерения
+
+#define BT_SLOWCALC_PRD 0
+#define BT_SLOWCALC     1
+#define BT_ADC          2
+#define BT_ADC_PRD      3
+#define BT_PWM          4
+#define BT_SYSTICK      5
+/** GEN_CONFIG
+  * @}
+  */
+
+
+
+/** 
+  * @addtogroup LIBS_CONFIG   Libraries configs
+  * @ingroup    MYLIBS_CONFIG
+  * @brief      Подключение различных модулей библиотеки
+  * @{
+  */
+
+#ifndef MATLAB
+#define local_time()      uwTick      ///< Локальное время
+
+#define INCLUDE_GEN_OPTIMIZER      ///< Подключить библиотеку для оптимизации параметров
+#define INCLUDE_BIT_ACCESS_LIB        ///< Подключить библиотеку с typedef с битовыми полями
+#define INCLUDE_TRACKERS_LIB          ///< Подключить библиотеку с трекерами
+#define INCLUDE_TRACE_LIB             ///< Подключить библиотеку с трейсами
+#define INCLUDE_GENERAL_PERIPH_LIBS   ///< Подключить библиотеку с периферией
+#define INCLUDE_BENCH_TIME            ///< Подключить библиотеку с бенчмарком времени
+#define INCLUDE_FILTERS               ///< Подключить библиотеку с фильтрами
+//#define FREERTOS_DELAY                ///< Использовать FreeRTOS задержку, вместо HAL
+
+#else
+
+extern float dbg[16];
+#define local_time()      uwTick      ///< Локальное время
+//#define INCLUDE_GEN_OPTIMIZER      ///< Подключить библиотеку для оптимизации параметров
+#define INCLUDE_BIT_ACCESS_LIB        ///< Подключить библиотеку с typedef с битовыми полями
+#define INCLUDE_TRACKERS_LIB          ///< Подключить библиотеку с трекерами
+//#define INCLUDE_TRACE_LIB             ///< Подключить библиотеку с трейсами
+#define INCLUDE_GENERAL_PERIPH_LIBS   ///< Подключить библиотеку с периферией
+#define INCLUDE_BENCH_TIME            ///< Подключить библиотеку с бенчмарком времени
+#define INCLUDE_FILTERS               ///< Подключить библиотеку с фильтрами
+
+#endif //MATLAB
+/** LIBS_CONFIG
+  * @}
+  */
+
+/** MYLIBS_CONFIG
+  * @}
+  */
+#endif //__MYLIBS_CONFIG_H_

Core/Config/mylibs_include.h

@@ -0,0 +1,92 @@
+/** 
+**************************************************************************
+* @file mylibs_include.h
+* @brief Заголочный файл для всех библиотек
+**************************************************************************
+* @details
+Здесь нужно собрать библиотеки и дефайны, которые должны быть видны во всем проекте,
+чтобы не подключать 100 инклюдов в каждом ".c" файле
+**************************************************************************
+* @defgroup MYLIBS_ALL      My Libs
+* @brief    Все используемые MyLibs библиотеки
+* @details
+Для подключения библиотеки необходимо:
+- Сконфигурировать mylibs_config.h:
+  - Подключить заголовочный файл HAL библиотеки конкретного МК (напр. stm32f4xx_hal.h)
+  - Подключить другие заголовочные файлы которые общие для всего проекта и должны быть видны
+  - Подключить mylibs_include.h туда, где необходим доступ к библиотекам.
+
+*************************************************************************/
+#ifndef __MYLIBS_INCLUDE_H_
+#define __MYLIBS_INCLUDE_H_
+
+#include "mylibs_defs.h"
+
+
+#ifdef ARM_MATH_CM4
+  #include "arm_math.h"
+#else
+  #include "math.h"
+#endif
+
+
+#ifdef INCLUDE_BIT_ACCESS_LIB
+#include "bit_access.h"
+#endif
+
+#ifdef INCLUDE_TRACKERS_LIB
+#include "trackers.h"
+#else  
+#endif
+
+#ifdef INCLUDE_TRACE_LIB
+#include "trace.h"
+#else
+#endif
+
+#ifdef INCLUDE_GEN_OPTIMIZER
+#include "gen_optimizer.h"
+#else
+#endif
+
+
+
+#ifdef INCLUDE_BENCH_TIME
+#include "bench_time.h"
+#else //BENCH_TIME_ENABLE
+#endif //BENCH_TIME_ENABLE
+
+
+#ifdef INCLUDE_FILTERS
+#include "filters.h"
+#else //INCLUDE_FILTERS
+#endif //INCLUDE_FILTERS
+
+
+#ifdef INCLUDE_GENERAL_PERIPH_LIBS
+
+#include "__general_flash.h"
+#include "general_gpio.h"
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "general_spi.h"
+#endif
+#ifdef HAL_UART_MODULE_ENABLED
+#include "general_uart.h"
+#endif
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "general_tim.h"
+#endif
+
+#endif //INCLUDE_GENERAL_PERIPH_LIBS
+
+
+
+
+/////////////////////////---USER SETTINGS---/////////////////////////
+// user includes
+
+// user settings
+/////////////////////////---USER SETTINGS---/////////////////////////
+
+
+#endif // __MYLIBS_INCLUDE_H_

Core/Inc/adc.h

@@ -0,0 +1,52 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    adc.h
+  * @brief   This file contains all the function prototypes for
+  *          the adc.c file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __ADC_H__
+#define __ADC_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern ADC_HandleTypeDef hadc1;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_ADC1_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ADC_H__ */
+

Core/Inc/gpio.h

@@ -0,0 +1,49 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    gpio.h
+  * @brief   This file contains all the function prototypes for
+  *          the gpio.c file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __GPIO_H__
+#define __GPIO_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_GPIO_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*__ GPIO_H__ */
+

Core/Inc/main.h

@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.h
+  * @brief          : Header for main.c file.
+  *                   This file contains the common defines of the application.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "mylibs_include.h"
+//#include "modbus.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */

Core/Inc/stm32g4xx_hal_conf.h

@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+ * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+
+#define HAL_MODULE_ENABLED
+
+  #define HAL_ADC_MODULE_ENABLED
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CORDIC_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_FDCAN_MODULE_ENABLED   */
+/*#define HAL_FMAC_MODULE_ENABLED   */
+/*#define HAL_HRTIM_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+/*#define HAL_I2C_MODULE_ENABLED   */
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_OPAMP_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+/*#define HAL_RTC_MODULE_ENABLED   */
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+/*#define HAL_SPI_MODULE_ENABLED   */
+/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED   */
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS       0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS       0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (8000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S and SAI peripherals
+  *        This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE    (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY           (15UL)    /*!< tick interrupt priority (lowest by default)  */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              0U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */

Core/Inc/stm32g4xx_it.h

@@ -0,0 +1,66 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_it.h
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */

Core/Inc/tim.h

@@ -0,0 +1,57 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    tim.h
+  * @brief   This file contains all the function prototypes for
+  *          the tim.c file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __TIM_H__
+#define __TIM_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern TIM_HandleTypeDef htim1;
+
+extern TIM_HandleTypeDef htim17;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_TIM1_Init(void);
+void MX_TIM17_Init(void);
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __TIM_H__ */
+

Core/Src/adc.c

@@ -0,0 +1,155 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    adc.c
+  * @brief   This file provides code for the configuration
+  *          of the ADC instances.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "adc.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+ADC_HandleTypeDef hadc1;
+
+/* ADC1 init function */
+void MX_ADC1_Init(void)
+{
+
+  /* USER CODE BEGIN ADC1_Init 0 */
+
+  /* USER CODE END ADC1_Init 0 */
+
+  ADC_MultiModeTypeDef multimode = {0};
+  ADC_ChannelConfTypeDef sConfig = {0};
+
+  /* USER CODE BEGIN ADC1_Init 1 */
+
+  /* USER CODE END ADC1_Init 1 */
+
+  /** Common config
+  */
+  hadc1.Instance = ADC1;
+  hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
+  hadc1.Init.Resolution = ADC_RESOLUTION_12B;
+  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+  hadc1.Init.GainCompensation = 0;
+  hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
+  hadc1.Init.EOCSelection = ADC_EOC_SEQ_CONV;
+  hadc1.Init.LowPowerAutoWait = DISABLE;
+  hadc1.Init.ContinuousConvMode = ENABLE;
+  hadc1.Init.NbrOfConversion = 1;
+  hadc1.Init.DiscontinuousConvMode = DISABLE;
+  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+  hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+  hadc1.Init.DMAContinuousRequests = DISABLE;
+  hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
+  hadc1.Init.OversamplingMode = DISABLE;
+  if (HAL_ADC_Init(&hadc1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure the ADC multi-mode
+  */
+  multimode.Mode = ADC_MODE_INDEPENDENT;
+  if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure Regular Channel
+  */
+  sConfig.Channel = ADC_CHANNEL_1;
+  sConfig.Rank = ADC_REGULAR_RANK_1;
+  sConfig.SamplingTime = ADC_SAMPLETIME_2CYCLES_5;
+  sConfig.SingleDiff = ADC_SINGLE_ENDED;
+  sConfig.OffsetNumber = ADC_OFFSET_NONE;
+  sConfig.Offset = 0;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN ADC1_Init 2 */
+
+  /* USER CODE END ADC1_Init 2 */
+
+}
+
+void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
+{
+
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(adcHandle->Instance==ADC1)
+  {
+  /* USER CODE BEGIN ADC1_MspInit 0 */
+
+  /* USER CODE END ADC1_MspInit 0 */
+
+  /** Initializes the peripherals clocks
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC12;
+    PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* ADC1 clock enable */
+    __HAL_RCC_ADC12_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**ADC1 GPIO Configuration
+    PA0     ------> ADC1_IN1
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_0;
+    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN ADC1_MspInit 1 */
+
+  /* USER CODE END ADC1_MspInit 1 */
+  }
+}
+
+void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle)
+{
+
+  if(adcHandle->Instance==ADC1)
+  {
+  /* USER CODE BEGIN ADC1_MspDeInit 0 */
+
+  /* USER CODE END ADC1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_ADC12_CLK_DISABLE();
+
+    /**ADC1 GPIO Configuration
+    PA0     ------> ADC1_IN1
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_0);
+
+  /* USER CODE BEGIN ADC1_MspDeInit 1 */
+
+  /* USER CODE END ADC1_MspDeInit 1 */
+  }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */

Core/Src/gpio.c

@@ -0,0 +1,67 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    gpio.c
+  * @brief   This file provides code for the configuration
+  *          of all used GPIO pins.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "gpio.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/*----------------------------------------------------------------------------*/
+/* Configure GPIO                                                             */
+/*----------------------------------------------------------------------------*/
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/** Configure pins as
+        * Analog
+        * Input
+        * Output
+        * EVENT_OUT
+        * EXTI
+*/
+void MX_GPIO_Init(void)
+{
+
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOF_CLK_ENABLE();
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin : PB12 */
+  GPIO_InitStruct.Pin = GPIO_PIN_12;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+}
+
+/* USER CODE BEGIN 2 */
+
+/* USER CODE END 2 */

Core/Src/main.c

@@ -0,0 +1,190 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "adc.h"
+#include "tim.h"
+#include "gpio.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "uksi_main.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_ADC1_Init();
+  MX_TIM17_Init();
+  MX_TIM1_Init();
+  /* USER CODE BEGIN 2 */
+  UKSI_Init();
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  UKSI_prewhile();
+  while (1)
+  {
+    UKSI_while();
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  __disable_irq();
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */

Core/Src/stm32g4xx_hal_msp.c

@@ -0,0 +1,87 @@
+
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file         stm32g4xx_hal_msp.c
+  * @brief        This file provides code for the MSP Initialization
+  *               and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+  */
+  HAL_PWREx_DisableUCPDDeadBattery();
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */

Core/Src/stm32g4xx_it.c

@@ -0,0 +1,203 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g4xx_it.c
+  * @brief   Interrupt Service Routines.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+   while (1)
+  {
+  }
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32g4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */

Core/Src/system_stm32g4xx.c

@@ -0,0 +1,285 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32g4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32g4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (16 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | HSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 16000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 16000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 16
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for RNG                  | Disabled
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32g4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32g4xx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE     24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/* Note: Following vector table addresses must be defined in line with linker
+         configuration. */
+/*!< Uncomment the following line if you need to relocate the vector table
+     anywhere in Flash or Sram, else the vector table is kept at the automatic
+     remap of boot address selected */
+/* #define USER_VECT_TAB_ADDRESS */
+
+#if defined(USER_VECT_TAB_ADDRESS)
+/*!< Uncomment the following line if you need to relocate your vector Table
+     in Sram else user remap will be done in Flash. */
+/* #define VECT_TAB_SRAM */
+#if defined(VECT_TAB_SRAM)
+#define VECT_TAB_BASE_ADDRESS   SRAM_BASE       /*!< Vector Table base address field.
+                                                     This value must be a multiple of 0x200. */
+#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
+                                                     This value must be a multiple of 0x200. */
+#else
+#define VECT_TAB_BASE_ADDRESS   FLASH_BASE      /*!< Vector Table base address field.
+                                                     This value must be a multiple of 0x200. */
+#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
+                                                     This value must be a multiple of 0x200. */
+#endif /* VECT_TAB_SRAM */
+#endif /* USER_VECT_TAB_ADDRESS */
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = HSI_VALUE;
+
+  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+  const uint8_t APBPrescTable[8] =  {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#if defined(USER_VECT_TAB_ADDRESS)
+  SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#endif /* USER_VECT_TAB_ADDRESS */
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x04:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C:  /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+      if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else                   /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+

Core/Src/tim.c

@@ -0,0 +1,219 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    tim.c
+  * @brief   This file provides code for the configuration
+  *          of the TIM instances.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "tim.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+TIM_HandleTypeDef htim1;
+TIM_HandleTypeDef htim17;
+
+/* TIM1 init function */
+void MX_TIM1_Init(void)
+{
+
+  /* USER CODE BEGIN TIM1_Init 0 */
+
+  /* USER CODE END TIM1_Init 0 */
+
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+  TIM_OC_InitTypeDef sConfigOC = {0};
+  TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
+
+  /* USER CODE BEGIN TIM1_Init 1 */
+
+  /* USER CODE END TIM1_Init 1 */
+  htim1.Instance = TIM1;
+  htim1.Init.Prescaler = 0;
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim1.Init.Period = 65535;
+  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim1.Init.RepetitionCounter = 0;
+  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_OC_Init(&htim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigOC.OCMode = TIM_OCMODE_FORCED_ACTIVE;
+  sConfigOC.Pulse = 0;
+  sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+  sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
+  sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+  sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
+  sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
+  if (HAL_TIM_OC_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
+  sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
+  sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
+  sBreakDeadTimeConfig.DeadTime = 255;
+  sBreakDeadTimeConfig.BreakState = TIM_BREAK_ENABLE;
+  sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
+  sBreakDeadTimeConfig.BreakFilter = 0;
+  sBreakDeadTimeConfig.BreakAFMode = TIM_BREAK_AFMODE_INPUT;
+  sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
+  sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
+  sBreakDeadTimeConfig.Break2Filter = 0;
+  sBreakDeadTimeConfig.Break2AFMode = TIM_BREAK_AFMODE_INPUT;
+  sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
+  if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM1_Init 2 */
+
+  /* USER CODE END TIM1_Init 2 */
+  HAL_TIM_MspPostInit(&htim1);
+
+}
+/* TIM17 init function */
+void MX_TIM17_Init(void)
+{
+
+  /* USER CODE BEGIN TIM17_Init 0 */
+
+  /* USER CODE END TIM17_Init 0 */
+
+  /* USER CODE BEGIN TIM17_Init 1 */
+
+  /* USER CODE END TIM17_Init 1 */
+  htim17.Instance = TIM17;
+  htim17.Init.Prescaler = 0;
+  htim17.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim17.Init.Period = 65535;
+  htim17.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim17.Init.RepetitionCounter = 0;
+  htim17.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim17) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM17_Init 2 */
+
+  /* USER CODE END TIM17_Init 2 */
+
+}
+
+void HAL_TIM_OC_MspInit(TIM_HandleTypeDef* tim_ocHandle)
+{
+
+  if(tim_ocHandle->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspInit 0 */
+
+  /* USER CODE END TIM1_MspInit 0 */
+    /* TIM1 clock enable */
+    __HAL_RCC_TIM1_CLK_ENABLE();
+  /* USER CODE BEGIN TIM1_MspInit 1 */
+
+  /* USER CODE END TIM1_MspInit 1 */
+  }
+}
+
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
+{
+
+  if(tim_baseHandle->Instance==TIM17)
+  {
+  /* USER CODE BEGIN TIM17_MspInit 0 */
+
+  /* USER CODE END TIM17_MspInit 0 */
+    /* TIM17 clock enable */
+    __HAL_RCC_TIM17_CLK_ENABLE();
+  /* USER CODE BEGIN TIM17_MspInit 1 */
+
+  /* USER CODE END TIM17_MspInit 1 */
+  }
+}
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
+{
+
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(timHandle->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspPostInit 0 */
+
+  /* USER CODE END TIM1_MspPostInit 0 */
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**TIM1 GPIO Configuration
+    PA8     ------> TIM1_CH1
+    PA11     ------> TIM1_CH1N
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_11;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF6_TIM1;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN TIM1_MspPostInit 1 */
+
+  /* USER CODE END TIM1_MspPostInit 1 */
+  }
+
+}
+
+void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef* tim_ocHandle)
+{
+
+  if(tim_ocHandle->Instance==TIM1)
+  {
+  /* USER CODE BEGIN TIM1_MspDeInit 0 */
+
+  /* USER CODE END TIM1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM1_CLK_DISABLE();
+  /* USER CODE BEGIN TIM1_MspDeInit 1 */
+
+  /* USER CODE END TIM1_MspDeInit 1 */
+  }
+}
+
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
+{
+
+  if(tim_baseHandle->Instance==TIM17)
+  {
+  /* USER CODE BEGIN TIM17_MspDeInit 0 */
+
+  /* USER CODE END TIM17_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM17_CLK_DISABLE();
+  /* USER CODE BEGIN TIM17_MspDeInit 1 */
+
+  /* USER CODE END TIM17_MspDeInit 1 */
+  }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */

Core/UKSI/foster_student.c

@@ -0,0 +1,89 @@
+#include "foster_student.h"
+
+void foster_init(FosterStudent* fs, float t_critical)
+{
+    if (!fs) return;
+    
+    for (int i = 0; i < FS_WINDOW_SIZE; i++) {
+        fs->window[i] = 0.0f;
+    }
+    
+    fs->t_critical = t_critical;
+    fs->mse = 1.0f;
+    fs->index = 0;
+    fs->count = 0;
+    fs->ready = false;
+}
+
+void foster_set_mse(FosterStudent* fs, float mse)
+{
+    if (!fs || mse <= 0.0f) return;
+    fs->mse = mse;
+}
+
+void foster_add_sample(FosterStudent* fs, float value)
+{
+    if (!fs) return;
+    
+    fs->window[fs->index] = value;
+    fs->index = (fs->index + 1) % FS_WINDOW_SIZE;
+    
+    if (fs->count < FS_WINDOW_SIZE) {
+        fs->count++;
+        if (fs->count == FS_WINDOW_SIZE) {
+            fs->ready = true;
+        }
+    }
+}
+
+uint8_t foster_is_ready(FosterStudent* fs)
+{
+    return fs && fs->ready;
+}
+
+uint8_t foster_check(FosterStudent* fs)
+{
+    if (!fs || !fs->ready) {
+        return 0xFF;
+    }
+    
+    float first = fs->window[(fs->index) % FS_WINDOW_SIZE];
+    float max_val = first;
+    float min_val = first;
+    
+    uint8_t m = 0;
+    uint8_t l = 0;
+    float d_sum = 0.0f;
+    
+    for (int i = 0; i < FS_WINDOW_SIZE; i++) {
+        float val = fs->window[(fs->index + i) % FS_WINDOW_SIZE];
+        
+        if (val > max_val) {
+            max_val = val;
+            m = 1;
+        } else {
+            m = 0;
+        }
+        
+        if (val < min_val) {
+            min_val = val;
+            l = 1;
+        } else {
+            l = 0;
+        }
+        
+        d_sum += (float)(m - l);
+    }
+    
+    if (d_sum < 0.0f) d_sum = -d_sum;
+    
+    if (fs->mse > 0.0f) {
+        float t_value = d_sum / fs->mse;
+      
+        fs->t_current = t_value;
+        
+        return (t_value > fs->t_critical) ? 1 : 0;
+    }
+    
+    return 0xFF;
+}

Core/UKSI/foster_student.h

@@ -0,0 +1,28 @@
+#ifndef FOSTER_STUDENT_H
+#define FOSTER_STUDENT_H
+
+#include <stdint.h>
+#include <stdbool.h>
+
+/* Конфигурация */
+#define FS_WINDOW_SIZE     10      /* Размер окна анализа */
+
+/* Структура контекста */
+typedef struct {
+  float window[FS_WINDOW_SIZE];  /* Буфер окна */
+  float t_current;               /* Текущее значение t */
+  float t_critical;              /* Критическое значение t */
+  float mse;                     /* MSE для нормализации */
+  uint8_t index;                 /* Индекс в буфере */
+  uint8_t count;                 /* Количество измерений */
+  uint8_t ready;                    /* Флаг готовности */
+} FosterStudent;
+
+/* Прототипы функций */
+void foster_init(FosterStudent* fs, float t_critical);
+void foster_set_mse(FosterStudent* fs, float mse);
+void foster_add_sample(FosterStudent* fs, float value);
+uint8_t foster_is_ready(FosterStudent* fs);
+uint8_t foster_check(FosterStudent* fs);
+
+#endif /* FOSTER_STUDENT_H */

Core/UKSI/uksi_calc_res.c

@@ -0,0 +1,142 @@
+#include "uksi_calc_res.h"
+
+
+/** 
+  * @brief    Конфигуарция коэфициентов АЦП.
+  * @param    adc       Указатель на кастомный хендл АЦП
+  * @param    levelZero Нулевой уровень (в квантах АЦП)
+  * @param    valueMax  Максимальный уровень Единиц Измерения (в Вольтах/Амперах/Градусах)
+  * @param    levelMax  Максимальный уровень АЦП (в квантах АЦП)
+  * @return   HAL Status.
+  */
+HAL_StatusTypeDef ADC_ConfigCoef(ADC_t *adc, uint16_t levelZero, float valueMax, uint16_t levelMax, uint16_t lOffset)
+{
+  HAL_StatusTypeDef res;
+  if(check_null_ptr_1(adc))
+    return HAL_ERROR;
+  if((valueMax == 0) || (levelMax == 0))
+    return HAL_ERROR;
+   
+  adc->Coefs.lMax   = levelMax;
+  adc->Coefs.vMax   = valueMax;
+  adc->Coefs.lZero  = levelZero;
+  adc->Coefs.lOffset  = lOffset;
+  
+  return HAL_OK;
+}
+
+/** 
+  * @brief    Конфигуарция фильтров АЦП.
+  * @param    adc       Указатель на кастомный хендл АЦП
+  * @param    levelZero Нулевой уровень (в квантах АЦП)
+  * @param    valueMax  Максимальный уровень Единиц Измерения (в Вольтах/Амперах/Градусах)
+  * @param    levelMax  Максимальный уровень АЦП (в квантах АЦП)
+  * @return   HAL Status.
+  */
+HAL_StatusTypeDef ADC_ConfigFilter(ADC_t *adc, uint8_t median_size, uint32_t average_size)
+{
+  HAL_StatusTypeDef res;
+  if(check_null_ptr_1(adc))
+    return HAL_ERROR;
+   
+  FilterMedianInt_Init(&adc->mdn, median_size, 0);
+  FilterAverageInt_Init(&adc->avg, average_size, FILTER_MODE_DEFAULT);
+  
+ 
+  Filter_Start(&adc->mdn);
+  Filter_Start(&adc->avg);
+  
+  return HAL_OK;
+}
+/** 
+  * @brief    Расчет напряжения на АЦП.
+  * @param    adc       Указатель на кастомный хендл АЦП
+  * @param    rawval    Сырое значение АЦП
+  * @return   Напряжение (float).
+  */
+float ADC_Calc(ADC_t *adc)
+{
+  if(check_null_ptr_1(adc))
+    return 0;
+  ADC_Coefs_t *coefs  = &adc->Coefs;
+  
+  int16_t rawval = (int16_t)HAL_ADC_GetValue(adc->hadc);
+  
+  
+  rawval = Filter_Process(&adc->mdn, rawval);
+  rawval = Filter_Process(&adc->avg, rawval);
+  
+  rawval -= coefs->lOffset;
+  if(rawval < 0)
+    rawval = 0;
+  if(rawval >4095)
+    rawval = 4095;
+  adc->Raw = rawval;  
+  
+  adc->Voltage = ((float)(rawval)-coefs->lZero) * coefs->vMax / (coefs->lMax-coefs->lZero);
+  return adc->Voltage;
+}
+
+HAL_StatusTypeDef UKSI_Calc_Init(UKSI_Calc_t *calc, ADC_HandleTypeDef *hadc)
+{
+  if(check_null_ptr_2(calc, hadc))
+    return HAL_ERROR;
+  
+  calc->adc.hadc = hadc;
+  ADC_ConfigCoef(&calc->adc, 0, 1.411, 1860, 14);
+  ADC_ConfigFilter(&calc->adc, 10, 50000);
+  
+  calc->RMeasOhm = 35060;
+  calc->RLimitOhm = 1.5e6;
+  calc->DCVoltage = 63;
+  
+  foster_init(&calc->adc.foster, 3000.0f);
+  foster_set_mse(&calc->adc.foster, 0.001f); /* Подберите под ваши значения напряжения */
+  
+  HAL_ADCEx_Calibration_Start(hadc, ADC_SINGLE_ENDED);
+  
+  return HAL_ADC_Start(hadc);
+}
+
+
+/** 
+  * @brief    Расчет изоляции.
+  * @param    calc       Указатель на структуру для расчета изоляции
+  * @return   Сопротивление изоляции (float).
+  */
+float UKSI_Calc_Isolation(UKSI_Calc_t *calc)
+{
+  if(check_null_ptr_1(calc))
+    return 0;
+  
+  float voltage = ADC_Calc(&calc->adc);
+  
+  if(Filter_isDataReady(&calc->adc.avg))
+  {
+    /* Проверка стабильности напряжения */
+    foster_add_sample(&calc->adc.foster, voltage);
+    
+    if(foster_is_ready(&calc->adc.foster)) {
+      uint8_t stability = foster_check(&calc->adc.foster);
+      calc->adc.is_stable = stability;
+      
+      /* Если нестабильно, возвращаем 0 или предыдущее значение */
+      if(stability == 1) { /* Нестабильно */
+        return calc->IsoOhm; /* Или calc->IsoOhm для сохранения последнего значения */
+      }
+    }
+    
+    /* Расчет изоляции */
+    float current = voltage / calc->RMeasOhm;
+    float Rtotal = calc->DCVoltage / current;
+    float Riso = Rtotal - (calc->RMeasOhm + calc->RLimitOhm);
+    
+    calc->IsoOhm = Riso;
+    calc->IsoMOhm = Riso / 1000000.0f;
+    calc->IsoCurrentuA = current * 1000000.0f;
+    
+  }
+  return calc->IsoOhm;
+}
+
+

Core/UKSI/uksi_calc_res.h

@@ -0,0 +1,62 @@
+
+#ifndef _UKSI_CALC_RES_H
+#define _UKSI_CALC_RES_H
+#include "main.h"
+#include "foster_student.h"  /* Добавить этот include */
+
+#define FOSTER_ST
+
+/**
+  * @brief Коэфициенты канала АЦП для пересчета в единицы измерения
+  */
+typedef struct
+{
+  uint16_t  lZero;  ///< Нулевой уровень (в квантах АЦП)
+  float     vMax;   ///< Максимальный уровень Единиц Измерения (в Вольтах/Амперах)
+  uint16_t  lMax;   ///< Максимальный уровень АЦП (в квантах АЦП)
+  uint16_t  lOffset;   ///< Максимальный уровень АЦП (в квантах АЦП)
+}ADC_Coefs_t;
+
+typedef struct
+{  
+  ADC_HandleTypeDef *hadc;
+  
+  uint16_t    Raw;
+  float       Voltage;
+  ADC_Coefs_t Coefs;
+  
+  FilterMedianInt_t mdn;
+  FilterAverageInt_t avg; 
+  FosterStudent foster;     /* Для проверки стабильности */
+  uint8_t is_stable;        /* 0-стабильно, 1-нестабильно, 0xFF-ошибка */
+}ADC_t;
+
+HAL_StatusTypeDef ADC_ConfigCoef(ADC_t *adc, uint16_t levelZero, float valueMax, uint16_t levelMax, uint16_t lOffset);
+HAL_StatusTypeDef ADC_ConfigFilter(ADC_t *adc, uint8_t median_size, uint32_t average_size);
+float ADC_Calc(ADC_t *adc);
+
+
+
+typedef struct
+{
+  ADC_t adc;  // АЦП
+  
+  float Voltage[100];
+  
+  float RMeasOhm; // Сопротивление резистора с которого снимается напряжение
+  float RLimitOhm; // Сопротивление токоограничивающего резистора  
+  float DCVoltage; // Нарпяжение подаваемое в изоляцию
+  
+  
+    
+  float IsoOhm; // Измеренное сопротивление изоляции в МОм
+  float IsoMOhm; // Измеренное сопротивление изоляции Ом
+  float IsoCurrentuA; // Ток утечки изоляции в мкА
+  
+  
+}UKSI_Calc_t;
+
+HAL_StatusTypeDef UKSI_Calc_Init(UKSI_Calc_t *calc, ADC_HandleTypeDef *hadc);
+float UKSI_Calc_Isolation(UKSI_Calc_t *calc);
+
+#endif //_UKSI_CALC_RES_H

Core/UKSI/uksi_dc_control.c

@@ -0,0 +1,33 @@
+#include "uksi_dc_control.h"
+
+HAL_StatusTypeDef DC_Init(UKSI_DC_t *dc, TIM_HandleTypeDef *htim, uint32_t activemode, uint32_t inactivemode)
+{
+  if(check_null_ptr_2(dc, htim))
+    return HAL_ERROR;
+  
+  dc->htim = htim;
+  dc->ActiveMode = activemode;
+  dc->InactiveMode = inactivemode;
+  
+  HAL_TIMEx_OCN_Start(htim, TIM_CHANNEL_1);
+  return HAL_TIM_OC_Start(htim, TIM_CHANNEL_1);
+}
+
+
+HAL_StatusTypeDef DC_Enable(UKSI_DC_t *dc, uint8_t state)
+{
+  if(check_null_ptr_1(dc))
+    return HAL_ERROR;
+  
+  dc->htim->Instance->CCMR1 &= ~TIM_OCMODE_PWM2;
+  if(state)
+  {
+    dc->htim->Instance->CCMR1 |= dc->ActiveMode;  
+  }
+  else
+  {
+    dc->htim->Instance->CCMR1 |= dc->InactiveMode;  
+  }
+  
+  return HAL_OK;
+}

Core/UKSI/uksi_dc_control.h

@@ -0,0 +1,16 @@
+#ifndef _UKSI_DC_CONTROL_H
+#define _UKSI_DC_CONTROL_H
+#include "main.h"
+
+typedef struct
+{
+  TIM_HandleTypeDef *htim;
+  uint32_t ActiveMode;
+  uint32_t InactiveMode;
+}UKSI_DC_t;
+
+HAL_StatusTypeDef DC_Init(UKSI_DC_t *dc, TIM_HandleTypeDef *htim, uint32_t activemode, uint32_t inactivemode);
+HAL_StatusTypeDef DC_Enable(UKSI_DC_t *dc, uint8_t state);
+
+
+#endif //_UKSI_CALC_RES_H

Core/UKSI/uksi_main.c

@@ -0,0 +1,61 @@
+#include "uksi_main.h"
+#include "adc.h"
+#include "tim.h"
+UKSI_Calc_t uksi_calc;
+UKSI_DC_t uksi_dc;
+float iso_result;
+int dbg_dc = 0;
+int dbg_dc_delay = 5000;
+void UKSI_Init()
+{
+  DC_Init(&uksi_dc, &htim1, TIM_OCMODE_INACTIVE, TIM_OCMODE_ACTIVE);
+  UKSI_Calc_Init(&uksi_calc, &hadc1);
+}
+
+
+
+void UKSI_prewhile()
+{
+}
+
+
+void UKSI_while()
+{
+  static uint32_t prev_dc_tick = 0;
+  static uint32_t start_measure_tick = 0;
+  float curr_iso = 0;
+  DC_Enable(&uksi_dc, dbg_dc);
+  
+  if(dbg_dc)
+  {
+    curr_iso = UKSI_Calc_Isolation(&uksi_calc);
+    if(uwTick - prev_dc_tick > dbg_dc_delay) // подаем импульс минимум на секунду
+    {
+      if(!foster_check(&uksi_calc.adc.foster)) // если стабильный уровень найден - отключаем на секунду источник
+      {
+        if(start_measure_tick == 0)
+        {
+          start_measure_tick = uwTick; // измеряем еще 5 секунд и выключаем источник
+        }
+        else
+        {
+          if(uwTick - start_measure_tick > dbg_dc_delay)
+          {
+            dbg_dc = 0;
+            start_measure_tick = 0;
+            prev_dc_tick = uwTick;
+            iso_result = curr_iso;
+          }
+        }
+      }
+    }
+  }
+  else
+  {
+    if(uwTick - prev_dc_tick > dbg_dc_delay) // подаем импульс минимум на секунду
+    {
+      dbg_dc = 1;
+      prev_dc_tick = uwTick;
+    }
+  }
+}

Core/UKSI/uksi_main.h

@@ -0,0 +1,12 @@
+
+#ifndef _UKSI_MAIN_H
+#define _UKSI_MAIN_H
+
+
+#include "uksi_calc_res.h"
+#include "uksi_dc_control.h"
+
+void UKSI_Init();
+void UKSI_prewhile();
+void UKSI_while();
+#endif //_UKSI_MAIN_H