50 else if (stim->
htim.Init.Period == NULL)
51 stim->
htim.Init.Period = 0xFFFF;
63 for(
int i = 0; (stim->
htim.Init.Prescaler > 0xFFFF) || (stim->
htim.Init.Period > 0xFFFF); i++)
71 if(stim->
htim.Init.Prescaler > 0xFFFF)
74 stim->
htim.Init.Prescaler = ((stim->
htim.Init.Prescaler + 1)/2) - 1;
75 stim->
htim.Init.Period = ((stim->
htim.Init.Period + 1)*2) - 1;
86 if(stim->
htim.Init.Period > 0xFFFF)
89 stim->
htim.Init.Period = ((stim->
htim.Init.Period + 1)/2) - 1;
90 stim->
htim.Init.Prescaler = ((stim->
htim.Init.Prescaler + 1)*2) - 1;
99 if (HAL_TIM_Base_Init(&stim->
htim) != HAL_OK)
129 if (HAL_TIMEx_MasterConfigSynchronization(&stim->
htim, &stim->
sMasterConfig) != HAL_OK)
143 __HAL_TIM_CLEAR_IT(&stim->
htim, TIM_IT_UPDATE);
147 #ifdef UPDATE_TIM_PARAMS_AFTER_INITIALIZATION
155 stim->
htim.Instance->CNT = 0;
175 GPIO_InitTypeDef GPIO_InitStruct = {0};
176 HAL_StatusTypeDef RES = HAL_ERROR;
180 RES = HAL_TIM_Encoder_Init(henc->
htim, &henc->
sConfig);
195 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
196 GPIO_InitStruct.Pull = GPIO_PULLUP;
197 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
198 GPIO_InitStruct.Alternate = GPIO_TIM_Alternate_Mapping(henc->
htim->Instance);
199 if(GPIO_InitStruct.Alternate)
200 HAL_GPIO_Init(henc->
GPIOx, &GPIO_InitStruct);
206 GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
207 GPIO_InitStruct.Pull = GPIO_PULLUP;
208 HAL_GPIO_Init(henc->
GPIOx, &GPIO_InitStruct);
226HAL_StatusTypeDef
TIM_Output_PWM_Init(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef *sConfigOC, uint32_t TIM_CHANNEL, GPIO_TypeDef *GPIOx, uint32_t GPIO_PIN)
233 GPIO_InitTypeDef GPIO_InitStruct = {0};
234 HAL_StatusTypeDef RES = HAL_ERROR;
237 RES = HAL_TIM_PWM_ConfigChannel(htim, sConfigOC, TIM_CHANNEL);
251 GPIO_InitStruct.Pin = GPIO_PIN;
252 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
253 if(sConfigOC->OCPolarity == TIM_OCNPOLARITY_HIGH)
254 GPIO_InitStruct.Pull = GPIO_PULLDOWN;
256 GPIO_InitStruct.Pull = GPIO_PULLUP;
257 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
258 GPIO_InitStruct.Alternate = GPIO_TIM_Alternate_Mapping(htim->Instance);
259 if(GPIO_InitStruct.Alternate)
260 HAL_GPIO_Init(GPIOx, &GPIO_InitStruct);
413 it_mode = it_mode&TIM_IT_CONF;
415 if(htim->Instance==TIM1)
418 __HAL_RCC_TIM1_CLK_ENABLE();
423 HAL_NVIC_SetPriority(TIM1_UP_TIM10_IRQn, 0, 0);
424 HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
429 if(htim->Instance==TIM2)
432 __HAL_RCC_TIM2_CLK_ENABLE();
437 HAL_NVIC_SetPriority(TIM2_IRQn, 0, 0);
438 HAL_NVIC_EnableIRQ(TIM2_IRQn);
443 if(htim->Instance==TIM3)
446 __HAL_RCC_TIM3_CLK_ENABLE();
451 HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0);
452 HAL_NVIC_EnableIRQ(TIM3_IRQn);
457 if(htim->Instance==TIM4)
460 __HAL_RCC_TIM4_CLK_ENABLE();
465 HAL_NVIC_SetPriority(TIM4_IRQn, 0, 0);
466 HAL_NVIC_EnableIRQ(TIM4_IRQn);
471 if(htim->Instance==TIM5)
474 __HAL_RCC_TIM5_CLK_ENABLE();
479 HAL_NVIC_SetPriority(TIM5_IRQn, 0, 0);
480 HAL_NVIC_EnableIRQ(TIM5_IRQn);
485 if(htim->Instance==TIM6)
488 __HAL_RCC_TIM6_CLK_ENABLE();
493 HAL_NVIC_SetPriority(TIM6_DAC_IRQn, 0, 0);
494 HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
499 if(htim->Instance==TIM7)
502 __HAL_RCC_TIM7_CLK_ENABLE();
507 HAL_NVIC_SetPriority(TIM7_IRQn, 0, 0);
508 HAL_NVIC_EnableIRQ(TIM7_IRQn);
513 if(htim->Instance==TIM8)
516 __HAL_RCC_TIM8_CLK_ENABLE();
521 HAL_NVIC_SetPriority(TIM8_UP_TIM13_IRQn, 0, 0);
522 HAL_NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn);
527 if(htim->Instance==TIM9)
530 __HAL_RCC_TIM9_CLK_ENABLE();
535 HAL_NVIC_SetPriority(TIM1_BRK_TIM9_IRQn, 0, 0);
536 HAL_NVIC_EnableIRQ(TIM1_BRK_TIM9_IRQn);
541 if(htim->Instance==TIM10)
544 __HAL_RCC_TIM10_CLK_ENABLE();
549 HAL_NVIC_SetPriority(TIM1_UP_TIM10_IRQn, 0, 0);
550 HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
555 if(htim->Instance==TIM11)
558 __HAL_RCC_TIM11_CLK_ENABLE();
563 HAL_NVIC_SetPriority(TIM1_TRG_COM_TIM11_IRQn, 0, 0);
564 HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM11_IRQn);
569 if(htim->Instance==TIM12)
572 __HAL_RCC_TIM12_CLK_ENABLE();
577 HAL_NVIC_SetPriority(TIM8_BRK_TIM12_IRQn, 0, 0);
578 HAL_NVIC_EnableIRQ(TIM8_BRK_TIM12_IRQn);
583 if(htim->Instance==TIM13)
586 __HAL_RCC_TIM13_CLK_ENABLE();
591 HAL_NVIC_SetPriority(TIM8_UP_TIM13_IRQn, 0, 0);
592 HAL_NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn);
597 if(htim->Instance==TIM14)
600 __HAL_RCC_TIM14_CLK_ENABLE();
605 HAL_NVIC_SetPriority(TIM8_TRG_COM_TIM14_IRQn, 0, 0);
606 HAL_NVIC_EnableIRQ(TIM8_TRG_COM_TIM14_IRQn);
623 if(htim->Instance==TIM1)
625 __HAL_RCC_TIM1_FORCE_RESET();
626 __HAL_RCC_TIM1_RELEASE_RESET();
630 if(htim->Instance==TIM2)
632 __HAL_RCC_TIM2_FORCE_RESET();
633 __HAL_RCC_TIM2_RELEASE_RESET();
637 if(htim->Instance==TIM3)
639 __HAL_RCC_TIM3_FORCE_RESET();
640 __HAL_RCC_TIM3_RELEASE_RESET();
644 if(htim->Instance==TIM4)
646 __HAL_RCC_TIM4_FORCE_RESET();
647 __HAL_RCC_TIM4_RELEASE_RESET();
651 if(htim->Instance==TIM5)
653 __HAL_RCC_TIM5_FORCE_RESET();
654 __HAL_RCC_TIM5_RELEASE_RESET();
658 if(htim->Instance==TIM6)
660 __HAL_RCC_TIM6_FORCE_RESET();
661 __HAL_RCC_TIM6_RELEASE_RESET();
665 if(htim->Instance==TIM7)
667 __HAL_RCC_TIM7_FORCE_RESET();
668 __HAL_RCC_TIM7_RELEASE_RESET();
672 if(htim->Instance==TIM8)
674 __HAL_RCC_TIM8_FORCE_RESET();
675 __HAL_RCC_TIM8_RELEASE_RESET();
679 if(htim->Instance==TIM9)
681 __HAL_RCC_TIM9_FORCE_RESET();
682 __HAL_RCC_TIM9_RELEASE_RESET();
686 if(htim->Instance==TIM10)
688 __HAL_RCC_TIM10_FORCE_RESET();
689 __HAL_RCC_TIM10_RELEASE_RESET();
693 if(htim->Instance==TIM11)
695 __HAL_RCC_TIM11_FORCE_RESET();
696 __HAL_RCC_TIM11_RELEASE_RESET();
700 if(htim->Instance==TIM12)
702 __HAL_RCC_TIM12_FORCE_RESET();
703 __HAL_RCC_TIM12_RELEASE_RESET();
707 if(htim->Instance==TIM13)
709 __HAL_RCC_TIM13_FORCE_RESET();
710 __HAL_RCC_TIM13_RELEASE_RESET();
714 if(htim->Instance==TIM14)
716 __HAL_RCC_TIM14_FORCE_RESET();
717 __HAL_RCC_TIM14_RELEASE_RESET();