487 lines
13 KiB
C
487 lines
13 KiB
C
#include "DSP281x_Examples.h" // DSP281x Examples Include File
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#include "DSP281x_SWPrioritizedIsrLevels.h" // DSP281x Examples Include File
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#include "DSP281x_Device.h" // DSP281x Headerfile Include File
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#include <params.h>
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#include <sync_tools.h>
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#include <vector.h>
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#include "big_dsp_module.h"
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#include "MemoryFunctions.h"
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#include "Spartan2E_Adr.h"
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#include "Spartan2E_Functions.h"
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#include "TuneUpPlane.h"
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#include "edrk_main.h"
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#define SIZE_SYNC_BUF 10
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#pragma DATA_SECTION(logbuf_sync1,".logs");
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long logbuf_sync1[SIZE_SYNC_BUF];
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unsigned int capnum0;
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unsigned int capnum1;
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unsigned int capnum2;
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unsigned int capnum3;
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int delta_capnum = 0;
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int delta_error = 0;
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//int level_find_sync_zero = LEVEL_FIND_SYNC_ZERO;
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unsigned int temp;
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unsigned int count_error_sync = 0;
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unsigned int count_timeout_sync = 0;
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unsigned int enable_profile_led1_sync = 1;
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unsigned int enable_profile_led2_sync = 0;
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SYNC_TOOLS_DATA sync_data=SYNC_TOOLS_DATA_DEFAULT;
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#pragma CODE_SECTION(sync_detected,".fast_run2");
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void sync_detected(void)
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{
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sync_data.latch_interrupt = 1;
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// stop_sync_interrupt();
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// i_led2_on_off(1);
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// //Enable more interrupts from this capture
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// EvbRegs.EVBIMRC.bit.CAP6INT = 0;
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// if (edrk.disable_interrupt_sync==0)
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{
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WriteMemory(ADR_SAW_REQUEST, 0x8000);
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capnum0 = ReadMemory(ADR_SAW_VALUE);
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WriteMemory(ADR_SAW_REQUEST, 0x8000);
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capnum0 = ReadMemory(ADR_SAW_VALUE);
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pause_1000(1);
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WriteMemory(ADR_SAW_REQUEST, 0x8000);
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capnum1 = ReadMemory(ADR_SAW_VALUE);
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WriteMemory(ADR_SAW_REQUEST, 0x8000);
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capnum1 = ReadMemory(ADR_SAW_VALUE);
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sync_data.count_timeout_sync = 0;
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sync_data.timeout_sync_signal = 0;
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//i_led2_on_off(1);
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// EALLOW;
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//
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// //use mask to clear EVAIFRA register
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// EvbRegs.EVBIFRC.bit.CAP6INT = 1;
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// Acknowledge this interrupt to receive more interrupts from group 5
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// PieCtrlRegs.PIEACK.bit.ACK5 = 1; //???????CAP6
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// capnum3 = EvbRegs.CAP6FIFO;
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asm(" NOP;");
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// asm(" NOP;");
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// asm(" NOP;");
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// asm(" NOP;");
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//
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// if (EvbRegs.CAPFIFOB.bit.CAP6FIFO == 3) {
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// capnum3 = EvbRegs.CAP6FIFO;
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// capnum3 = EvbRegs.CAP6FIFO;
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// capnum3 = EvbRegs.CAP6FIFO;
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// }
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// EDIS;
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// EnableInterrupts();
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// return;
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if (sync_data.count_pause_ready < MAX_COUNT_PAUSE_READY) {
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sync_data.count_pause_ready++;
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sync_data.count_pause_ready++;
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} else
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sync_data.sync_ready = 1;
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// if (capnum0 > 1000) {
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// return;
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// }
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// sync_data.level_find_sync_zero = LEVEL_FIND_SYNC_ZERO;
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delta_capnum = capnum0 - capnum1;
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if (delta_capnum > 0) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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{
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sync_data.pwm_freq_plus_minus_zero = 1;
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if (count_error_sync < MAX_COUNT_ERROR_SYNC) {
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count_error_sync++;
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count_error_sync++;
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count_error_sync++;
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} else
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sync_data.local_flag_sync_1_2 = 0;
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} else if (delta_capnum < 0) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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{
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if (capnum0 > sync_data.level_find_sync_zero) {
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delta_error = capnum0 - sync_data.level_find_sync_zero;
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if (delta_error > 50) {
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if (count_error_sync < MAX_COUNT_ERROR_SYNC) {
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count_error_sync++;
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count_error_sync++;
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count_error_sync++;
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} else
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sync_data.local_flag_sync_1_2 = 0;
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} else {
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if (count_error_sync > 0) {
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count_error_sync--;
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}
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if (count_error_sync == 0)
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sync_data.local_flag_sync_1_2 = 1;
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}
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sync_data.pwm_freq_plus_minus_zero = 1;
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} else if (capnum0 < sync_data.level_find_sync_zero) {
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delta_error = sync_data.level_find_sync_zero - capnum0;
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if (delta_error > 50) {
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if (count_error_sync < MAX_COUNT_ERROR_SYNC) {
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count_error_sync++;
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count_error_sync++;
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count_error_sync++;
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} else
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sync_data.local_flag_sync_1_2 = 0;
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} else {
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if (count_error_sync > 0) {
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count_error_sync--;
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}
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if (count_error_sync == 0)
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sync_data.local_flag_sync_1_2 = 1;
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}
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sync_data.pwm_freq_plus_minus_zero = -1;
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} else {
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sync_data.pwm_freq_plus_minus_zero = 0;
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sync_data.local_flag_sync_1_2 = 1;
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count_error_sync = 0;
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}
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} else
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sync_data.pwm_freq_plus_minus_zero = 0;
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sync_data.delta_error_sync = delta_error;
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sync_data.delta_capnum = capnum0 - sync_data.level_find_sync_zero; //delta_capnum;
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sync_data.count_error_sync = count_error_sync;
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sync_data.capnum0 = capnum0;
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//
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// stop_sync_interrupt();
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// EvbRegs.EVBIFRC.all = BIT2;
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//
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}
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// // Acknowledge interrupt to receive more interrupts from PIE group 5
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// PieCtrlRegs.PIEACK.all = PIEACK_GROUP5;
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// if (edrk.disable_interrupt_sync==0)
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// {
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//// //Enable more interrupts from this capture
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//// EvbRegs.EVBIMRC.bit.CAP6INT = 1;
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////
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//// //use mask to clear EVAIFRA register
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//// EvbRegs.EVBIFRC.bit.CAP6INT = 1;
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// }
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//Enable more interrupts from this capture
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// EvbRegs.EVBIMRC.bit.CAP6INT = 1;
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//use mask to clear EVAIFRA register
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// EvbRegs.EVBIFRC.bit.CAP6INT = 1;
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// DINT;
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// PieCtrlRegs.PIEIER5.all = TempPIEIER;
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// return;
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// IER &= ~(M_INT5);
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//Enable more interrupts from this capture
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// EvbRegs.EVBIMRC.bit.CAP6INT = 1;
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// Note: To be safe, use a mask value to write to the entire
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// EVAIFRA register. Writing to one bit will cause a read-modify-write
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// operation that may have the result of writing 1's to clear
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// bits other then those intended.
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//use mask to clear EVAIFRA register
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// EvbRegs.EVBIFRC.bit.CAP6INT = 1;
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// EvbRegs.EVBIFRC.all = BIT2;
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// IER &= ~(M_INT5);
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// asm(" NOP;");
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// i_led2_on_off(0);
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// start_sync_interrupt();
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// EvbRegs.EVBIMRC.bit.CAP6INT = 1;
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// Clear CAPINT6 interrupt flag
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// Acknowledge interrupt to receive more interrupts from PIE group 5
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// PieCtrlRegs.PIEACK.all = PIEACK_GROUP5;
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sync_data.count_interrupts++;
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}
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//static long k_3=50;
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#pragma CODE_SECTION(Sync_handler,".fast_run2");
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interrupt void Sync_handler(void) {
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// Set interrupt priority:
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volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER5.all;
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IER |= M_INT5;
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IER &= MINT5; // Set "global" priority
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PieCtrlRegs.PIEIER5.all &= MG57; // Set "group" priority
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PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
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stop_sync_interrupt_local(); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.
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#if (_ENABLE_INTERRUPT_PROFILE_LED1)
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if (enable_profile_led1_sync)
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i_led1_on_off_special(1);
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#endif
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#if (_ENABLE_INTERRUPT_PROFILE_LED2)
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if (enable_profile_led2_sync)
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i_led2_on_off_special(1);
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#endif
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EINT;
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// i_led2_on_off(1);
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// Insert ISR Code here.......
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sync_detected();
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// pause_1000(k_3);
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// Next line for debug only (remove after inserting ISR Code):
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//ESTOP0;
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// i_led2_on_off(0);
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// Enable more interrupts from this timer
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// EvbRegs.EVBIMRC.bit.CAP6INT = 1;
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// Note: To be safe, use a mask value to write to the entire
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// EVBIFRA register. Writing to one bit will cause a read-modify-write
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// operation that may have the result of writing 1's to clear
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// bits other then those intended.
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EvbRegs.EVBIFRC.all = BIT2;
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// Acknowledge interrupt to recieve more interrupts from PIE group 5
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// PieCtrlRegs.PIEACK.all |= PIEACK_GROUP5;
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// Restore registers saved:
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DINT;
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PieCtrlRegs.PIEIER5.all = TempPIEIER;
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#if (_ENABLE_INTERRUPT_PROFILE_LED1)
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if (enable_profile_led1_sync)
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i_led1_on_off_special(0);
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#endif
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#if (_ENABLE_INTERRUPT_PROFILE_LED2)
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if (enable_profile_led2_sync)
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i_led2_on_off_special(0);
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#endif
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}
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void setup_sync_int(void) {
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// return;
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// EALLOW;
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sync_data.level_find_sync_zero = LEVEL_FIND_SYNC_ZERO;
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sync_data.timeout_sync_signal = 0;
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sync_data.count_timeout_sync = 0;
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/////////////////////////////////////////////
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// EvbRegs.EVBIFRC.bit.CAP6INT = 1; //Resets flag EVB Interrupt Flag Register
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EvbRegs.EVBIFRC.all = BIT2; //Resets flag EVB Interrupt Flag Register
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EvbRegs.EVBIMRC.bit.CAP6INT = 0; //1 //SET flag EVB Interrupt Mask Register C
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// CAP6INT ENABLE
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//0 Disable
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//1 Enable
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/////////////////////////////////////////////
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EvbRegs.T4PR = 0xFFFF; //Set timer period
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EvbRegs.T4CNT = 0; // Clear timer counter
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EvbRegs.T4CON.all = 0; // Disable timer
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EvbRegs.T4CON.bit.FREE = 1; // FREE/SOFT, 00 = stop immediately on emulator suspend
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EvbRegs.T4CON.bit.SOFT = 0;
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EvbRegs.T4CON.bit.TMODE = 2; //TMODEx, 10 = continuous-up count mode
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EvbRegs.T4CON.bit.TPS = 0; //TPSx, 111 = x/1 prescaler
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EvbRegs.T4CON.bit.TENABLE = 0; // TENABLE, 1 = enable timer
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EvbRegs.T4CON.bit.TCLKS10 = 0; //TCLKS, 00 = HSPCLK is clock source
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EvbRegs.T4CON.bit.TCLD10 = 0; //Timer compare register reload condition, 00 When counter is 0
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EvbRegs.T4CON.bit.TECMPR = 1; // TECMPR, 1 = Enable timer compare operation
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EvbRegs.T4CON.bit.SET3PR = 0; // SELT3PR: 0 - Use own period register
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////////////////////////////////////////////////////
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EvbRegs.CAPCONB.all = 0; // Clear
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EvbRegs.CAPCONB.bit.CAP6EDGE = 2; //3:2 Edge Detection for Unit 6
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//Edge detection control for Capture Unit 6.
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// 00 No detection
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// 01 Detects rising edge
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// 10 Detects falling edge
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// 11 Detects both edges
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EvbRegs.CAPCONB.bit.CAP6TSEL = 0; // GP Timer selection for Unit 6
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// GP timer selection for Capture Units 4 and 5
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// 0 Selects GP timer 4
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// 1 Selects GP timer 3
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EvbRegs.CAPFIFOB.bit.CAP6FIFO = 0; //CAP6 FIFO status
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EvbRegs.CAPCONB.bit.CAP6EN = 1; //Enables Capture Unit 6
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/////////////////////////////////////////
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EALLOW;
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PieVectTable.CAPINT6 = &Sync_handler; //?CAP?????????????????
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EDIS;
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PieCtrlRegs.PIEIER5.bit.INTx7 = 1;
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}
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void start_sync_interrupt(void)
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{
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EvbRegs.EVBIFRC.all = BIT2; //Resets flag EVB Interrupt Flag Register
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IER |= M_INT5; // @suppress("Symbol is not resolved")
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// PieCtrlRegs.PIEIER5.bit.INTx7 = 1;
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EvbRegs.EVBIMRC.bit.CAP6INT = 1; //SET flag EVB Interrupt Mask Register C
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// //use mask to clear EVAIFRA register
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// PieCtrlRegs.PIEACK.all |= PIEACK_GROUP5;
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sync_data.latch_interrupt = 0;
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sync_data.enabled_interrupt = 1;
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}
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void stop_sync_interrupt(void)
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{
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sync_data.latch_interrupt = 0;
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sync_data.enabled_interrupt = 0;
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IER &= ~(M_INT5); // @suppress("Symbol is not resolved")
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// PieCtrlRegs.PIEIER5.bit.INTx7 = 0;
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EvbRegs.EVBIMRC.bit.CAP6INT = 0; //SET flag EVB Interrupt Mask Register C
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EvbRegs.EVBIFRC.all = BIT2; //Resets flag EVB Interrupt Flag Register
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// PieCtrlRegs.PIEACK.all |= PIEACK_GROUP5;
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}
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void stop_sync_interrupt_local(void)
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{
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sync_data.latch_interrupt = 0;
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IER &= ~(M_INT5); // @suppress("Symbol is not resolved")
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EvbRegs.EVBIMRC.bit.CAP6INT = 0; //SET flag EVB Interrupt Mask Register C
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EvbRegs.EVBIFRC.all = BIT2; //Resets flag EVB Interrupt Flag Register
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}
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void setup_sync_line(void) {
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// output
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EALLOW;
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GpioMuxRegs.GPBMUX.bit.TCLKINB_GPIOB12 = 0;
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GpioMuxRegs.GPBDIR.bit.GPIOB12 = 1;
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EDIS;
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//input
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EALLOW;
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GpioMuxRegs.GPBMUX.bit.CAP6QI2_GPIOB10 = 1;// Configure as CAP6
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// GpioMuxRegs.GPBDIR.bit.GPIOB10 = 1;
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EDIS;
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}
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#pragma CODE_SECTION(sync_inc_error,".fast_run");
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void sync_inc_error(void)
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{
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if (sync_data.count_pause_ready > 0) {
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sync_data.count_pause_ready--;
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} else
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sync_data.sync_ready = 0;
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if (sync_data.count_timeout_sync < MAX_COUNT_TIMEOUT_SYNC)
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{
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sync_data.count_timeout_sync++;
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}
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else
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{
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sync_data.timeout_sync_signal = 1;
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sync_data.count_pause_ready = 0;
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sync_data.local_flag_sync_1_2 = 0;
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}
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if (count_error_sync < MAX_COUNT_ERROR_SYNC) {
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count_error_sync++;
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} else
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sync_data.local_flag_sync_1_2 = 0;
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}
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void clear_sync_error(void)
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{
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sync_data.count_timeout_sync = 0;
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sync_data.timeout_sync_signal = 0;
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}
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int get_status_sync_line(void)
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{
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return !GpioDataRegs.GPBDAT.bit.GPIOB10;
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}
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//int index_sync_ar = 0;
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//
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//
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//void write_sync_logs(void)
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//{
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// static int c=0;
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// return;
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//
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//// logbuf1[index_filter_ar]=active_rect1.Id;//EvaRegs.CMPR1;//(active_rect1.pll_Ud);//svgenDQ.Wt;
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//// logbuf2[index_filter_ar]=active_rect1.Iq;//EvaRegs.CMPR2;//filter.iqU_1_long;// (active_rect1.pll_Uq);//Iq;
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//// logbuf3[index_filter_ar]=EvaRegs.CMPR1;//active_rect1.SetUzpt;////(active_rect1.Tetta);//abc_to_dq.Ud;
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//
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// index_sync_ar++;
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// if (index_sync_ar>=SIZE_SYNC_BUF)
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// {
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// index_sync_ar=0;
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// c++;
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// if (c>=10)
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// c=0;
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// }
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//
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//}
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