265 lines
6.9 KiB
C
265 lines
6.9 KiB
C
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#ifndef _SPARTAN2E_FUNCTIONS_H
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#define _SPARTAN2E_FUNCTIONS_H
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#include "DSP281x_Device.h"
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#define SIZE_XILINX200 90126 // count words
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struct XControll_reg_bit {
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unsigned int OE_BUF_Is_ON:1;
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unsigned int RemotePlane_Is_Reset:1;
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unsigned int Int_for_XNMI_XINT13_ON:1;
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unsigned int Int_for_XINT1_XBIO_ON:1;
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unsigned int line_Z_ER0_OUT_Is:1;
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unsigned int line_SET_MODE_Is:1;
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unsigned int line_ER0_OUT_Sorce_Is_Tms:1;
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unsigned int line_ER0_OUT_Is:1;
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unsigned int line_CLKS_Sorce_Is_Tms:1;
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unsigned int line_CLKS_Is:1;
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unsigned int line_P7_4_Sorce_Is_Tms:1;
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unsigned int line_P7_4_Is:4; // 4 bits
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unsigned int line_ER0_IN_Is:1; // WR has no effect
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};
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typedef union {
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unsigned int all;
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struct XControll_reg_bit bit;
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} XControll_reg;
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union XSeeprom_command_reg {
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unsigned int all;
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struct {
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unsigned int WR0:1;
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unsigned int P0:1;
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unsigned int A1:1;
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unsigned int bit3:1;
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unsigned int bit4:1;
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unsigned int bit5:1;
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unsigned int bit6:1;
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unsigned int bit7:1;
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} bit;
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};
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struct XSerial_bus_config_bit {
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unsigned int Use_Config:1;
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unsigned int Number_of_Frequency_is:3;
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unsigned int Use_Timer:1;
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unsigned int Range_CountTimer:4;
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unsigned int Use_Filtr_on_din:1;
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unsigned int Use_only_fast_Filtr_on_din:1;
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unsigned int Use_Tweaking:1;
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unsigned int Use_compensation_delay_on_Tweaking:1;
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unsigned int Use_SyncRdWr:1;
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unsigned int reserve_bits:2; // unused 2 bits
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};
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union XSerial_bus_config_reg {
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unsigned int all;
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struct XSerial_bus_config_bit bit;
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};
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struct XSerial_bus_intc_din_bit {
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unsigned int State_Is_Idle:1;
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unsigned int Error_CRC:1;
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unsigned int Error_Comand:1;
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unsigned int Timeout_Is_Complete:1;
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unsigned int Mode_Is_Config:1;
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unsigned int rezerv:3;
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};
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typedef volatile union {
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unsigned int all;
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struct XSerial_bus_intc_din_bit bit;
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} XSerial_bus_intc_din_reg;
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struct XSerial_bus_adr_bit {
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unsigned int AdrPlane:4;
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unsigned int reserve_bits:3; // unused 3 bits
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unsigned int RdWR:1; // '0' - WR, '1' - RD
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unsigned int AdrReg:8;
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};
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union XSerial_bus_adr_reg {
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unsigned int all;
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struct XSerial_bus_adr_bit bit;
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};
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typedef struct {
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unsigned int TypeAccess;
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unsigned int AdrPlane;
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unsigned int AdrReg;
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unsigned int DataWr;
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unsigned int DataRd;
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} Xmemory_uni;
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typedef volatile struct {
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unsigned int BaseAddress; // Base address of registers //
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unsigned int DataWr; // Data for write to selected register //
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unsigned int DataRd; // Reading data from selected register //
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union XSerial_bus_adr_reg Adr;
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XSerial_bus_intc_din_reg ISR;
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union XSerial_bus_config_reg Config;
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unsigned int IsReady:1; // Device is initialized and ready //
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} XSerial_bus;
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struct XSeeprom_s {
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unsigned int Adr_device;
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unsigned long Adr;
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unsigned long Adr_seeprom;
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unsigned long size;
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unsigned long ok_write;
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unsigned long write_error;
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unsigned long repeat_error;
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};
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typedef volatile struct XSeeprom_s XSeeprom_t;
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struct XSerial_bus_intc_mer_bit {
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unsigned int Master_Enable:1;
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unsigned int Hardware_Int_Enable:1;
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};
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union XSerial_bus_intc_mer_reg {
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unsigned int all;
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struct XSerial_bus_intc_mer_bit bit;
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};
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struct XSerial_bus_INTC {
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XSerial_bus_intc_din_reg ISR;
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XSerial_bus_intc_din_reg IER;
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XSerial_bus_intc_din_reg IPR;
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union XSerial_bus_intc_mer_reg MER;
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};
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struct XSerial_Tweaking_Data {
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unsigned int Tweaking_tr_line:4;
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unsigned int Tweaking_rec_line:4;
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};
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/*
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struct XSerial_bus_Config_Data {
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unsigned int Constant_for_Timer;
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unsigned int Number_Wait_State_for_TrRec:4;
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unsigned int Number_Wait_State_for_Pause:4;
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struct XSerial_Tweaking_Data Tweaking_chanal[8];
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unsigned int Delay_clk_for_Tr:7;
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unsigned int Delay_clk_for_Rec:7;
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unsigned int Use_fast_Filtr:1;
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unsigned int Use_fast_Transmit:1;
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unsigned int Tweaking_tbuf_en:4;
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};
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*/
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/*
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typedef volatile struct {
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unsigned int PlaneIsLive; // For selected DelayLine chanal is visible: QualityTrRec = 100%, bit per chanal
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unsigned int CountErrors; // count errors transmit-recieve
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XSerial_bus *Bus;
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struct XSerial_bus_INTC INTC;
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struct XSerial_bus_Config_Data Config_Data;
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unsigned int Number_Chanal;
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} XSerial_bus_stats;
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*/
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/*
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struct PARALLEL_BITS { // bits description
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Uint16 res0:1; // 0
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Uint16 res1:1; // 1
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Uint16 res2:1; // 2
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Uint16 res3:1; // 3
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Uint16 res4:1; // 4
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Uint16 res5:1; // 5
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Uint16 res6:1; // 6
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Uint16 res7:1; // 7
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Uint16 res8:1; // 8
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Uint16 res9:1; // 9
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Uint16 res10:1; // 10
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Uint16 res11:1; // 11
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Uint16 res12:1; // 12
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Uint16 res13:1; // 13
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Uint16 res14:1; // 14
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Uint16 res15:1; // 15
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};
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struct PARALLEL_STATUS_BITS { // bits description
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Uint16 err_crc:1; // 0
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Uint16 not_ready:1; // 1
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Uint16 res2:1; // 2
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Uint16 res3:1; // 3
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Uint16 res4:1; // 4
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Uint16 res5:1; // 5
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Uint16 res6:1; // 6
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Uint16 res7:1; // 7
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Uint16 res8:1; // 8
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Uint16 res9:1; // 9
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Uint16 res10:1; // 10
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Uint16 res11:1; // 11
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Uint16 res12:1; // 12
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Uint16 res13:1; // 13
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Uint16 res14:1; // 14
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Uint16 res15:1; // 15
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};
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union PARALLEL1_REG {
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Uint16 all;
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struct PARALLEL_BITS bit;
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};
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union PARALLEL2_REG {
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Uint16 all;
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struct PARALLEL_BITS bit;
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};
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union PARALLEL3_REG {
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Uint16 all;
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struct PARALLEL_BITS bit;
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};
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union PARALLEL4_REG {
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Uint16 all;
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struct PARALLEL_BITS bit;
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};
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union PARALLEL5_REG {
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Uint16 all;
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struct PARALLEL_BITS bit;
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};
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union PARALLEL_STATUS_REG {
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Uint16 all;
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struct PARALLEL_STATUS_BITS bit;
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};
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typedef volatile struct { // bits description
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union PARALLEL1_REG reg1;
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union PARALLEL2_REG reg2;
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union PARALLEL3_REG reg3;
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union PARALLEL4_REG reg4;
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union PARALLEL5_REG reg5;
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union PARALLEL_STATUS_REG status;
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} PARALLEL_REGS;
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*/
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int load_xilinx_new(unsigned long adr,unsigned long size);
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int xflash_remote_eeprom(unsigned int adr_device, unsigned long adr,
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unsigned long adr_eeprom, unsigned long size, unsigned long *ok_write,
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unsigned long *write_error, unsigned long *repeat_error );
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long xread_remote_eeprom(unsigned int adr_device, unsigned long adr_eeprom,
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unsigned long adr, unsigned long size, unsigned long *ok_write,
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unsigned long *write_error, unsigned long *repeat_error );
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long xverify_remote_eeprom(unsigned int adr_device, unsigned long adr,
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unsigned long adr_eeprom, unsigned long size, unsigned long *ok_write,
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unsigned long *write_error, unsigned long *repeat_error );
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int test_xilinx_live(void);
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int enable_er0_control(void);
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void ResetNPeriphPlane(unsigned int np);
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#endif
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