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/*
* sbor_shema . c
*
* Created on : 18 <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> . 2021 <EFBFBD> .
* Author : stud
*/
# include "sbor_shema.h"
# include "IQmathLib.h"
# include "edrk_main.h"
# include "optical_bus.h"
# include "adc_tools.h"
# include "control_station.h"
# include "control_station_project.h"
# define RASCEPITEL_MANUAL_ALWAYS_ON 0 //1
///////////////////////////////////////////////
///////////////////////////////////////////////
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# define IQ_MINIMAL_DELTA_RUN_CHARGE 279620 // 50V //559240 //100 V
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# define IQ_MINIMAL_DELTA_RUN_WORK 1677720 // 300 V // 559240 // 100V
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# define IQ_MINIMAL_ZAD_U_CHARGE 55924 // 10V
# define IQ_MAXIMAL_ZAD_U_CHARGE 14596177 // 2610V
# define IQ_MINIMAL_DELTA_RUN_CHARGE2 139810 //25 V
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# define TIME_WAIT_CHARGE_ON 100 //10 sec
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# define TIME_PAUSE_U_RISE 30 // 1 sec
# define IQ_MINIMAL_RISE_U 55924 // 10V
unsigned int zaryad_on_off ( unsigned int flag )
{
static int restart_charge = 0 , batt_ok = 0 ;
static unsigned int time_wait_on_charge = 0 ;
static unsigned int time_pause_detect_u_rise = 0 ;
static _iq prev_U1 = 0 , prev_U2 = 0 ;
batt_ok = 0 ;
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> - <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> !!!
if ( _IQabs ( filter . iqU_1_long - filter . iqU_2_long ) > IQ_MINIMAL_DELTA_RUN_WORK )
{
// edrk.errors.e6.bits.ERROR_PRE_CHARGE_U |= 1;
edrk . errors . e6 . bits . ER_DISBAL_BATT | = 1 ;
edrk . to_ing . bits . ZARYAD_ON = 0 ;
batt_ok = 0 ;
}
if ( flag & & edrk . summ_errors = = 0 & & edrk . errors . e6 . bits . ERROR_PRE_CHARGE_U = = 0 & & edrk . errors . e6 . bits . ER_DISBAL_BATT = = 0 )
{
// <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> !!!
if ( ( edrk . zadanie . iq_ZadanieU_Charge - IQ_MINIMAL_ZAD_U_CHARGE ) < = 0 )
{
edrk . errors . e5 . bits . ERROR_PRE_CHARGE_ON | = 1 ;
edrk . to_ing . bits . ZARYAD_ON = 0 ;
return 0 ;
}
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> !!!
if ( ( IQ_MAXIMAL_ZAD_U_CHARGE - edrk . zadanie . iq_ZadanieU_Charge ) < 0 )
{
edrk . errors . e5 . bits . ERROR_PRE_CHARGE_ON | = 1 ;
edrk . to_ing . bits . ZARYAD_ON = 0 ;
return 0 ;
}
// <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
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if ( _IQabs ( filter . iqU_1_long - filter . iqU_2_long ) > IQ_MINIMAL_DELTA_RUN_CHARGE )
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{
edrk . errors . e6 . bits . ER_DISBAL_BATT | = 1 ;
edrk . to_ing . bits . ZARYAD_ON = 0 ;
return 0 ;
}
if ( restart_charge = = 0 )
{
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
if ( edrk . from_ing1 . bits . ZARYAD_ON & &
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( filter . iqU_1_long > = ( edrk . zadanie . iq_ZadanieU_Charge )
| | filter . iqU_2_long > = ( edrk . zadanie . iq_ZadanieU_Charge ) )
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)
{
restart_charge = 1 ;
edrk . to_ing . bits . ZARYAD_ON = 0 ;
}
else
{
//TODO !!! <20> <> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> if. <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ?
if ( edrk . from_ing1 . bits . ZARYAD_ON = = 0 & &
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( filter . iqU_1_long > = ( edrk . zadanie . iq_ZadanieU_Charge - IQ_MINIMAL_DELTA_RUN_CHARGE )
| | filter . iqU_2_long > = ( edrk . zadanie . iq_ZadanieU_Charge - IQ_MINIMAL_DELTA_RUN_CHARGE ) ) )
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{
restart_charge = 1 ;
edrk . to_ing . bits . ZARYAD_ON = 0 ;
}
else
{
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> .
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if ( ( filter . iqU_1_long < ( edrk . zadanie . iq_ZadanieU_Charge - IQ_MINIMAL_DELTA_RUN_CHARGE ) )
& & ( filter . iqU_2_long < ( edrk . zadanie . iq_ZadanieU_Charge - IQ_MINIMAL_DELTA_RUN_CHARGE ) ) )
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edrk . to_ing . bits . ZARYAD_ON = 1 ;
}
}
if ( pause_detect_error ( & time_pause_detect_u_rise , TIME_PAUSE_U_RISE , 1 ) )
{
time_pause_detect_u_rise = 0 ;
if ( ( ( filter . iqU_1_long - prev_U1 ) > = IQ_MINIMAL_RISE_U ) | |
( ( filter . iqU_2_long - prev_U2 ) > = IQ_MINIMAL_RISE_U ) )
time_wait_on_charge = 0 ;
prev_U1 = filter . iqU_1_long ;
prev_U2 = filter . iqU_2_long ;
}
// <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> !!!
if ( pause_detect_error ( & time_wait_on_charge , TIME_WAIT_CHARGE_ON , 1 ) )
edrk . errors . e6 . bits . ERROR_PRE_CHARGE_U | = 1 ;
/*
if ( filter . iqU_1_long > = ( edrk . iq_ZadanieU_Charge - IQ_MINIMAL_DELTA_RUN_CHARGE2 )
| | filter . iqU_2_long > = ( edrk . iq_ZadanieU_Charge - IQ_MINIMAL_DELTA_RUN_CHARGE2 ) )
{
restart_charge = 1 ;
edrk . to_ing . bits . ZARYAD_ON = 0 ;
}
else
{
// <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
if ( _IQabs ( filter . iqU_1_long - filter . iqU_2_long ) > IQ_MINIMAL_DELTA_RUN_CHARGE )
edrk . errors . e6 . bits . ER_DISBAL_BATT | = 1 ;
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> .
if ( ( filter . iqU_1_long < ( edrk . iq_ZadanieU_Charge - IQ_MINIMAL_DELTA_RUN_CHARGE ) )
| | ( filter . iqU_2_long < ( edrk . iq_ZadanieU_Charge - IQ_MINIMAL_DELTA_RUN_CHARGE ) ) )
edrk . to_ing . bits . ZARYAD_ON = 1 ;
if ( ( filter . iqU_1_long > = ( edrk . iq_ZadanieU_Charge ) )
& & ( filter . iqU_2_long > = ( edrk . iq_ZadanieU_Charge ) ) )
{
restart_charge = 1 ;
edrk . to_ing . bits . ZARYAD_ON = 0 ;
}
}
*/
}
else //restart_charge==0
{
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> -<2D> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> !!!
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if ( ( filter . iqU_1_long < ( edrk . zadanie . iq_ZadanieU_Charge - IQ_MINIMAL_DELTA_RUN_CHARGE ) )
| | ( filter . iqU_2_long < ( edrk . zadanie . iq_ZadanieU_Charge - IQ_MINIMAL_DELTA_RUN_CHARGE ) ) )
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edrk . errors . e6 . bits . ERROR_PRE_CHARGE_U | = 1 ;
} //restart_charge==0
}
else // flag==1
{
restart_charge = 0 ;
edrk . to_ing . bits . ZARYAD_ON = 0 ;
time_wait_on_charge = 0 ;
prev_U1 = filter . iqU_1_long ;
prev_U2 = filter . iqU_2_long ;
}
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if ( ( filter . iqU_1_long > = ( edrk . zadanie . iq_ZadanieU_Charge - IQ_MINIMAL_DELTA_RUN_CHARGE ) )
& & ( filter . iqU_2_long > = ( edrk . zadanie . iq_ZadanieU_Charge - IQ_MINIMAL_DELTA_RUN_CHARGE ) )
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& & ( _IQabs ( filter . iqU_1_long - filter . iqU_2_long ) < IQ_MINIMAL_DELTA_RUN_WORK )
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& & ( filter . iqU_1_long < = ( edrk . zadanie . iq_ZadanieU_Charge + IQ_MINIMAL_DELTA_RUN_CHARGE ) )
& & ( filter . iqU_2_long < = ( edrk . zadanie . iq_ZadanieU_Charge + IQ_MINIMAL_DELTA_RUN_CHARGE ) )
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& & edrk . to_ing . bits . ZARYAD_ON = = 0
& & edrk . from_ing1 . bits . ZARYAD_ON = = 0
& & edrk . errors . e5 . bits . ERROR_PRE_CHARGE_ON = = 0
& & edrk . errors . e6 . bits . ERROR_PRE_CHARGE_U = = 0
)
batt_ok = 1 ;
// return (restart_charge && edrk.errors.e5.bits.ERROR_PRE_CHARGE_ON==0 && edrk.errors.e6.bits.ERROR_PRE_CHARGE_U==0);
return batt_ok ;
}
///////////////////////////////////////////////
///////////////////////////////////////////////
void set_status_pump_fan ( void )
{
if ( edrk . from_ing1 . bits . VENTIL_ON = = 1 )
edrk . StatusFunAll = 1 ;
else
edrk . StatusFunAll = 0 ;
/*
if ( ( edrk . from_ing . bits . NASOS_NORMA = = 1 ) & &
edrk . StartPump & & edrk . errors . e5 . bits . PRE_READY_PUMP = = 0 & &
( edrk . to_ing . bits . NASOS_1_ON | | edrk . to_ing . bits . NASOS_2_ON ) & &
( edrk . errors . e5 . bits . PUMP_1 = = 0 ) & & ( edrk . errors . e5 . bits . PUMP_2 = = 0 ) & &
edrk . errors . e2 . bits . P_WATER_INT_MAX = = 0 & & edrk . errors . e2 . bits . P_WATER_INT_MIN = = 0 )
*/
if (
( edrk . from_ing1 . bits . NASOS_NORMA = = 1 ) & &
( edrk . to_ing . bits . NASOS_1_ON | | edrk . to_ing . bits . NASOS_2_ON ) & &
edrk . from_ing1 . bits . NASOS_ON & & edrk . errors . e5 . bits . PRE_READY_PUMP = = 0 & &
( edrk . errors . e5 . bits . PUMP_1 = = 0 ) & & ( edrk . errors . e5 . bits . PUMP_2 = = 0 )
)
{
if ( edrk . to_ing . bits . NASOS_1_ON )
edrk . StatusPump0 = 1 ;
else
edrk . StatusPump0 = 0 ;
if ( edrk . to_ing . bits . NASOS_2_ON )
edrk . StatusPump1 = 1 ;
else
edrk . StatusPump1 = 0 ;
edrk . StatusPumpAll = 1 ;
}
else
{
edrk . StatusPump0 = 0 ;
edrk . StatusPump1 = 0 ;
edrk . StatusPumpAll = 0 ;
}
if ( edrk . StatusFunAll & & edrk . StatusPumpAll )
edrk . StatusPumpFanAll = 1 ;
else
{
// <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> .
if ( control_station . active_array_cmd [ CONTROL_STATION_CMD_DISABLE_ON_PUMP ] )
edrk . StatusPumpFanAll = 1 ;
else
{
edrk . StatusPumpFanAll = 0 ;
}
}
}
///////////////////////////////////////////////
///////////////////////////////////////////////
int detect_zaryad_ump ( void )
{
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if ( edrk . from_shema . bits . UMP_ON_OFF = = 1 )
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{
if ( ( filter . iqUin_m1 > = edrk . iqMIN_U_IN )
& & ( filter . iqUin_m2 > = edrk . iqMIN_U_IN )
& & ( filter . iqUin_m1 < = edrk . iqMAX_U_IN )
& & ( filter . iqUin_m2 < = edrk . iqMAX_U_IN ) )
return 1 ;
else
return 0 ;
}
else
return 0 ;
}
///////////////////////////////////////////////
///////////////////////////////////////////////
///////////////////////////////////////////////
///////////////////////////////////////////////
///////////////////////////////////////////////
///////////////////////////////////////////////
///////////////////////////////////////////////
///////////////////////////////////////////////
///////////////////////////////////////////////
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# define TIME_WAIT_SBOR 2500
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# define TIME_WAIT_ANSWER_NASOS 500
# define TIME_WAIT_OK_NASOS 50
///////////////////////////////////////////////
///////////////////////////////////////////////
void sbor_shema_pusk_nasos ( unsigned int t_start , unsigned int t_finish )
{
static unsigned int time_error_nasos = 0 ;
static unsigned int time_ok_nasos = 0 ;
int status_pump , status_pump_long ;
// <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
if ( edrk . Sbor_Mode = = t_start )
{
if ( control_station . active_array_cmd [ CONTROL_STATION_CMD_DISABLE_ON_PUMP ] = = 0 )
edrk . AutoStartPump = 1 ;
time_error_nasos = 0 ;
time_ok_nasos = 0 ;
if ( control_station . active_array_cmd [ CONTROL_STATION_CMD_DISABLE_ON_PUMP ] = = 1 )
edrk . Sbor_Mode = t_finish ; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
}
// <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
if ( edrk . Sbor_Mode > t_start & & edrk . Sbor_Mode < t_finish )
{
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edrk . Stage_Sbor = 1 ;
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status_pump = get_status_p_water_min ( edrk . StatusPumpFanAll ) ;
/* if (status & 4)
edrk . errors . e2 . bits . P_WATER_INT_MIN | = 1 ;
if ( status = = 2 )
edrk . warnings . e2 . bits . P_WATER_INT_MIN = 1 ;
if ( status = = 1 )
edrk . warnings . e2 . bits . P_WATER_INT_MIN = 0 ;
*/
// <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> status_pump == 1
if ( status_pump )
{
if ( pause_detect_error ( & time_ok_nasos , TIME_WAIT_OK_NASOS , 1 ) )
{
status_pump_long = 1 ;
}
}
else
{
time_ok_nasos = 0 ;
status_pump_long = 0 ;
}
if ( edrk . StatusPumpFanAll & & status_pump = = 1 ) // <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
{
edrk . Sbor_Mode = t_finish ;
}
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
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if ( edrk . Sbor_Mode = = ( t_start + ( t_finish - t_start ) > > 1 ) )
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{
}
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
if ( edrk . Sbor_Mode = = ( t_finish - 1 ) )
{
edrk . errors . e7 . bits . ERROR_SBOR_SHEMA | = 1 ;
edrk . errors . e11 . bits . ERROR_PUMP_ON_SBOR | = 1 ;
edrk . Status_Sbor = 2 ;
edrk . AutoStartPump = 0 ;
}
}
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
if ( edrk . Sbor_Mode > t_finish )
{
if ( edrk . StatusPumpFanAll = = 0 )
{
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD>
if ( edrk . SelectPump1_2 = = 1 )
{
// <20> <> <20> <> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> 1
// <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD>
if ( pause_detect_error ( & time_error_nasos , TIME_WAIT_ANSWER_NASOS , 1 ) )
{
edrk . errors . e7 . bits . ERROR_SBOR_SHEMA | = 1 ;
edrk . errors . e11 . bits . ERROR_RESTART_PUMP_1_ON_SBOR | = 1 ;
edrk . Status_Sbor = 102 ;
edrk . AutoStartPump = 0 ;
}
}
else
if ( edrk . SelectPump1_2 = = 2 )
{
// <20> <> <20> <> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> 2
// <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD>
if ( pause_detect_error ( & time_error_nasos , TIME_WAIT_ANSWER_NASOS , 1 ) )
{
edrk . errors . e7 . bits . ERROR_SBOR_SHEMA | = 1 ;
edrk . errors . e11 . bits . ERROR_RESTART_PUMP_1_ON_SBOR | = 1 ;
edrk . Status_Sbor = 102 ;
edrk . AutoStartPump = 0 ;
}
}
else
{
edrk . errors . e7 . bits . ERROR_SBOR_SHEMA | = 1 ;
edrk . errors . e11 . bits . ERROR_RESTART_PUMP_ALL_ON_SBOR | = 1 ;
edrk . Status_Sbor = 102 ;
edrk . AutoStartPump = 0 ;
}
}
else
time_error_nasos = 0 ;
}
}
void sbor_shema_pusk_zaryad ( unsigned int t_start , unsigned int t_finish )
{
/////////////////////////////////////
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
if ( edrk . Sbor_Mode = = t_start )
{
if ( control_station . active_array_cmd [ CONTROL_STATION_CMD_ENABLE_ON_CHARGE ] = = 1 )
edrk . Run_Pred_Zaryad = 1 ; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> !
}
// <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
if ( edrk . Sbor_Mode > t_start & & edrk . Sbor_Mode < t_finish & & ( edrk . Status_Charge | | ( control_station . active_array_cmd [ CONTROL_STATION_CMD_ENABLE_ON_CHARGE ] = = 0 ) )
& & edrk . from_ing1 . bits . ZARYAD_ON = = 0 & & edrk . StatusPumpFanAll )
{
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edrk . Stage_Sbor = 2 ;
2024-12-27 10:50:32 +03:00
if ( ( edrk . Status_Charge | | ( control_station . active_array_cmd [ CONTROL_STATION_CMD_ENABLE_ON_CHARGE ] = = 0 ) )
& & edrk . from_ing1 . bits . ZARYAD_ON = = 0 & & edrk . StatusPumpFanAll )
{
edrk . Zaryad_OK = 1 ;
edrk . Run_Pred_Zaryad = 0 ;
edrk . Sbor_Mode = t_finish ;
}
// <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
if ( edrk . Sbor_Mode = = ( t_finish - 1 ) )
{
edrk . Run_Pred_Zaryad = 0 ;
edrk . errors . e7 . bits . ERROR_SBOR_SHEMA | = 1 ;
edrk . errors . e11 . bits . ERROR_PRED_ZARYAD | = 1 ;
edrk . Status_Sbor = 4 ;
}
}
if ( edrk . Sbor_Mode > t_finish )
{
if ( edrk . Zaryad_OK = = 0 | | edrk . from_ing1 . bits . ZARYAD_ON = = 1 )
{
edrk . Run_Pred_Zaryad = 0 ;
edrk . errors . e7 . bits . ERROR_SBOR_SHEMA | = 1 ;
edrk . errors . e11 . bits . ERROR_PRED_ZARYAD_AFTER | = 1 ;
edrk . Status_Sbor = 104 ;
}
}
}
void sbor_shema_pusk_ump ( unsigned int t_start , unsigned int t_finish )
{
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> UMP
if ( edrk . Sbor_Mode = = t_start & & edrk . Zaryad_OK = = 1 )
{
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edrk . Run_UMP = 1 ;
2024-12-27 10:50:32 +03:00
}
if ( edrk . Sbor_Mode > t_start & & edrk . Sbor_Mode < t_finish )
{
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edrk . Stage_Sbor = 3 ;
2024-12-27 10:50:32 +03:00
if ( edrk . Zaryad_OK = = 1 & & edrk . Status_UMP_Ok = = 1 & & edrk . Zaryad_UMP_Ok = = 1 )
edrk . Sbor_Mode = t_finish ;
// <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
if ( edrk . Sbor_Mode = = ( t_finish - 1 ) )
{
edrk . Run_UMP = 0 ;
edrk . errors . e7 . bits . ERROR_SBOR_SHEMA | = 1 ;
edrk . errors . e11 . bits . ERROR_UMP_NOT_ON | = 1 ;
edrk . Status_Sbor = 5 ;
}
}
// if (edrk.Sbor_Mode>t_finish && (edrk.Zaryad_OK == 0 || edrk.Status_UMP_Ok==0))
// {
//
// edrk.Run_UMP = 0;
// edrk.Run_Pred_Zaryad = 0;
// edrk.errors.e7.bits.ERROR_SBOR_SHEMA |= 1;
// edrk.errors.e7.bits.UMP_NOT_ANSWER |= 1;
// edrk.Run_QTV = 0;
// edrk.Status_Sbor = 105;
// }
}
void sbor_shema_pusk_qtv ( unsigned int t_start , unsigned int t_finish )
{
if ( edrk . Sbor_Mode = = t_start & & edrk . Zaryad_OK = = 1 & & edrk . Status_UMP_Ok )
{
edrk . Run_QTV = 1 ;
}
if ( edrk . Sbor_Mode > t_start & & edrk . Sbor_Mode < t_finish )
{
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edrk . Stage_Sbor = 4 ;
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if ( ( edrk . Zaryad_OK = = 1 & & edrk . Status_QTV_Ok = = 1 & & edrk . Status_UMP_Ok ) )
edrk . Sbor_Mode = t_finish ;
if ( edrk . Sbor_Mode = = ( t_finish - 1 ) & & edrk . Status_UMP_Ok = = 0 )
{
edrk . Run_QTV = 0 ;
edrk . Run_UMP = 0 ;
edrk . errors . e7 . bits . ERROR_SBOR_SHEMA | = 1 ;
edrk . errors . e11 . bits . ERROR_READY_UMP_BEFORE_QTV | = 1 ;
edrk . Status_Sbor = 6 ;
}
}
if ( edrk . Sbor_Mode > t_finish )
{
if ( edrk . Zaryad_OK = = 0 | | edrk . Status_QTV_Ok = = 0 )
{
edrk . errors . e7 . bits . ERROR_SBOR_SHEMA | = 1 ;
edrk . errors . e11 . bits . ERROR_STATUS_QTV | = 1 ;
edrk . Run_QTV = 0 ;
edrk . Status_Sbor = 106 ;
}
}
}
void sbor_shema_stop_ump ( unsigned int t_start , unsigned int t_finish )
{
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> UMP
if ( edrk . Sbor_Mode = = t_start & & edrk . Status_QTV_Ok = = 1 )
{
edrk . Run_UMP = 0 ;
}
if ( edrk . Sbor_Mode > t_start & & edrk . Sbor_Mode < t_finish )
{
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edrk . Stage_Sbor = 5 ;
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if ( edrk . Status_UMP_Ok = = 0 )
edrk . Sbor_Mode = t_finish ;
// <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
if ( edrk . Sbor_Mode = = ( t_finish - 1 ) )
{
edrk . Run_UMP = 0 ;
edrk . Run_QTV = 0 ;
edrk . errors . e7 . bits . ERROR_SBOR_SHEMA | = 1 ;
// edrk.errors.e7.bits.UMP_NOT_ANSWER |= 1;
edrk . errors . e11 . bits . ERROR_UMP_NOT_OFF | = 1 ;
edrk . Status_Sbor = 7 ;
}
}
if ( edrk . Sbor_Mode > t_finish & & edrk . Status_UMP_Ok = = 1 )
{
edrk . Run_UMP = 0 ;
edrk . Run_Pred_Zaryad = 0 ;
edrk . errors . e7 . bits . ERROR_SBOR_SHEMA | = 1 ;
edrk . errors . e11 . bits . ERROR_UMP_ON_AFTER | = 1 ;
edrk . Run_QTV = 0 ;
edrk . Status_Sbor = 107 ;
}
}
void sbor_shema_rascepitel_level_1 ( unsigned int t_start , unsigned int t_finish )
{
# if(RASCEPITEL_MANUAL_ALWAYS_ON==1)
if ( edrk . Sbor_Mode = = t_start & & ( edrk . Zaryad_OK = = 1 & & edrk . Status_QTV_Ok = = 1 ) )
{
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edrk . Stage_Sbor = 6 ;
2024-12-27 10:50:32 +03:00
// <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
if ( optical_read_data . data . cmd . bit . ready_cmd ! = CODE_READY_CMD_READY2 )
{
edrk . Run_Rascepitel = 1 ;
edrk . Sbor_Mode = t_finish ; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
}
else
edrk . RunZahvatRascepitel = 1 ; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
}
if ( edrk . Sbor_Mode > t_start & & edrk . Sbor_Mode < t_finish & & ( edrk . Zaryad_OK = = 1 & & edrk . Status_QTV_Ok = = 1 )
& & edrk . RunZahvatRascepitel & & edrk . Run_Rascepitel = = 0 )
{
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edrk . Stage_Sbor = 6 ;
2024-12-27 10:50:32 +03:00
// <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD>
if ( optical_read_data . data . cmd . bit . rascepitel_cmd = = CODE_RASCEPITEL_CMD_ENABLE_ON_AND_THIS_ON ) // 01 - <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
{
edrk . Run_Rascepitel = 1 ;
edrk . Sbor_Mode = t_finish ; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
}
}
# else
if ( edrk . Sbor_Mode = = t_start & & ( edrk . Zaryad_OK = = 1 & & edrk . Status_QTV_Ok = = 1 ) & & edrk . Status_Rascepitel_Ok = = 0 )
{
2025-01-15 13:39:33 +03:00
edrk . Stage_Sbor = 6 ;
2024-12-27 10:50:32 +03:00
// <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
if ( optical_read_data . data . cmd . bit . ready_cmd ! = CODE_READY_CMD_READY2 )
{
edrk . Run_Rascepitel = 1 ;
edrk . Sbor_Mode = t_finish ; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
}
else
edrk . RunZahvatRascepitel = 1 ; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
}
//
if ( edrk . Sbor_Mode > t_start & & edrk . Sbor_Mode < t_finish & & ( edrk . Zaryad_OK = = 1 & & edrk . Status_QTV_Ok = = 1 )
& & edrk . RunZahvatRascepitel & & edrk . Status_Rascepitel_Ok = = 0 & & edrk . Run_Rascepitel = = 0 )
{
2025-01-15 13:39:33 +03:00
edrk . Stage_Sbor = 6 ;
2024-12-27 10:50:32 +03:00
// <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD>
if ( optical_read_data . data . cmd . bit . rascepitel_cmd = = CODE_RASCEPITEL_CMD_ENABLE_ON_AND_THIS_ON ) // 01 - <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
{
edrk . Run_Rascepitel = 1 ;
edrk . Sbor_Mode = t_finish ; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
}
}
# endif
if ( edrk . Sbor_Mode > t_finish )
{
if ( edrk . Run_Rascepitel = = 0 )
{
// <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
edrk . errors . e7 . bits . ERROR_SBOR_SHEMA | = 1 ;
edrk . errors . e11 . bits . ERROR_RASCEPITEL_WAIT_CMD | = 1 ;
edrk . Run_QTV = 0 ;
edrk . Status_Sbor = 108 ;
// <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
if ( edrk . RunZahvatRascepitel )
edrk . errors . e1 . bits . NO_CONFIRM_ON_RASCEPITEL | = 1 ;
edrk . RunZahvatRascepitel = 0 ;
edrk . Run_Rascepitel = 0 ;
}
}
}
void sbor_shema_rascepitel_level_2 ( unsigned int t_start , unsigned int t_finish )
{
if ( edrk . Sbor_Mode > t_start & & edrk . Sbor_Mode < t_finish )
{
2025-01-15 13:39:33 +03:00
edrk . Stage_Sbor = 7 ;
2024-12-27 10:50:32 +03:00
# if(RASCEPITEL_MANUAL_ALWAYS_ON==1)
edrk . Sbor_Mode = t_finish ; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
# else
if ( ( edrk . Zaryad_OK = = 1 & & edrk . Status_QTV_Ok = = 1 )
& & edrk . Status_Rascepitel_Ok = = 1 & & edrk . Run_Rascepitel = = 1 )
{
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
edrk . Sbor_Mode = t_finish ; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
}
if ( edrk . Sbor_Mode = = ( t_finish - 1 ) & & edrk . Status_Rascepitel_Ok = = 0 & & edrk . Run_Rascepitel = = 1 )
{
// <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
edrk . errors . e7 . bits . ERROR_SBOR_SHEMA | = 1 ;
edrk . Run_QTV = 0 ;
edrk . Status_Sbor = 9 ;
edrk . errors . e6 . bits . RASCEPITEL_ERROR_NOT_ANSWER | = 1 ;
edrk . RunZahvatRascepitel = 0 ;
edrk . Run_Rascepitel = 0 ;
}
# endif
}
if ( edrk . Sbor_Mode > t_finish & & edrk . Status_Rascepitel_Ok = = 0 )
{
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD>
edrk . errors . e7 . bits . ERROR_SBOR_SHEMA | = 1 ;
edrk . Run_QTV = 0 ;
edrk . Status_Sbor = 109 ;
// edrk.errors.e6.bits.RASCEPITEL_ERROR_NOT_ANSWER |= 1;
edrk . errors . e11 . bits . ERROR_RASCEPITEL_ON_AFTER | = 1 ;
edrk . RunZahvatRascepitel = 0 ;
edrk . Run_Rascepitel = 0 ;
}
//
// <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> edrk.RunZahvatRascepitel <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
//
// if (edrk.Sbor_Mode>t_start && edrk.Sbor_Mode<t_finish && (edrk.Zaryad_OK == 1 && edrk.Status_QTV_Ok==1 )
// && edrk.Status_Rascepitel_Ok==1 && edrk.Run_Rascepitel==1)
// {
// // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// edrk.Sbor_Mode = t_finish; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// }
//
////
// // <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> edrk.RunZahvatRascepitel <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// if (edrk.Sbor_Mode==(t_finish-1) && (edrk.Zaryad_OK == 1 && edrk.Status_QTV_Ok==1 )
// && edrk.RunZahvatRascepitel && edrk.Status_Rascepitel_Ok==0 && edrk.Run_Rascepitel==0)
// {
// //
//// if (optical_read_data.data.cmd.bit.rascepitel_cmd != CODE_RASCEPITEL_CMD_ENABLE_ON_AND_THIS_ON ) // 01 - <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// {
// // <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// edrk.errors.e7.bits.ERROR_SBOR_SHEMA |= 1;
// edrk.Run_QTV = 0;
// edrk.Status_Sbor = 8;
// edrk.errors.e1.bits.NO_CONFIRM_ON_RASCEPITEL |= 1;
// edrk.RunZahvatRascepitel = 0;
// edrk.Run_Rascepitel = 0;
//// edrk.Run_Rascepitel = 0;
// }
// }
}
void sbor_shema_rascepitel_level_3 ( unsigned int t_start , unsigned int t_finish )
{
// <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
if ( edrk . Sbor_Mode > t_start & & edrk . Sbor_Mode < t_finish )
{
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edrk . Stage_Sbor = 8 ;
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if ( edrk . Status_Rascepitel_Ok = = 1 )
{
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> !
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD>
edrk . Sbor_Mode = t_finish ; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
edrk . RunZahvatRascepitel = 0 ;
}
// edrk.Run_Rascepitel = 1;
}
// if (edrk.Sbor_Mode==(t_finish-1) && (edrk.Zaryad_OK == 0 || edrk.Status_QTV_Ok==0 || edrk.Status_Rascepitel_Ok==0))
// {
// edrk.errors.e7.bits.ERROR_SBOR_SHEMA |= 1;
// edrk.Run_QTV = 0;
//// edrk.Run_Rascepitel = 0;
// edrk.RunZahvatRascepitel = 0;
// edrk.Status_Sbor = 10;
// edrk.Run_Rascepitel = 0;
//
// }
}
void sbor_shema_rascepitel_level_4 ( unsigned int t_start , unsigned int t_finish )
{
if ( edrk . Sbor_Mode > t_start & & edrk . Sbor_Mode < t_finish & & ( edrk . Zaryad_OK = = 1 & & edrk . Status_QTV_Ok = = 1 & & edrk . Status_Rascepitel_Ok ) )
{
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edrk . Stage_Sbor = 9 ;
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if ( optical_read_data . data . cmd . bit . ready_cmd = = CODE_READY_CMD_READY1TO2 ) // <20> <> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD>
{
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <>
// <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> .
if ( optical_read_data . data . cmd . bit . rascepitel_cmd = = CODE_RASCEPITEL_CMD_ENABLE_ON_AND_THIS_ON )
edrk . Sbor_Mode = t_finish ; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
}
else
{
edrk . Sbor_Mode = t_finish ; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
}
}
// if (edrk.Sbor_Mode>t_finish)
// {
// if (edrk.Status_Rascepitel_Ok==0)
// {
// edrk.errors.e7.bits.ERROR_SBOR_SHEMA |= 1;
// edrk.Run_QTV = 0;
// edrk.RunZahvatRascepitel = 0;
// edrk.Status_Sbor = 9;
// edrk.Run_Rascepitel = 0;
//
// }
//
// }
}
void sbor_shema_wait_ready_another ( unsigned int t_start , unsigned int t_finish )
{
if ( edrk . Sbor_Mode > t_start & & edrk . Sbor_Mode < t_finish & & ( edrk . Zaryad_OK = = 1 & & edrk . Status_QTV_Ok = = 1 & & edrk . Status_Rascepitel_Ok ) )
{
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edrk . Stage_Sbor = 10 ;
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if ( optical_read_data . data . cmd . bit . ready_cmd ! = CODE_READY_CMD_READY1TO2 )
{
edrk . Sbor_Mode = t_finish ; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
}
if ( edrk . Sbor_Mode = = ( t_finish - 1 ) & & optical_read_data . data . cmd . bit . ready_cmd = = CODE_READY_CMD_READY1TO2 )
{
edrk . errors . e7 . bits . ERROR_SBOR_SHEMA | = 1 ;
edrk . errors . e1 . bits . ANOTHER_BS_VERY_LONG_WAIT | = 1 ;
edrk . Run_QTV = 0 ;
// edrk.Run_Rascepitel = 0;
edrk . RunZahvatRascepitel = 0 ;
edrk . Status_Sbor = 11 ;
edrk . Run_Rascepitel = 0 ;
}
}
}
void sbor_shema_wait_finish ( unsigned int t_start , unsigned int t_finish )
{
if ( edrk . Sbor_Mode > t_start & & ( edrk . Zaryad_OK = = 1 & & edrk . Status_QTV_Ok = = 1 & & edrk . Status_Rascepitel_Ok ) )
{
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edrk . Stage_Sbor = 11 ;
edrk . SborFinishOk = 1 ;
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// allow_discharge = 1;
}
if ( edrk . Sbor_Mode > t_finish & & ( edrk . SborFinishOk ) )
{
edrk . time_wait_sbor = 0 ;
}
else
edrk . Sbor_Mode + + ;
}
///////////////////////////////////////////////
///////////////////////////////////////////////
///////////////////////////////////////////////
# define TIME_WAIT_RELE_UMP_ON 20 //2 sec
# define TIME_WAIT_RELE_UMP_OFF 20 //2 sec
# define TIME_WAIT_ANSWER_UMP_ON 150 //15 sec
# define TIME_WAIT_ANSWER_UMP_OFF 40 //4 sec
///////////////////////////////////////////////
int ump_on_off ( unsigned int flag )
{
static unsigned int time_wait_rele_on_ump = 0 ;
static unsigned int time_wait_rele_off_ump = 0 ;
static unsigned int time_wait_answer_on_ump = 0 ;
static unsigned int time_wait_answer_off_ump = 0 ;
int cmd_ump = 0 ; //,cmd_p2=0;
static int UMP_Ok = 0 ;
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static int prev_error = 0 ;
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cmd_ump = 0 ;
// cmd_p2 = 0;
if ( flag = = 1 & & edrk . summ_errors = = 0 )
{
cmd_ump = 1 ;
}
else
{
cmd_ump = 0 ;
}
edrk . cmd_to_ump = cmd_ump ;
if ( cmd_ump )
{
// if ((pause_detect_error(&time_wait_rele_on_qtv,TIME_WAIT_RELE_UMP_ON,1)==0) && edrk.from_shema.bits.UMP_ON_OFF==0)
// {
// edrk.to_shema.bits.QTV_ON_OFF = 1;
// }
// else
edrk . to_shema . bits . UMP_ON_OFF = 1 ;
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if ( pause_detect_error ( & time_wait_answer_on_ump , TIME_WAIT_ANSWER_UMP_ON , 1 ) = = 0 )
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{
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if ( edrk . from_shema . bits . UMP_ON_OFF = = 1 )
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UMP_Ok = 1 ;
}
else
{
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if ( edrk . from_shema . bits . UMP_ON_OFF = = 0 )
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{
edrk . errors . e7 . bits . UMP_NOT_ANSWER | = 1 ;
UMP_Ok = 0 ;
}
}
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time_wait_rele_off_ump = 0 ;
time_wait_answer_off_ump = 0 ;
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}
else
{
UMP_Ok = 0 ;
time_wait_rele_on_ump = 0 ;
time_wait_answer_on_ump = 0 ;
edrk . to_shema . bits . UMP_ON_OFF = 0 ;
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if ( pause_detect_error ( & time_wait_answer_off_ump , TIME_WAIT_ANSWER_UMP_OFF , 1 ) = = 0 )
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{
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}
else
{
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if ( edrk . from_shema . bits . UMP_ON_OFF = = 1 )
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edrk . errors . e7 . bits . UMP_NOT_ANSWER | = 1 ;
}
if ( prev_error ! = edrk . summ_errors & & edrk . summ_errors )
{
if ( pause_detect_error ( & time_wait_rele_off_ump , TIME_WAIT_RELE_UMP_OFF , 1 ) = = 1 )
time_wait_rele_off_ump = 0 ;
}
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}
prev_error = edrk . summ_errors ;
return ( UMP_Ok ) ;
}
///////////////////////////////////////////////
///////////////////////////////////////////////
///////////////////////////////////////////////
# define TIME_WAIT_RELE_RASCEPITEL_ON 10 //2 sec
# define TIME_WAIT_RELE_RASCEPITEL_OFF 10 //2 sec
# define TIME_WAIT_ANSWER_RASCEPITEL_ON 100 //15 sec
# define TIME_WAIT_ANSWER_RASCEPITEL_ON_BS1 100 //15 sec
# define TIME_WAIT_ANSWER_RASCEPITEL_ON_BS2 150 //15 sec
# define TIME_WAIT_ANSWER_RASCEPITEL_OFF 100 //15 sec
# define TIME_WAIT_LEVEL_RASCEPITEL_ON_OFF 50 //5 sec
# define TIME_WAIT_LEVEL_RASCEPITEL_ON_OFF_BS1 50 //5 sec
# define TIME_WAIT_LEVEL_RASCEPITEL_ON_OFF_BS2 100 //7.5 sec
# define TIME_WAIT_PEREHOD_SOST_ON_OFF 100 //15 sec
///////////////////////////////////////////////
void rascepitel_on_off ( unsigned int flag , int * status_perehod , int * status_on_off , int * final_status_on_off )
{
static unsigned int time_wait_rele_on = 0 ;
static unsigned int time_wait_rele_off = 0 ;
static unsigned int time_wait_answer_on = 0 ;
static unsigned int time_wait_answer_off = 0 ;
static unsigned int time_wait_level_on = 0 ;
static unsigned int time_wait_level_off = 0 ;
static unsigned int time_wait_perehod_sost = 0 ;
int cmd_rele = 0 , r ; //,cmd_p2=0;
static int Rele_Ok = 0 , filter_sost_rascepitel = 0 ;
static int prev_error = 0 , perehod_sost = 0 , flag_wait_break_perehod_sost = 0 , prev_cmd_rele = 0 ;
cmd_rele = 0 ;
// cmd_p2 = 0;
if ( flag = = 1 & & edrk . errors . e6 . bits . RASCEPITEL_ERROR_NOT_ANSWER = = 0 )
{
cmd_rele = 1 ;
}
else
{
cmd_rele = 0 ;
}
edrk . cmd_to_rascepitel = cmd_rele ;
if ( cmd_rele )
{
if ( perehod_sost & & cmd_rele ! = prev_cmd_rele & & flag_wait_break_perehod_sost = = 0 )
{
flag_wait_break_perehod_sost = 1 ;
time_wait_perehod_sost = 0 ;
}
edrk . to_ing . bits . RASCEPITEL_OFF = 0 ;
if ( flag_wait_break_perehod_sost )
{
if ( pause_detect_error ( & time_wait_perehod_sost , TIME_WAIT_PEREHOD_SOST_ON_OFF , 1 ) = = 1 )
flag_wait_break_perehod_sost = 0 ;
}
if ( flag_wait_break_perehod_sost = = 0 )
{
if ( ( pause_detect_error ( & time_wait_rele_on , TIME_WAIT_RELE_RASCEPITEL_ON , 1 ) = = 0 ) /* && edrk.from_ing1.bits.RASCEPITEL_ON==0*/ )
{
perehod_sost = 1 ;
edrk . to_ing . bits . RASCEPITEL_ON = 1 ;
}
else
edrk . to_ing . bits . RASCEPITEL_ON = 0 ;
if ( edrk . flag_second_PCH = = 0 )
r = pause_detect_error ( & time_wait_answer_on , TIME_WAIT_ANSWER_RASCEPITEL_ON_BS1 , 1 ) ;
else
if ( edrk . flag_second_PCH = = 1 )
r = pause_detect_error ( & time_wait_answer_on , TIME_WAIT_ANSWER_RASCEPITEL_ON_BS2 , 1 ) ;
else
r = 0 ;
if ( r = = 0 )
{
}
else
{
if ( edrk . from_ing1 . bits . RASCEPITEL_ON = = 1 )
Rele_Ok = 1 ;
# if(RASCEPITEL_MANUAL_ALWAYS_ON==1)
Rele_Ok = 1 ;
# else
if ( edrk . from_ing1 . bits . RASCEPITEL_ON = = 0 )
{
edrk . errors . e6 . bits . RASCEPITEL_ERROR_NOT_ANSWER | = 1 ;
Rele_Ok = 0 ;
}
# endif
perehod_sost = 0 ;
}
time_wait_rele_off = 0 ;
time_wait_answer_off = 0 ;
}
}
else
{
Rele_Ok = 0 ;
time_wait_rele_on = 0 ;
time_wait_answer_on = 0 ;
if ( perehod_sost & & cmd_rele ! = prev_cmd_rele & & flag_wait_break_perehod_sost = = 0 )
{
flag_wait_break_perehod_sost = 1 ;
time_wait_perehod_sost = 0 ;
}
edrk . to_ing . bits . RASCEPITEL_ON = 0 ;
if ( flag_wait_break_perehod_sost )
{
if ( pause_detect_error ( & time_wait_perehod_sost , TIME_WAIT_PEREHOD_SOST_ON_OFF , 1 ) = = 1 )
flag_wait_break_perehod_sost = 0 ;
}
if ( flag_wait_break_perehod_sost = = 0 )
{
if ( pause_detect_error ( & time_wait_rele_off , TIME_WAIT_RELE_RASCEPITEL_OFF , 1 ) = = 0 /* && edrk.from_ing1.bits.RASCEPITEL_ON==1*/ )
{
edrk . to_ing . bits . RASCEPITEL_OFF = 1 ;
perehod_sost = 1 ;
}
else
edrk . to_ing . bits . RASCEPITEL_OFF = 0 ;
if ( pause_detect_error ( & time_wait_answer_off , TIME_WAIT_ANSWER_RASCEPITEL_OFF , 1 ) = = 0 )
{
}
else
{
# if(RASCEPITEL_MANUAL_ALWAYS_ON==1)
# else
if ( edrk . from_ing1 . bits . RASCEPITEL_ON = = 1 )
edrk . errors . e6 . bits . RASCEPITEL_ERROR_NOT_ANSWER | = 1 ;
# endif
perehod_sost = 0 ;
}
}
// if (prev_error!=edrk.summ_errors && edrk.summ_errors)
// {
// if (pause_detect_error(&time_wait_rele_off,TIME_WAIT_RELE_RASCEPITEL_OFF,1)==1)
// time_wait_rele_off = 0;
// }
}
if ( edrk . from_ing1 . bits . RASCEPITEL_ON = = 1 )
{
time_wait_level_off = 0 ;
if ( edrk . flag_second_PCH = = 0 )
{
if ( pause_detect_error ( & time_wait_level_on , TIME_WAIT_LEVEL_RASCEPITEL_ON_OFF_BS1 , 1 ) = = 1 )
filter_sost_rascepitel = 1 ;
}
else
{
if ( pause_detect_error ( & time_wait_level_on , TIME_WAIT_LEVEL_RASCEPITEL_ON_OFF_BS2 , 1 ) = = 1 )
filter_sost_rascepitel = 1 ;
}
}
else
{
time_wait_level_on = 0 ;
if ( pause_detect_error ( & time_wait_level_off , TIME_WAIT_LEVEL_RASCEPITEL_ON_OFF , 1 ) = = 1 )
filter_sost_rascepitel = 0 ;
}
prev_error = edrk . summ_errors ;
prev_cmd_rele = cmd_rele ;
* status_perehod = perehod_sost ;
if ( filter_sost_rascepitel & & perehod_sost = = 0 )
* final_status_on_off = 1 ;
// *status_on_off = 1;
if ( filter_sost_rascepitel = = 0 & & perehod_sost = = 0 )
* final_status_on_off = 0 ;
* status_on_off = filter_sost_rascepitel ;
// if (perehod_sost==1)
// *status_on_off = 2;
return ;
}
///////////////////////////////////////////////
unsigned int sbor_shema ( int mode )
{
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// static unsigned int time_wait_sbor = 0;
static unsigned int time_wait_razbor = 0 ;
static unsigned int allow_discharge = 0 , may_be_discharge = 0 ;
int enable_sbor ;
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static unsigned int t1 , t2 , delta_t ;
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// static int Run_Pred_Zaryad;
enable_sbor = ( edrk . zadanie . ZadanieU_Charge > 10 ) & & edrk . Status_Ready . bits . ready1 ;
if ( mode & & edrk . summ_errors = = 0 & & enable_sbor = = 0 )
{
edrk . errors . e7 . bits . ERROR_SBOR_SHEMA | = 1 ;
edrk . errors . e11 . bits . ERROR_DISABLE_SBOR | = 1 ;
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
edrk . AutoStartPump = 0 ;
edrk . Sbor_Mode = 0 ;
edrk . Razbor_Mode = 0 ;
edrk . time_wait_sbor = 0 ;
time_wait_razbor = 0 ;
edrk . Run_Pred_Zaryad = 0 ;
edrk . Zaryad_OK = 0 ;
edrk . Run_QTV = 0 ;
edrk . Run_UMP = 0 ;
edrk . SborFinishOk = 0 ;
edrk . RunZahvatRascepitel = 0 ;
// edrk.Run_Rascepitel = 0;
edrk . Status_Sbor = 1 ;
return ( edrk . Sbor_Mode ) ;
}
// <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD>
if ( mode & & edrk . summ_errors = = 0 & & enable_sbor )
{
if ( pause_detect_error ( & edrk . time_wait_sbor , TIME_WAIT_SBOR , 1 ) )
{
// if (edrk.SborFinishOk==0)
edrk . errors . e7 . bits . ERROR_SBOR_SHEMA | = 1 ;
edrk . errors . e11 . bits . ERROR_VERY_LONG_SBOR | = 1 ;
}
// <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
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t1 = 50 ;
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delta_t = 300 ; //200;
t2 = t1 + delta_t ;
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sbor_shema_pusk_nasos ( t1 , t2 ) ; //250
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t1 = t2 ;
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delta_t = 700 ;
t2 = t1 + delta_t ;
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sbor_shema_pusk_zaryad ( t1 , t2 ) ; //950
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t1 = t2 ;
delta_t = 350 ; //200
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t2 = t1 + delta_t ;
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sbor_shema_pusk_ump ( t1 , t2 ) ; //1150
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t1 = t2 + 30 ; // <20> <> <EFBFBD> <EFBFBD> 3 <20> <> <EFBFBD> <20> <> <EFBFBD>
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delta_t = 200 ;
t2 = t1 + delta_t ;
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sbor_shema_pusk_qtv ( t1 , t2 ) ; //1350
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t1 = t2 ;
delta_t = 150 ;
t2 = t1 + delta_t ;
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sbor_shema_stop_ump ( t1 , t2 ) ; //1500
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// <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> tfinish
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <20> <> tstart <20> <> tfinish <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> !
t1 = t2 ;
delta_t = 250 ;
t2 = t1 + delta_t ;
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sbor_shema_rascepitel_level_1 ( t1 , t2 ) ; //1750
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// <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> tfinish
// <20> <> <EFBFBD> <20> <> tfinish <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
t1 = t2 ;
delta_t = 300 ;
t2 = t1 + delta_t ;
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sbor_shema_rascepitel_level_2 ( t1 , t2 ) ; //2050
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t1 = t2 ;
delta_t = 200 ;
t2 = t1 + delta_t ;
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sbor_shema_rascepitel_level_3 ( t1 , t2 ) ; //2250
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// <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> tfinish
t1 = t2 ;
delta_t = 300 ;
t2 = t1 + delta_t ;
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sbor_shema_rascepitel_level_4 ( t1 , t2 ) ; //2550
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// <20> <> <EFBFBD> <EFBFBD> <20> <> tfinish <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <>
// <20> <> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
t1 = t2 ;
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delta_t = 300 ;
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t2 = t1 + delta_t ;
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sbor_shema_wait_ready_another ( t1 , t2 ) ; //2850
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t1 = t2 ;
delta_t = 50 ;
t2 = t1 + delta_t ;
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sbor_shema_wait_finish ( t1 , t2 ) ; //2950
// if (edrk.Sbor_Mode == 0)
// {
// if (control_station.active_array_cmd[CONTROL_STATION_CMD_DISABLE_ON_PUMP]==0)
// edrk.AutoStartPump = 1;
// }
//
// // <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// if (edrk.Sbor_Mode>50 && edrk.Sbor_Mode<250)
// {
// if (edrk.StatusPumpFanAll )
// {
// edrk.Sbor_Mode = 250;
// }
//
// // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// if (edrk.Sbor_Mode>200 && edrk.StatusPumpFanAll==0)
// {
// edrk.errors.e7.bits.ERROR_SBOR_SHEMA |= 1;
// edrk.Status_Sbor = 2;
// edrk.AutoStartPump = 0;
// }
//
//
// }
//
// /////////////////////////////////////
// // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// if (edrk.Sbor_Mode == 250)
// {
// if (control_station.active_array_cmd[CONTROL_STATION_CMD_ENABLE_ON_CHARGE]==1)
// edrk.Run_Pred_Zaryad = 1; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> !
// }
////
// if (edrk.Sbor_Mode>=250 && edrk.StatusPumpFanAll==0 && edrk.SumStartPump)
// {
// edrk.errors.e7.bits.ERROR_SBOR_SHEMA |= 1;
// edrk.Status_Sbor = 3;
//
// }
// // <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// // <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
//
// if (edrk.Sbor_Mode>250 && edrk.Sbor_Mode<900 && (edrk.Status_Charge || (control_station.active_array_cmd[CONTROL_STATION_CMD_ENABLE_ON_CHARGE]==0))
// && edrk.from_ing1.bits.ZARYAD_ON==0 && edrk.StatusPumpFanAll)
// {
// edrk.Zaryad_OK = 1;
// edrk.Run_Pred_Zaryad = 0;
//
// edrk.Sbor_Mode = 900;
// }
//
//
// if (edrk.Sbor_Mode>850 && edrk.Zaryad_OK == 0)
// {
// edrk.Run_Pred_Zaryad = 0;
// edrk.errors.e7.bits.ERROR_SBOR_SHEMA |= 1;
// edrk.Status_Sbor = 4;
// }
//
//// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> UMP
// if (edrk.Sbor_Mode==950 && edrk.Zaryad_OK == 1)
// {
// edrk.Run_UMP = 1;
// }
//
// if (edrk.Sbor_Mode>950 && edrk.Sbor_Mode>1250 && (edrk.Zaryad_OK == 1 && edrk.Status_UMP_Ok==1))
// {
// edrk.Sbor_Mode=1250;
// }
//
//
// if (edrk.Sbor_Mode>1300 && (edrk.Zaryad_OK == 0 || edrk.Status_UMP_Ok==0))
// {
// edrk.Run_UMP = 0;
// edrk.Run_Pred_Zaryad = 0;
// edrk.errors.e7.bits.ERROR_SBOR_SHEMA |= 1;
// edrk.errors.e7.bits.UMP_NOT_ANSWER |= 1;
// edrk.Run_QTV = 0;
// edrk.Status_Sbor = 9;
// }
////////////////
//
//
// if (edrk.Sbor_Mode==950 && edrk.Zaryad_OK == 1)
// {
//// if ()
// edrk.Run_QTV = 1;
// }
//
//
// if (edrk.Sbor_Mode>960 && edrk.Sbor_Mode<1110 && (edrk.Zaryad_OK == 1 && edrk.Status_QTV_Ok==1 ) )
// {
// edrk.Sbor_Mode = 1110;
// }
//
// if (edrk.Sbor_Mode>1100 && (edrk.Zaryad_OK == 0 || edrk.Status_QTV_Ok==0 ))
// {
// edrk.errors.e7.bits.ERROR_SBOR_SHEMA |= 1;
// edrk.Run_QTV = 0;
// edrk.Status_Sbor = 5;
// }
// if (edrk.Sbor_Mode==1110 && edrk.Sbor_Mode<1250 && (edrk.Zaryad_OK == 1 && edrk.Status_QTV_Ok==1 ) && edrk.Status_Rascepitel_Ok==0)
// {
// // <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// if (optical_read_data.data.cmd.bit.ready_cmd != CODE_READY_CMD_READY2 )
// {
// edrk.Run_Rascepitel = 1;
// edrk.Sbor_Mode = 1250; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// }
// else
// edrk.RunZahvatRascepitel = 1; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// }
////
// if (edrk.Sbor_Mode>1120 && edrk.Sbor_Mode<1250 && (edrk.Zaryad_OK == 1 && edrk.Status_QTV_Ok==1 )
// && edrk.RunZahvatRascepitel && edrk.Status_Rascepitel_Ok==0 && edrk.Run_Rascepitel==0)
// {
// // <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD>
// if (optical_read_data.data.cmd.bit.rascepitel_cmd == CODE_RASCEPITEL_CMD_ENABLE_ON_AND_THIS_ON ) // 01 - <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// {
// edrk.Run_Rascepitel = 1;
// edrk.Sbor_Mode = 1250; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
//
// }
// }
// if (edrk.Sbor_Mode>1250 && edrk.Sbor_Mode<1350 && (edrk.Zaryad_OK == 1 && edrk.Status_QTV_Ok==1 )
// && edrk.Status_Rascepitel_Ok==1 && edrk.Run_Rascepitel==1)
// {
// // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// edrk.Sbor_Mode = 1350; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// }
//
////
// // <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> edrk.RunZahvatRascepitel <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// if (edrk.Sbor_Mode>1320 && (edrk.Zaryad_OK == 1 && edrk.Status_QTV_Ok==1 )
// && edrk.RunZahvatRascepitel && edrk.Status_Rascepitel_Ok==0 && edrk.Run_Rascepitel==0)
// {
// //
//// if (optical_read_data.data.cmd.bit.rascepitel_cmd != CODE_RASCEPITEL_CMD_ENABLE_ON_AND_THIS_ON ) // 01 - <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// {
// // <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// edrk.errors.e7.bits.ERROR_SBOR_SHEMA |= 1;
// edrk.Run_QTV = 0;
// edrk.Status_Sbor = 7;
// edrk.errors.e1.bits.NO_CONFIRM_ON_RASCEPITEL |= 1;
// edrk.RunZahvatRascepitel = 0;
//// edrk.Run_Rascepitel = 0;
// }
// }
// // <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// if (edrk.Sbor_Mode>1350 && edrk.Sbor_Mode<1490 && (edrk.Zaryad_OK == 1 && edrk.Status_QTV_Ok==1 ) && edrk.Status_Rascepitel_Ok==1)
// {
// // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> !
// // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD>
// edrk.Sbor_Mode = 1490; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// edrk.RunZahvatRascepitel = 0;
//
//// edrk.Run_Rascepitel = 1;
// }
//
//
//
//
//
// if (edrk.Sbor_Mode>=1490 && (edrk.Zaryad_OK == 0 || edrk.Status_QTV_Ok==0 || edrk.Status_Rascepitel_Ok==0))
// {
// edrk.errors.e7.bits.ERROR_SBOR_SHEMA |= 1;
// edrk.Run_QTV = 0;
//// edrk.Run_Rascepitel = 0;
// edrk.RunZahvatRascepitel = 0;
// edrk.Status_Sbor = 6;
// }
//
// if (edrk.Sbor_Mode>1550 && edrk.Sbor_Mode<2000 && (edrk.Zaryad_OK == 1 && edrk.Status_QTV_Ok==1 && edrk.Status_Rascepitel_Ok))
// {
// if (optical_read_data.data.cmd.bit.ready_cmd==CODE_READY_CMD_READY1TO2) // <20> <> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD>
// {
// // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <>
// // <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> .
// if (optical_read_data.data.cmd.bit.rascepitel_cmd == CODE_RASCEPITEL_CMD_ENABLE_ON_AND_THIS_ON)
// edrk.Sbor_Mode = 2150; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
//
// }
// else
// {
// edrk.Sbor_Mode = 2150; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
//
// }
//
// }
//
// if (edrk.Sbor_Mode>2100 && edrk.Sbor_Mode<2150 && (edrk.Zaryad_OK == 1 && edrk.Status_QTV_Ok==1 && edrk.Status_Rascepitel_Ok))
// {
// if (optical_read_data.data.cmd.bit.ready_cmd==CODE_READY_CMD_READY1TO2) // <20> <> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> , <20> <> <20> <> <EFBFBD> -<2D> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> !
// {
// edrk.errors.e7.bits.ERROR_SBOR_SHEMA |= 1;
// edrk.errors.e1.bits.ANOTHER_BS_VERY_LONG_WAIT |= 1;
// edrk.Run_QTV = 0;
// // edrk.Run_Rascepitel = 0;
// edrk.RunZahvatRascepitel = 0;
// edrk.Status_Sbor = 8;
// }
// else
// {
// edrk.Sbor_Mode = 2150; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
//
// }
//
//
// }
//
//
// if (edrk.Sbor_Mode>2150 && (edrk.Zaryad_OK == 1 && edrk.Status_QTV_Ok==1 && edrk.Status_Rascepitel_Ok))
// {
// edrk.SborFinishOk = 1;
// // allow_discharge = 1;
// }
//
//
// if (edrk.Sbor_Mode>2200 && (edrk.SborFinishOk) )
// {
// time_wait_sbor = 0;
// }
// else
// edrk.Sbor_Mode++;
2024-12-27 10:50:32 +03:00
edrk . Razbor_Mode = 0 ;
edrk . RazborNotFinish = 0 ;
edrk . RunUnZahvatRascepitel = 0 ;
if ( edrk . Zaryad_OK )
may_be_discharge = 1 ;
}
/////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD>
/////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////
else
{
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD>
if ( edrk . Razbor_Mode = = 0 )
edrk . RazborNotFinish = 1 ;
if ( edrk . Status_QTV_Ok = = 0 & & edrk . Status_UMP_Ok = = 0 & & may_be_discharge & & edrk . Razbor_Mode > 100 )
{
allow_discharge = 1 ;
may_be_discharge = 0 ;
}
edrk . AutoStartPump = 0 ;
edrk . Sbor_Mode = 0 ;
edrk . time_wait_sbor = 0 ;
edrk . Zaryad_OK = 0 ;
edrk . Run_QTV = 0 ;
edrk . Run_UMP = 0 ;
edrk . SborFinishOk = 0 ;
edrk . Run_Pred_Zaryad = 0 ;
edrk . RunZahvatRascepitel = 0 ;
if ( edrk . Razbor_Mode = = 10 & & edrk . Status_QTV_Ok = = 1 )
{
//
edrk . errors . e2 . bits . ERROR_RAZBOR_SHEMA | = 1 ;
}
if ( edrk . Run_Rascepitel & & edrk . Razbor_Mode = = 20 & & edrk . Status_QTV_Ok = = 0 & & edrk . Status_Rascepitel_Ok = = 0 )
{
// <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <20> <> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> -<2D> <> , <20> <> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD>
edrk . Run_Rascepitel = 0 ;
edrk . Razbor_Mode = 1000 ; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
}
if ( edrk . Run_Rascepitel & & edrk . Razbor_Mode = = 30 & & edrk . Status_QTV_Ok = = 0 & & edrk . Status_Rascepitel_Ok = = 1 )
{
// <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
if ( optical_read_data . data . cmd . bit . ready_cmd ! = CODE_READY_CMD_READY2 )
edrk . Run_Rascepitel = 0 ;
else
edrk . RunUnZahvatRascepitel = 1 ; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
}
if ( edrk . Razbor_Mode > 40 & & edrk . Razbor_Mode < 390 & & ( edrk . Status_QTV_Ok = = 0 )
& & edrk . RunUnZahvatRascepitel & & edrk . Status_Rascepitel_Ok = = 1 )
{
// <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD>
if ( optical_read_data . data . cmd . bit . rascepitel_cmd = = CODE_RASCEPITEL_CMD_ENABLE_ON_AND_THIS_ON ) // 01 - <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
{
edrk . Run_Rascepitel = 0 ;
edrk . RunUnZahvatRascepitel = 0 ;
edrk . Razbor_Mode = 390 ;
}
}
// <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD>
if ( edrk . Razbor_Mode > 40 & & edrk . Razbor_Mode < 600 & & ( edrk . Status_QTV_Ok = = 0 )
& & edrk . RunUnZahvatRascepitel = = 0 & & edrk . Run_Rascepitel = = 0 )
{
if ( edrk . Status_Rascepitel_Ok = = 0 )
{
edrk . Razbor_Mode = 600 ;
}
}
if ( edrk . Razbor_Mode > 390 & & ( edrk . Status_QTV_Ok = = 0 )
& & edrk . RunUnZahvatRascepitel & & edrk . Status_Rascepitel_Ok = = 1 & & edrk . Run_Rascepitel )
{
if ( optical_read_data . data . cmd . bit . rascepitel_cmd ! = CODE_RASCEPITEL_CMD_ENABLE_ON_AND_THIS_ON ) // <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
{
edrk . RunUnZahvatRascepitel = 0 ;
edrk . errors . e1 . bits . NO_CONFIRM_ON_RASCEPITEL | = 1 ;
edrk . errors . e2 . bits . ERROR_RAZBOR_SHEMA | = 1 ;
}
}
//
// if (edrk.Razbor_Mode==400 && (edrk.Status_QTV_Ok==0)
// && edrk.RunUnZahvatRascepitel && edrk.Status_Rascepitel_Ok==1)
// {
// // <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD>
// if (optical_read_data.data.cmd.bit.rascepitel_cmd != CODE_RASCEPITEL_CMD_ENABLE_ON_AND_THIS_ON ) // 01 - <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
// {
//// edrk.Run_Rascepitel = 0;
// edrk.RunUnZahvatRascepitel = 0;
// edrk.errors.e1.bits.NO_CONFIRM_ON_RASCEPITEL |= 1;
// edrk.errors.e2.bits.ERROR_RAZBOR_SHEMA |= 1;
//
// }
// }
//
if ( edrk . Razbor_Mode = = 600 & & edrk . Status_QTV_Ok = = 0
& & edrk . Run_Rascepitel = = 0
& & edrk . Status_Rascepitel_Ok = = 1 )
{
# if(RASCEPITEL_MANUAL_ALWAYS_ON==1)
# else
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> !
if ( edrk . Run_Rascepitel_from_RS = = 0 ) // <20> <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> rs232?
{
edrk . errors . e6 . bits . RASCEPITEL_ERROR_NOT_ANSWER | = 1 ;
edrk . errors . e2 . bits . ERROR_RAZBOR_SHEMA | = 1 ;
}
# endif
}
# if(RASCEPITEL_MANUAL_ALWAYS_ON==1)
edrk . RazborNotFinish = 0 ;
edrk . RunUnZahvatRascepitel = 0 ;
edrk . Razbor_Mode = 650 ; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
# else
// <20> <> <EFBFBD> <20> <> , <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
if ( edrk . Run_Rascepitel = = 0 & & edrk . Razbor_Mode > 20 & & edrk . Status_QTV_Ok = = 0 & & ( edrk . Status_Rascepitel_Ok = = 0 | | edrk . Run_Rascepitel_from_RS = = 1 ) )
{
edrk . RazborNotFinish = 0 ;
edrk . RunUnZahvatRascepitel = 0 ;
edrk . Razbor_Mode = 650 ; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
}
# endif
// edrk.Run_Rascepitel = 0;
if ( edrk . Razbor_Mode > 650 )
{
time_wait_razbor = 0 ;
}
else
edrk . Razbor_Mode + + ;
}
if ( edrk . errors . e7 . bits . ERROR_SBOR_SHEMA )
{
// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
edrk . AutoStartPump = 0 ;
edrk . Sbor_Mode = 0 ;
edrk . Run_Pred_Zaryad = 0 ;
edrk . time_wait_sbor = 0 ;
edrk . Zaryad_OK = 0 ;
edrk . Run_QTV = 0 ;
edrk . Run_UMP = 0 ;
edrk . SborFinishOk = 0 ;
edrk . RunZahvatRascepitel = 0 ;
// edrk.Run_Rascepitel = 0; // <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> , <20> <> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <20> <> <EFBFBD> <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ????
}
//////////////////////////////////////
//////////////////////////////////////
edrk . Status_Charge = zaryad_on_off ( edrk . Run_Pred_Zaryad ) ;
2025-01-15 13:39:33 +03:00
if ( control_station . active_array_cmd [ CONTROL_STATION_CMD_DISABLE_ON_UMP ] = = 1 )
2024-12-27 10:50:32 +03:00
{
edrk . Status_UMP_Ok = edrk . Run_UMP ;
edrk . Zaryad_UMP_Ok = 1 ;
edrk . to_shema . bits . UMP_ON_OFF = 0 ;
}
else
{
edrk . Status_UMP_Ok = ump_on_off ( edrk . Run_UMP ) ;
edrk . Zaryad_UMP_Ok = detect_zaryad_ump ( ) ;
}
2025-01-15 13:39:33 +03:00
if ( control_station . active_array_cmd [ CONTROL_STATION_CMD_DISABLE_ON_QTV ] = = 1 )
2024-12-27 10:50:32 +03:00
{
edrk . Status_QTV_Ok = edrk . Run_QTV ;
edrk . to_shema . bits . QTV_ON_OFF = 0 ;
edrk . to_shema . bits . QTV_ON = 0 ;
}
else
edrk . Status_QTV_Ok = qtv_on_off ( edrk . Run_QTV ) ;
rascepitel_on_off ( edrk . Run_Rascepitel | | edrk . Run_Rascepitel_from_RS ,
& edrk . Status_Perehod_Rascepitel ,
& edrk . Status_Rascepitel_Ok ,
& edrk . Final_Status_Rascepitel
) ;
//////////////////////////////////////
//////////////////////////////////////
//////////////////////////////////////
//////////////////////////////////////
if ( control_station . active_array_cmd [ CONTROL_STATION_CMD_MANUAL_DISCHARGE ] = = 1 & & edrk . SborFinishOk = = 0 )
edrk . ManualDischarge = 1 ;
else
edrk . ManualDischarge = 0 ;
if ( allow_discharge & & edrk . SborFinishOk = = 0 )
{
edrk . Discharge = 1 ;
allow_discharge = 0 ;
}
if ( edrk . Zaryad_OK = = 1 & & edrk . Status_QTV_Ok = = 1 & & edrk . Status_Rascepitel_Ok )
edrk . Status_Ready . bits . ready7 = 1 ;
else
edrk . Status_Ready . bits . ready7 = 0 ;
// if (edrk.StatusPumpFanAll)
// edrk.Status_Ready.bits.ready1 = 1;
// else
// edrk.Status_Ready.bits.ready1 = 0;
if ( edrk . Run_Pred_Zaryad )
edrk . Status_Ready . bits . ready2 = 1 ;
else
edrk . Status_Ready . bits . ready2 = 0 ;
if ( edrk . Zaryad_OK )
edrk . Status_Ready . bits . ready3 = 1 ;
else
edrk . Status_Ready . bits . ready3 = 0 ;
if ( edrk . Status_QTV_Ok )
edrk . Status_Ready . bits . ready4 = 1 ;
else
edrk . Status_Ready . bits . ready4 = 0 ;
if ( edrk . SborFinishOk | | edrk . Status_Ready . bits . ImitationReady2 = = 1 )
edrk . Status_Ready . bits . ready5 = 1 ;
else
edrk . Status_Ready . bits . ready5 = 0 ;
if ( edrk . ms . ready3 | | edrk . ms . another_bs_maybe_on = = 0 )
edrk . Status_Ready . bits . ready6 = 1 ;
else
edrk . Status_Ready . bits . ready6 = 0 ;
if ( edrk . Status_Ready . bits . ready5 = = 1 & & edrk . Status_Ready . bits . ready6 = = 1 & & edrk . Status_Ready . bits . MasterSlaveActive )
edrk . Status_Ready . bits . ready_final = 1 ;
else
edrk . Status_Ready . bits . ready_final = 0 ;
return ( edrk . Sbor_Mode ) ;
}