Добавлены библиотеки adc, modbus (его надо проверить)
В библиотеке adc пока только сделана заготовка для считывания выброса, надо доделать: Пока в main крутиться тест: формирование импульса ножкой светодиодом и считыание АЦП. Считывается этот импульс и определяется его пик (максимальное значение) и в районе этого пика беруться значения для расчета его амплитуды Modbus добавлен но не проверен
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/**
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******************************************************************************
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* @file stm32f1xx_hal_uart.h
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* @author MCD Application Team
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* @brief Header file of UART HAL module.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F1xx_HAL_UART_H
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#define __STM32F1xx_HAL_UART_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f1xx_hal_def.h"
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/** @addtogroup STM32F1xx_HAL_Driver
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* @{
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*/
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/** @addtogroup UART
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup UART_Exported_Types UART Exported Types
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* @{
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*/
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/**
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* @brief UART Init Structure definition
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*/
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typedef struct
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{
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uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
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The baud rate is computed using the following formula:
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- IntegerDivider = ((PCLKx) / (16 * (huart->Init.BaudRate)))
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- FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 16) + 0.5 */
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uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
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This parameter can be a value of @ref UART_Word_Length */
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uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
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This parameter can be a value of @ref UART_Stop_Bits */
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uint32_t Parity; /*!< Specifies the parity mode.
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This parameter can be a value of @ref UART_Parity
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@note When parity is enabled, the computed parity is inserted
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at the MSB position of the transmitted data (9th bit when
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the word length is set to 9 data bits; 8th bit when the
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word length is set to 8 data bits). */
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uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
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This parameter can be a value of @ref UART_Mode */
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uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
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This parameter can be a value of @ref UART_Hardware_Flow_Control */
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uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
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This parameter can be a value of @ref UART_Over_Sampling. This feature is only available
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on STM32F100xx family, so OverSampling parameter should always be set to 16. */
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} UART_InitTypeDef;
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/**
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* @brief HAL UART State structures definition
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* @note HAL UART State value is a combination of 2 different substates: gState and RxState.
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* - gState contains UART state information related to global Handle management
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* and also information related to Tx operations.
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* gState value coding follow below described bitmap :
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* b7-b6 Error information
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* 00 : No Error
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* 01 : (Not Used)
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* 10 : Timeout
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* 11 : Error
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* b5 Peripheral initialization status
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* 0 : Reset (Peripheral not initialized)
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* 1 : Init done (Peripheral initialized. HAL UART Init function already called)
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* b4-b3 (not used)
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* xx : Should be set to 00
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* b2 Intrinsic process state
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* 0 : Ready
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* 1 : Busy (Peripheral busy with some configuration or internal operations)
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* b1 (not used)
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* x : Should be set to 0
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* b0 Tx state
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* 0 : Ready (no Tx operation ongoing)
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* 1 : Busy (Tx operation ongoing)
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* - RxState contains information related to Rx operations.
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* RxState value coding follow below described bitmap :
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* b7-b6 (not used)
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* xx : Should be set to 00
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* b5 Peripheral initialization status
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* 0 : Reset (Peripheral not initialized)
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* 1 : Init done (Peripheral initialized)
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* b4-b2 (not used)
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* xxx : Should be set to 000
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* b1 Rx state
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* 0 : Ready (no Rx operation ongoing)
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* 1 : Busy (Rx operation ongoing)
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* b0 (not used)
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* x : Should be set to 0.
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*/
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typedef enum
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{
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HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized
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Value is allowed for gState and RxState */
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HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
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Value is allowed for gState and RxState */
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HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
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Value is allowed for gState only */
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HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
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Value is allowed for gState only */
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HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
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Value is allowed for RxState only */
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HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
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Not to be used for neither gState nor RxState.
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Value is result of combination (Or) between gState and RxState values */
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HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
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Value is allowed for gState only */
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HAL_UART_STATE_ERROR = 0xE0U /*!< Error
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Value is allowed for gState only */
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} HAL_UART_StateTypeDef;
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/**
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* @brief HAL UART Reception type definition
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* @note HAL UART Reception type value aims to identify which type of Reception is ongoing.
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* This parameter can be a value of @ref UART_Reception_Type_Values :
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* HAL_UART_RECEPTION_STANDARD = 0x00U,
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* HAL_UART_RECEPTION_TOIDLE = 0x01U,
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*/
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typedef uint32_t HAL_UART_RxTypeTypeDef;
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/**
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* @brief HAL UART Rx Event type definition
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* @note HAL UART Rx Event type value aims to identify which type of Event has occurred
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* leading to call of the RxEvent callback.
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* This parameter can be a value of @ref UART_RxEvent_Type_Values :
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* HAL_UART_RXEVENT_TC = 0x00U,
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* HAL_UART_RXEVENT_HT = 0x01U,
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* HAL_UART_RXEVENT_IDLE = 0x02U,
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*/
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typedef uint32_t HAL_UART_RxEventTypeTypeDef;
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/**
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* @brief UART handle Structure definition
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*/
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typedef struct __UART_HandleTypeDef
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{
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USART_TypeDef *Instance; /*!< UART registers base address */
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UART_InitTypeDef Init; /*!< UART communication parameters */
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const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
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uint16_t TxXferSize; /*!< UART Tx Transfer size */
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__IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
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uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
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uint16_t RxXferSize; /*!< UART Rx Transfer size */
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__IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
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__IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */
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__IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */
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DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
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DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
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HAL_LockTypeDef Lock; /*!< Locking object */
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__IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
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and also related to Tx operations.
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This parameter can be a value of @ref HAL_UART_StateTypeDef */
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__IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
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This parameter can be a value of @ref HAL_UART_StateTypeDef */
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__IO uint32_t ErrorCode; /*!< UART Error code */
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#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
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void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */
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void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */
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void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */
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void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */
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void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */
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void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */
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void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */
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void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */
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void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */
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void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */
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void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */
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void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */
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#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
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} UART_HandleTypeDef;
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#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
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/**
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* @brief HAL UART Callback ID enumeration definition
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*/
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typedef enum
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{
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HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */
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HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */
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HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */
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HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */
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HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */
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HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */
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HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */
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HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */
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HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */
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HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */
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HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */
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} HAL_UART_CallbackIDTypeDef;
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/**
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* @brief HAL UART Callback pointer definition
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*/
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typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */
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typedef void (*pUART_RxEventCallbackTypeDef)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */
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#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup UART_Exported_Constants UART Exported Constants
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* @{
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*/
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/** @defgroup UART_Error_Code UART Error Code
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* @{
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*/
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#define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */
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#define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */
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#define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */
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#define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */
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#define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */
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#define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */
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#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
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#define HAL_UART_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid Callback error */
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#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
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/**
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* @}
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*/
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/** @defgroup UART_Word_Length UART Word Length
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* @{
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*/
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#define UART_WORDLENGTH_8B 0x00000000U
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#define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
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/**
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* @}
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*/
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/** @defgroup UART_Stop_Bits UART Number of Stop Bits
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* @{
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*/
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#define UART_STOPBITS_1 0x00000000U
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#define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
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/**
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* @}
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*/
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/** @defgroup UART_Parity UART Parity
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* @{
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*/
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#define UART_PARITY_NONE 0x00000000U
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#define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
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#define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
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/**
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* @}
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*/
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/** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
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* @{
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*/
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#define UART_HWCONTROL_NONE 0x00000000U
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#define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
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#define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
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#define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE))
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/**
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* @}
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*/
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/** @defgroup UART_Mode UART Transfer Mode
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* @{
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*/
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#define UART_MODE_RX ((uint32_t)USART_CR1_RE)
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#define UART_MODE_TX ((uint32_t)USART_CR1_TE)
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#define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE | USART_CR1_RE))
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/**
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* @}
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*/
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/** @defgroup UART_State UART State
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* @{
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*/
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#define UART_STATE_DISABLE 0x00000000U
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#define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
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/**
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* @}
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*/
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/** @defgroup UART_Over_Sampling UART Over Sampling
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* @{
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*/
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#define UART_OVERSAMPLING_16 0x00000000U
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#if defined(USART_CR1_OVER8)
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#define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
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#endif /* USART_CR1_OVER8 */
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/**
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* @}
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*/
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/** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length
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* @{
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*/
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#define UART_LINBREAKDETECTLENGTH_10B 0x00000000U
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#define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL)
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/**
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* @}
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*/
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/** @defgroup UART_WakeUp_functions UART Wakeup Functions
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* @{
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*/
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#define UART_WAKEUPMETHOD_IDLELINE 0x00000000U
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#define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE)
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/**
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* @}
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*/
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/** @defgroup UART_Flags UART FLags
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* Elements values convention: 0xXXXX
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* - 0xXXXX : Flag mask in the SR register
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* @{
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*/
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#define UART_FLAG_CTS ((uint32_t)USART_SR_CTS)
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#define UART_FLAG_LBD ((uint32_t)USART_SR_LBD)
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#define UART_FLAG_TXE ((uint32_t)USART_SR_TXE)
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#define UART_FLAG_TC ((uint32_t)USART_SR_TC)
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#define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE)
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#define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE)
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#define UART_FLAG_ORE ((uint32_t)USART_SR_ORE)
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#define UART_FLAG_NE ((uint32_t)USART_SR_NE)
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#define UART_FLAG_FE ((uint32_t)USART_SR_FE)
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#define UART_FLAG_PE ((uint32_t)USART_SR_PE)
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/**
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* @}
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*/
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/** @defgroup UART_Interrupt_definition UART Interrupt Definitions
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* Elements values convention: 0xY000XXXX
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* - XXXX : Interrupt mask (16 bits) in the Y register
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* - Y : Interrupt source register (2bits)
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* - 0001: CR1 register
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* - 0010: CR2 register
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* - 0011: CR3 register
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* @{
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*/
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#define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE))
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#define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE))
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#define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE))
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#define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE))
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#define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE))
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#define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE))
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#define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE))
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#define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE))
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/**
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* @}
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*/
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/** @defgroup UART_Reception_Type_Values UART Reception type values
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* @{
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*/
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#define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */
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#define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */
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/**
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* @}
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*/
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/** @defgroup UART_RxEvent_Type_Values UART RxEvent type values
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* @{
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*/
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#define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */
|
||||
#define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */
|
||||
#define HAL_UART_RXEVENT_IDLE (0x00000002U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/** @defgroup UART_Exported_Macros UART Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reset UART handle gstate & RxState
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->gState = HAL_UART_STATE_RESET; \
|
||||
(__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0U)
|
||||
#else
|
||||
#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->gState = HAL_UART_STATE_RESET; \
|
||||
(__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
|
||||
} while(0U)
|
||||
#endif /*USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
|
||||
/** @brief Flushes the UART DR register
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
*/
|
||||
#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
|
||||
|
||||
/** @brief Checks whether the specified UART flag is set or not.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @param __FLAG__ specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
|
||||
* @arg UART_FLAG_LBD: LIN Break detection flag
|
||||
* @arg UART_FLAG_TXE: Transmit data register empty flag
|
||||
* @arg UART_FLAG_TC: Transmission Complete flag
|
||||
* @arg UART_FLAG_RXNE: Receive data register not empty flag
|
||||
* @arg UART_FLAG_IDLE: Idle Line detection flag
|
||||
* @arg UART_FLAG_ORE: Overrun Error flag
|
||||
* @arg UART_FLAG_NE: Noise Error flag
|
||||
* @arg UART_FLAG_FE: Framing Error flag
|
||||
* @arg UART_FLAG_PE: Parity Error flag
|
||||
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
|
||||
|
||||
/** @brief Clears the specified UART pending flag.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @param __FLAG__ specifies the flag to check.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5).
|
||||
* @arg UART_FLAG_LBD: LIN Break detection flag.
|
||||
* @arg UART_FLAG_TC: Transmission Complete flag.
|
||||
* @arg UART_FLAG_RXNE: Receive data register not empty flag.
|
||||
*
|
||||
* @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun
|
||||
* error) and IDLE (Idle line detected) flags are cleared by software
|
||||
* sequence: a read operation to USART_SR register followed by a read
|
||||
* operation to USART_DR register.
|
||||
* @note RXNE flag can be also cleared by a read to the USART_DR register.
|
||||
* @note TC flag can be also cleared by software sequence: a read operation to
|
||||
* USART_SR register followed by a write operation to USART_DR register.
|
||||
* @note TXE flag is cleared only by a write to the USART_DR register.
|
||||
*
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
|
||||
|
||||
/** @brief Clears the UART PE pending flag.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \
|
||||
do{ \
|
||||
__IO uint32_t tmpreg = 0x00U; \
|
||||
tmpreg = (__HANDLE__)->Instance->SR; \
|
||||
tmpreg = (__HANDLE__)->Instance->DR; \
|
||||
UNUSED(tmpreg); \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Clears the UART FE pending flag.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
|
||||
|
||||
/** @brief Clears the UART NE pending flag.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
|
||||
|
||||
/** @brief Clears the UART ORE pending flag.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
|
||||
|
||||
/** @brief Clears the UART IDLE pending flag.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
|
||||
|
||||
/** @brief Enable the specified UART interrupt.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @param __INTERRUPT__ specifies the UART interrupt source to enable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_IT_CTS: CTS change interrupt
|
||||
* @arg UART_IT_LBD: LIN Break detection interrupt
|
||||
* @arg UART_IT_TXE: Transmit Data Register empty interrupt
|
||||
* @arg UART_IT_TC: Transmission complete interrupt
|
||||
* @arg UART_IT_RXNE: Receive Data register not empty interrupt
|
||||
* @arg UART_IT_IDLE: Idle line detection interrupt
|
||||
* @arg UART_IT_PE: Parity Error interrupt
|
||||
* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \
|
||||
(((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \
|
||||
((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK)))
|
||||
|
||||
/** @brief Disable the specified UART interrupt.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @param __INTERRUPT__ specifies the UART interrupt source to disable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_IT_CTS: CTS change interrupt
|
||||
* @arg UART_IT_LBD: LIN Break detection interrupt
|
||||
* @arg UART_IT_TXE: Transmit Data Register empty interrupt
|
||||
* @arg UART_IT_TC: Transmission complete interrupt
|
||||
* @arg UART_IT_RXNE: Receive Data register not empty interrupt
|
||||
* @arg UART_IT_IDLE: Idle line detection interrupt
|
||||
* @arg UART_IT_PE: Parity Error interrupt
|
||||
* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
|
||||
(((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
|
||||
((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK)))
|
||||
|
||||
/** @brief Checks whether the specified UART interrupt source is enabled or not.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @param __IT__ specifies the UART interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
|
||||
* @arg UART_IT_LBD: LIN Break detection interrupt
|
||||
* @arg UART_IT_TXE: Transmit Data Register empty interrupt
|
||||
* @arg UART_IT_TC: Transmission complete interrupt
|
||||
* @arg UART_IT_RXNE: Receive Data register not empty interrupt
|
||||
* @arg UART_IT_IDLE: Idle line detection interrupt
|
||||
* @arg UART_IT_ERR: Error interrupt
|
||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == UART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == UART_CR2_REG_INDEX)? \
|
||||
(__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK))
|
||||
|
||||
/** @brief Enable CTS flow control
|
||||
* @note This macro allows to enable CTS hardware flow control for a given UART instance,
|
||||
* without need to call HAL_UART_Init() function.
|
||||
* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
|
||||
* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
|
||||
* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
|
||||
* - UART instance should have already been initialised (through call of HAL_UART_Init() )
|
||||
* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
|
||||
* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* The Handle Instance can be any USARTx (supporting the HW Flow control feature).
|
||||
* It is used to select the USART peripheral (USART availability and x value depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
|
||||
do{ \
|
||||
ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
|
||||
(__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Disable CTS flow control
|
||||
* @note This macro allows to disable CTS hardware flow control for a given UART instance,
|
||||
* without need to call HAL_UART_Init() function.
|
||||
* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
|
||||
* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
|
||||
* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
|
||||
* - UART instance should have already been initialised (through call of HAL_UART_Init() )
|
||||
* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
|
||||
* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* The Handle Instance can be any USARTx (supporting the HW Flow control feature).
|
||||
* It is used to select the USART peripheral (USART availability and x value depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
|
||||
do{ \
|
||||
ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
|
||||
(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Enable RTS flow control
|
||||
* This macro allows to enable RTS hardware flow control for a given UART instance,
|
||||
* without need to call HAL_UART_Init() function.
|
||||
* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
|
||||
* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
|
||||
* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
|
||||
* - UART instance should have already been initialised (through call of HAL_UART_Init() )
|
||||
* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
|
||||
* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* The Handle Instance can be any USARTx (supporting the HW Flow control feature).
|
||||
* It is used to select the USART peripheral (USART availability and x value depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
|
||||
do{ \
|
||||
ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
|
||||
(__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Disable RTS flow control
|
||||
* This macro allows to disable RTS hardware flow control for a given UART instance,
|
||||
* without need to call HAL_UART_Init() function.
|
||||
* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
|
||||
* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
|
||||
* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
|
||||
* - UART instance should have already been initialised (through call of HAL_UART_Init() )
|
||||
* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
|
||||
* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* The Handle Instance can be any USARTx (supporting the HW Flow control feature).
|
||||
* It is used to select the USART peripheral (USART availability and x value depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
|
||||
do{ \
|
||||
ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
|
||||
(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
|
||||
} while(0U)
|
||||
#if defined(USART_CR3_ONEBIT)
|
||||
|
||||
/** @brief Macro to enable the UART's one bit sample method
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
|
||||
|
||||
/** @brief Macro to disable the UART's one bit sample method
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3\
|
||||
&= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
|
||||
#endif /* UART_ONE_BIT_SAMPLE_Feature */
|
||||
|
||||
/** @brief Enable UART
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
|
||||
|
||||
/** @brief Disable UART
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup UART_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Initialization/de-initialization functions **********************************/
|
||||
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
|
||||
HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
|
||||
HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_MspInit(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
|
||||
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID,
|
||||
pUART_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID);
|
||||
|
||||
HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup UART_Exported_Functions_Group2 IO operation functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* IO operation functions *******************************************************/
|
||||
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
|
||||
|
||||
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen,
|
||||
uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
|
||||
HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart);
|
||||
|
||||
/* Transfer Abort functions */
|
||||
HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
|
||||
|
||||
void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart);
|
||||
|
||||
void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup UART_Exported_Functions_Group3
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral Control functions ************************************************/
|
||||
HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup UART_Exported_Functions_Group4
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral State functions **************************************************/
|
||||
HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart);
|
||||
uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/** @defgroup UART_Private_Constants UART Private Constants
|
||||
* @{
|
||||
*/
|
||||
/** @brief UART interruptions flag mask
|
||||
*
|
||||
*/
|
||||
#define UART_IT_MASK 0x0000FFFFU
|
||||
|
||||
#define UART_CR1_REG_INDEX 1U
|
||||
#define UART_CR2_REG_INDEX 2U
|
||||
#define UART_CR3_REG_INDEX 3U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup UART_Private_Macros UART Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \
|
||||
((LENGTH) == UART_WORDLENGTH_9B))
|
||||
#define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B))
|
||||
#define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \
|
||||
((STOPBITS) == UART_STOPBITS_2))
|
||||
#define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \
|
||||
((PARITY) == UART_PARITY_EVEN) || \
|
||||
((PARITY) == UART_PARITY_ODD))
|
||||
#define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
|
||||
(((CONTROL) == UART_HWCONTROL_NONE) || \
|
||||
((CONTROL) == UART_HWCONTROL_RTS) || \
|
||||
((CONTROL) == UART_HWCONTROL_CTS) || \
|
||||
((CONTROL) == UART_HWCONTROL_RTS_CTS))
|
||||
#define IS_UART_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00U))
|
||||
#define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \
|
||||
((STATE) == UART_STATE_ENABLE))
|
||||
#if defined(USART_CR1_OVER8)
|
||||
#define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \
|
||||
((SAMPLING) == UART_OVERSAMPLING_8))
|
||||
#endif /* USART_CR1_OVER8 */
|
||||
#define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16))
|
||||
#define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \
|
||||
((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
|
||||
#define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \
|
||||
((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK))
|
||||
#define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) <= 4500000U)
|
||||
#define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU)
|
||||
|
||||
#define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_)))
|
||||
#define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U)
|
||||
#define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U)\
|
||||
+ 50U) / 100U)
|
||||
/* UART BRR = mantissa + overflow + fraction
|
||||
= (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */
|
||||
#define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \
|
||||
(UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U)) + \
|
||||
(UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU))
|
||||
|
||||
#define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_)))
|
||||
#define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U)
|
||||
#define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U)\
|
||||
+ 50U) / 100U)
|
||||
/* UART BRR = mantissa + overflow + fraction
|
||||
= (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */
|
||||
#define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \
|
||||
((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \
|
||||
(UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
/** @defgroup UART_Private_Functions UART Private Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F1xx_HAL_UART_H */
|
||||
|
||||
2569
diode_tester/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_usart.h
Normal file
2569
diode_tester/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_usart.h
Normal file
@@ -0,0 +1,2569 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f1xx_ll_usart.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of USART LL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F1xx_LL_USART_H
|
||||
#define __STM32F1xx_LL_USART_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f1xx.h"
|
||||
|
||||
/** @addtogroup STM32F1xx_LL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined (USART1) || defined (USART2) || defined (USART3) || defined (UART4) || defined (UART5)
|
||||
|
||||
/** @defgroup USART_LL USART
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/** @defgroup USART_LL_Private_Constants USART Private Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Defines used for the bit position in the register and perform offsets*/
|
||||
#define USART_POSITION_GTPR_GT USART_GTPR_GT_Pos
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
#if defined(USE_FULL_LL_DRIVER)
|
||||
/** @defgroup USART_LL_Private_Macros USART Private Macros
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /*USE_FULL_LL_DRIVER*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
#if defined(USE_FULL_LL_DRIVER)
|
||||
/** @defgroup USART_LL_ES_INIT USART Exported Init structures
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief LL USART Init Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t BaudRate; /*!< This field defines expected Usart communication baud rate.
|
||||
|
||||
This feature can be modified afterwards using unitary function @ref LL_USART_SetBaudRate().*/
|
||||
|
||||
uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or received in a frame.
|
||||
This parameter can be a value of @ref USART_LL_EC_DATAWIDTH.
|
||||
|
||||
This feature can be modified afterwards using unitary function @ref LL_USART_SetDataWidth().*/
|
||||
|
||||
uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
|
||||
This parameter can be a value of @ref USART_LL_EC_STOPBITS.
|
||||
|
||||
This feature can be modified afterwards using unitary function @ref LL_USART_SetStopBitsLength().*/
|
||||
|
||||
uint32_t Parity; /*!< Specifies the parity mode.
|
||||
This parameter can be a value of @ref USART_LL_EC_PARITY.
|
||||
|
||||
This feature can be modified afterwards using unitary function @ref LL_USART_SetParity().*/
|
||||
|
||||
uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled.
|
||||
This parameter can be a value of @ref USART_LL_EC_DIRECTION.
|
||||
|
||||
This feature can be modified afterwards using unitary function @ref LL_USART_SetTransferDirection().*/
|
||||
|
||||
uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
|
||||
This parameter can be a value of @ref USART_LL_EC_HWCONTROL.
|
||||
|
||||
This feature can be modified afterwards using unitary function @ref LL_USART_SetHWFlowCtrl().*/
|
||||
|
||||
uint32_t OverSampling; /*!< Specifies whether USART oversampling mode is 16 or 8.
|
||||
This parameter can be a value of @ref USART_LL_EC_OVERSAMPLING.
|
||||
|
||||
This feature can be modified afterwards using unitary function @ref LL_USART_SetOverSampling().*/
|
||||
|
||||
} LL_USART_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief LL USART Clock Init Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t ClockOutput; /*!< Specifies whether the USART clock is enabled or disabled.
|
||||
This parameter can be a value of @ref USART_LL_EC_CLOCK.
|
||||
|
||||
USART HW configuration can be modified afterwards using unitary functions
|
||||
@ref LL_USART_EnableSCLKOutput() or @ref LL_USART_DisableSCLKOutput().
|
||||
For more details, refer to description of this function. */
|
||||
|
||||
uint32_t ClockPolarity; /*!< Specifies the steady state of the serial clock.
|
||||
This parameter can be a value of @ref USART_LL_EC_POLARITY.
|
||||
|
||||
USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPolarity().
|
||||
For more details, refer to description of this function. */
|
||||
|
||||
uint32_t ClockPhase; /*!< Specifies the clock transition on which the bit capture is made.
|
||||
This parameter can be a value of @ref USART_LL_EC_PHASE.
|
||||
|
||||
USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPhase().
|
||||
For more details, refer to description of this function. */
|
||||
|
||||
uint32_t LastBitClockPulse; /*!< Specifies whether the clock pulse corresponding to the last transmitted
|
||||
data bit (MSB) has to be output on the SCLK pin in synchronous mode.
|
||||
This parameter can be a value of @ref USART_LL_EC_LASTCLKPULSE.
|
||||
|
||||
USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetLastClkPulseOutput().
|
||||
For more details, refer to description of this function. */
|
||||
|
||||
} LL_USART_ClockInitTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* USE_FULL_LL_DRIVER */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup USART_LL_Exported_Constants USART Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EC_GET_FLAG Get Flags Defines
|
||||
* @brief Flags defines which can be used with LL_USART_ReadReg function
|
||||
* @{
|
||||
*/
|
||||
#define LL_USART_SR_PE USART_SR_PE /*!< Parity error flag */
|
||||
#define LL_USART_SR_FE USART_SR_FE /*!< Framing error flag */
|
||||
#define LL_USART_SR_NE USART_SR_NE /*!< Noise detected flag */
|
||||
#define LL_USART_SR_ORE USART_SR_ORE /*!< Overrun error flag */
|
||||
#define LL_USART_SR_IDLE USART_SR_IDLE /*!< Idle line detected flag */
|
||||
#define LL_USART_SR_RXNE USART_SR_RXNE /*!< Read data register not empty flag */
|
||||
#define LL_USART_SR_TC USART_SR_TC /*!< Transmission complete flag */
|
||||
#define LL_USART_SR_TXE USART_SR_TXE /*!< Transmit data register empty flag */
|
||||
#define LL_USART_SR_LBD USART_SR_LBD /*!< LIN break detection flag */
|
||||
#define LL_USART_SR_CTS USART_SR_CTS /*!< CTS flag */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EC_IT IT Defines
|
||||
* @brief IT defines which can be used with LL_USART_ReadReg and LL_USART_WriteReg functions
|
||||
* @{
|
||||
*/
|
||||
#define LL_USART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt enable */
|
||||
#define LL_USART_CR1_RXNEIE USART_CR1_RXNEIE /*!< Read data register not empty interrupt enable */
|
||||
#define LL_USART_CR1_TCIE USART_CR1_TCIE /*!< Transmission complete interrupt enable */
|
||||
#define LL_USART_CR1_TXEIE USART_CR1_TXEIE /*!< Transmit data register empty interrupt enable */
|
||||
#define LL_USART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */
|
||||
#define LL_USART_CR2_LBDIE USART_CR2_LBDIE /*!< LIN break detection interrupt enable */
|
||||
#define LL_USART_CR3_EIE USART_CR3_EIE /*!< Error interrupt enable */
|
||||
#define LL_USART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt enable */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EC_DIRECTION Communication Direction
|
||||
* @{
|
||||
*/
|
||||
#define LL_USART_DIRECTION_NONE 0x00000000U /*!< Transmitter and Receiver are disabled */
|
||||
#define LL_USART_DIRECTION_RX USART_CR1_RE /*!< Transmitter is disabled and Receiver is enabled */
|
||||
#define LL_USART_DIRECTION_TX USART_CR1_TE /*!< Transmitter is enabled and Receiver is disabled */
|
||||
#define LL_USART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter and Receiver are enabled */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EC_PARITY Parity Control
|
||||
* @{
|
||||
*/
|
||||
#define LL_USART_PARITY_NONE 0x00000000U /*!< Parity control disabled */
|
||||
#define LL_USART_PARITY_EVEN USART_CR1_PCE /*!< Parity control enabled and Even Parity is selected */
|
||||
#define LL_USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity control enabled and Odd Parity is selected */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EC_WAKEUP Wakeup
|
||||
* @{
|
||||
*/
|
||||
#define LL_USART_WAKEUP_IDLELINE 0x00000000U /*!< USART wake up from Mute mode on Idle Line */
|
||||
#define LL_USART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< USART wake up from Mute mode on Address Mark */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EC_DATAWIDTH Datawidth
|
||||
* @{
|
||||
*/
|
||||
#define LL_USART_DATAWIDTH_8B 0x00000000U /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */
|
||||
#define LL_USART_DATAWIDTH_9B USART_CR1_M /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EC_OVERSAMPLING Oversampling
|
||||
* @{
|
||||
*/
|
||||
#define LL_USART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */
|
||||
#if defined(USART_CR1_OVER8)
|
||||
#define LL_USART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */
|
||||
#endif /* USART_OverSampling_Feature */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if defined(USE_FULL_LL_DRIVER)
|
||||
/** @defgroup USART_LL_EC_CLOCK Clock Signal
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define LL_USART_CLOCK_DISABLE 0x00000000U /*!< Clock signal not provided */
|
||||
#define LL_USART_CLOCK_ENABLE USART_CR2_CLKEN /*!< Clock signal provided */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /*USE_FULL_LL_DRIVER*/
|
||||
|
||||
/** @defgroup USART_LL_EC_LASTCLKPULSE Last Clock Pulse
|
||||
* @{
|
||||
*/
|
||||
#define LL_USART_LASTCLKPULSE_NO_OUTPUT 0x00000000U /*!< The clock pulse of the last data bit is not output to the SCLK pin */
|
||||
#define LL_USART_LASTCLKPULSE_OUTPUT USART_CR2_LBCL /*!< The clock pulse of the last data bit is output to the SCLK pin */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EC_PHASE Clock Phase
|
||||
* @{
|
||||
*/
|
||||
#define LL_USART_PHASE_1EDGE 0x00000000U /*!< The first clock transition is the first data capture edge */
|
||||
#define LL_USART_PHASE_2EDGE USART_CR2_CPHA /*!< The second clock transition is the first data capture edge */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EC_POLARITY Clock Polarity
|
||||
* @{
|
||||
*/
|
||||
#define LL_USART_POLARITY_LOW 0x00000000U /*!< Steady low value on SCLK pin outside transmission window*/
|
||||
#define LL_USART_POLARITY_HIGH USART_CR2_CPOL /*!< Steady high value on SCLK pin outside transmission window */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EC_STOPBITS Stop Bits
|
||||
* @{
|
||||
*/
|
||||
#define LL_USART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< 0.5 stop bit */
|
||||
#define LL_USART_STOPBITS_1 0x00000000U /*!< 1 stop bit */
|
||||
#define LL_USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< 1.5 stop bits */
|
||||
#define LL_USART_STOPBITS_2 USART_CR2_STOP_1 /*!< 2 stop bits */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EC_HWCONTROL Hardware Control
|
||||
* @{
|
||||
*/
|
||||
#define LL_USART_HWCONTROL_NONE 0x00000000U /*!< CTS and RTS hardware flow control disabled */
|
||||
#define LL_USART_HWCONTROL_RTS USART_CR3_RTSE /*!< RTS output enabled, data is only requested when there is space in the receive buffer */
|
||||
#define LL_USART_HWCONTROL_CTS USART_CR3_CTSE /*!< CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0) */
|
||||
#define LL_USART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< CTS and RTS hardware flow control enabled */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EC_IRDA_POWER IrDA Power
|
||||
* @{
|
||||
*/
|
||||
#define LL_USART_IRDA_POWER_NORMAL 0x00000000U /*!< IrDA normal power mode */
|
||||
#define LL_USART_IRDA_POWER_LOW USART_CR3_IRLP /*!< IrDA low power mode */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EC_LINBREAK_DETECT LIN Break Detection Length
|
||||
* @{
|
||||
*/
|
||||
#define LL_USART_LINBREAK_DETECT_10B 0x00000000U /*!< 10-bit break detection method selected */
|
||||
#define LL_USART_LINBREAK_DETECT_11B USART_CR2_LBDL /*!< 11-bit break detection method selected */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/** @defgroup USART_LL_Exported_Macros USART Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EM_WRITE_READ Common Write and read registers Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Write a value in USART register
|
||||
* @param __INSTANCE__ USART Instance
|
||||
* @param __REG__ Register to be written
|
||||
* @param __VALUE__ Value to be written in the register
|
||||
* @retval None
|
||||
*/
|
||||
#define LL_USART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
|
||||
|
||||
/**
|
||||
* @brief Read a value in USART register
|
||||
* @param __INSTANCE__ USART Instance
|
||||
* @param __REG__ Register to be read
|
||||
* @retval Register value
|
||||
*/
|
||||
#define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EM_Exported_Macros_Helper Exported Macros Helper
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Compute USARTDIV value according to Peripheral Clock and
|
||||
* expected Baud Rate in 8 bits sampling mode (32 bits value of USARTDIV is returned)
|
||||
* @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance
|
||||
* @param __BAUDRATE__ Baud rate value to achieve
|
||||
* @retval USARTDIV value to be used for BRR register filling in OverSampling_8 case
|
||||
*/
|
||||
#define __LL_USART_DIV_SAMPLING8_100(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__)*25)/(2*(__BAUDRATE__)))
|
||||
#define __LL_USART_DIVMANT_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__))/100)
|
||||
#define __LL_USART_DIVFRAQ_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 8\
|
||||
+ 50) / 100)
|
||||
/* UART BRR = mantissa + overflow + fraction
|
||||
= (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07) */
|
||||
#define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
|
||||
((__LL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0xF8) << 1)) + \
|
||||
(__LL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0x07))
|
||||
|
||||
/**
|
||||
* @brief Compute USARTDIV value according to Peripheral Clock and
|
||||
* expected Baud Rate in 16 bits sampling mode (32 bits value of USARTDIV is returned)
|
||||
* @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance
|
||||
* @param __BAUDRATE__ Baud rate value to achieve
|
||||
* @retval USARTDIV value to be used for BRR register filling in OverSampling_16 case
|
||||
*/
|
||||
#define __LL_USART_DIV_SAMPLING16_100(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__)*25)/(4*(__BAUDRATE__)))
|
||||
#define __LL_USART_DIVMANT_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__))/100)
|
||||
#define __LL_USART_DIVFRAQ_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) ((((__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 16)\
|
||||
+ 50) / 100)
|
||||
/* USART BRR = mantissa + overflow + fraction
|
||||
= (USART DIVMANT << 4) + (USART DIVFRAQ & 0xF0) + (USART DIVFRAQ & 0x0F) */
|
||||
#define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
|
||||
(__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0xF0)) + \
|
||||
(__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0x0F))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup USART_LL_Exported_Functions USART Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EF_Configuration Configuration functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief USART Enable
|
||||
* @rmtoll CR1 UE LL_USART_Enable
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_Enable(USART_TypeDef *USARTx)
|
||||
{
|
||||
SET_BIT(USARTx->CR1, USART_CR1_UE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USART Disable (all USART prescalers and outputs are disabled)
|
||||
* @note When USART is disabled, USART prescalers and outputs are stopped immediately,
|
||||
* and current operations are discarded. The configuration of the USART is kept, but all the status
|
||||
* flags, in the USARTx_SR are set to their default values.
|
||||
* @rmtoll CR1 UE LL_USART_Disable
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx)
|
||||
{
|
||||
CLEAR_BIT(USARTx->CR1, USART_CR1_UE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Indicate if USART is enabled
|
||||
* @rmtoll CR1 UE LL_USART_IsEnabled
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabled(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Receiver Enable (Receiver is enabled and begins searching for a start bit)
|
||||
* @rmtoll CR1 RE LL_USART_EnableDirectionRx
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Receiver Disable
|
||||
* @rmtoll CR1 RE LL_USART_DisableDirectionRx
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Transmitter Enable
|
||||
* @rmtoll CR1 TE LL_USART_EnableDirectionTx
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Transmitter Disable
|
||||
* @rmtoll CR1 TE LL_USART_DisableDirectionTx
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure simultaneously enabled/disabled states
|
||||
* of Transmitter and Receiver
|
||||
* @rmtoll CR1 RE LL_USART_SetTransferDirection\n
|
||||
* CR1 TE LL_USART_SetTransferDirection
|
||||
* @param USARTx USART Instance
|
||||
* @param TransferDirection This parameter can be one of the following values:
|
||||
* @arg @ref LL_USART_DIRECTION_NONE
|
||||
* @arg @ref LL_USART_DIRECTION_RX
|
||||
* @arg @ref LL_USART_DIRECTION_TX
|
||||
* @arg @ref LL_USART_DIRECTION_TX_RX
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirection)
|
||||
{
|
||||
ATOMIC_MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return enabled/disabled states of Transmitter and Receiver
|
||||
* @rmtoll CR1 RE LL_USART_GetTransferDirection\n
|
||||
* CR1 TE LL_USART_GetTransferDirection
|
||||
* @param USARTx USART Instance
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_USART_DIRECTION_NONE
|
||||
* @arg @ref LL_USART_DIRECTION_RX
|
||||
* @arg @ref LL_USART_DIRECTION_TX
|
||||
* @arg @ref LL_USART_DIRECTION_TX_RX
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_GetTransferDirection(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_RE | USART_CR1_TE));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure Parity (enabled/disabled and parity mode if enabled).
|
||||
* @note This function selects if hardware parity control (generation and detection) is enabled or disabled.
|
||||
* When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position
|
||||
* (9th or 8th bit depending on data width) and parity is checked on the received data.
|
||||
* @rmtoll CR1 PS LL_USART_SetParity\n
|
||||
* CR1 PCE LL_USART_SetParity
|
||||
* @param USARTx USART Instance
|
||||
* @param Parity This parameter can be one of the following values:
|
||||
* @arg @ref LL_USART_PARITY_NONE
|
||||
* @arg @ref LL_USART_PARITY_EVEN
|
||||
* @arg @ref LL_USART_PARITY_ODD
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_SetParity(USART_TypeDef *USARTx, uint32_t Parity)
|
||||
{
|
||||
MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return Parity configuration (enabled/disabled and parity mode if enabled)
|
||||
* @rmtoll CR1 PS LL_USART_GetParity\n
|
||||
* CR1 PCE LL_USART_GetParity
|
||||
* @param USARTx USART Instance
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_USART_PARITY_NONE
|
||||
* @arg @ref LL_USART_PARITY_EVEN
|
||||
* @arg @ref LL_USART_PARITY_ODD
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_GetParity(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set Receiver Wake Up method from Mute mode.
|
||||
* @rmtoll CR1 WAKE LL_USART_SetWakeUpMethod
|
||||
* @param USARTx USART Instance
|
||||
* @param Method This parameter can be one of the following values:
|
||||
* @arg @ref LL_USART_WAKEUP_IDLELINE
|
||||
* @arg @ref LL_USART_WAKEUP_ADDRESSMARK
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method)
|
||||
{
|
||||
MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return Receiver Wake Up method from Mute mode
|
||||
* @rmtoll CR1 WAKE LL_USART_GetWakeUpMethod
|
||||
* @param USARTx USART Instance
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_USART_WAKEUP_IDLELINE
|
||||
* @arg @ref LL_USART_WAKEUP_ADDRESSMARK
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set Word length (i.e. nb of data bits, excluding start and stop bits)
|
||||
* @rmtoll CR1 M LL_USART_SetDataWidth
|
||||
* @param USARTx USART Instance
|
||||
* @param DataWidth This parameter can be one of the following values:
|
||||
* @arg @ref LL_USART_DATAWIDTH_8B
|
||||
* @arg @ref LL_USART_DATAWIDTH_9B
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_SetDataWidth(USART_TypeDef *USARTx, uint32_t DataWidth)
|
||||
{
|
||||
MODIFY_REG(USARTx->CR1, USART_CR1_M, DataWidth);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return Word length (i.e. nb of data bits, excluding start and stop bits)
|
||||
* @rmtoll CR1 M LL_USART_GetDataWidth
|
||||
* @param USARTx USART Instance
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_USART_DATAWIDTH_8B
|
||||
* @arg @ref LL_USART_DATAWIDTH_9B
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_GetDataWidth(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M));
|
||||
}
|
||||
|
||||
#if defined(USART_CR1_OVER8)
|
||||
/**
|
||||
* @brief Set Oversampling to 8-bit or 16-bit mode
|
||||
* @rmtoll CR1 OVER8 LL_USART_SetOverSampling
|
||||
* @param USARTx USART Instance
|
||||
* @param OverSampling This parameter can be one of the following values:
|
||||
* @arg @ref LL_USART_OVERSAMPLING_16
|
||||
* @arg @ref LL_USART_OVERSAMPLING_8
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling)
|
||||
{
|
||||
MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return Oversampling mode
|
||||
* @rmtoll CR1 OVER8 LL_USART_GetOverSampling
|
||||
* @param USARTx USART Instance
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_USART_OVERSAMPLING_16
|
||||
* @arg @ref LL_USART_OVERSAMPLING_8
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_GetOverSampling(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_OVER8));
|
||||
}
|
||||
|
||||
#endif /* USART_OverSampling_Feature */
|
||||
/**
|
||||
* @brief Configure if Clock pulse of the last data bit is output to the SCLK pin or not
|
||||
* @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Synchronous mode is supported by the USARTx instance.
|
||||
* @rmtoll CR2 LBCL LL_USART_SetLastClkPulseOutput
|
||||
* @param USARTx USART Instance
|
||||
* @param LastBitClockPulse This parameter can be one of the following values:
|
||||
* @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
|
||||
* @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint32_t LastBitClockPulse)
|
||||
{
|
||||
MODIFY_REG(USARTx->CR2, USART_CR2_LBCL, LastBitClockPulse);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Retrieve Clock pulse of the last data bit output configuration
|
||||
* (Last bit Clock pulse output to the SCLK pin or not)
|
||||
* @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Synchronous mode is supported by the USARTx instance.
|
||||
* @rmtoll CR2 LBCL LL_USART_GetLastClkPulseOutput
|
||||
* @param USARTx USART Instance
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
|
||||
* @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Select the phase of the clock output on the SCLK pin in synchronous mode
|
||||
* @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Synchronous mode is supported by the USARTx instance.
|
||||
* @rmtoll CR2 CPHA LL_USART_SetClockPhase
|
||||
* @param USARTx USART Instance
|
||||
* @param ClockPhase This parameter can be one of the following values:
|
||||
* @arg @ref LL_USART_PHASE_1EDGE
|
||||
* @arg @ref LL_USART_PHASE_2EDGE
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase)
|
||||
{
|
||||
MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return phase of the clock output on the SCLK pin in synchronous mode
|
||||
* @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Synchronous mode is supported by the USARTx instance.
|
||||
* @rmtoll CR2 CPHA LL_USART_GetClockPhase
|
||||
* @param USARTx USART Instance
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_USART_PHASE_1EDGE
|
||||
* @arg @ref LL_USART_PHASE_2EDGE
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_GetClockPhase(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Select the polarity of the clock output on the SCLK pin in synchronous mode
|
||||
* @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Synchronous mode is supported by the USARTx instance.
|
||||
* @rmtoll CR2 CPOL LL_USART_SetClockPolarity
|
||||
* @param USARTx USART Instance
|
||||
* @param ClockPolarity This parameter can be one of the following values:
|
||||
* @arg @ref LL_USART_POLARITY_LOW
|
||||
* @arg @ref LL_USART_POLARITY_HIGH
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity)
|
||||
{
|
||||
MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return polarity of the clock output on the SCLK pin in synchronous mode
|
||||
* @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Synchronous mode is supported by the USARTx instance.
|
||||
* @rmtoll CR2 CPOL LL_USART_GetClockPolarity
|
||||
* @param USARTx USART Instance
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_USART_POLARITY_LOW
|
||||
* @arg @ref LL_USART_POLARITY_HIGH
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_GetClockPolarity(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure Clock signal format (Phase Polarity and choice about output of last bit clock pulse)
|
||||
* @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Synchronous mode is supported by the USARTx instance.
|
||||
* @note Call of this function is equivalent to following function call sequence :
|
||||
* - Clock Phase configuration using @ref LL_USART_SetClockPhase() function
|
||||
* - Clock Polarity configuration using @ref LL_USART_SetClockPolarity() function
|
||||
* - Output of Last bit Clock pulse configuration using @ref LL_USART_SetLastClkPulseOutput() function
|
||||
* @rmtoll CR2 CPHA LL_USART_ConfigClock\n
|
||||
* CR2 CPOL LL_USART_ConfigClock\n
|
||||
* CR2 LBCL LL_USART_ConfigClock
|
||||
* @param USARTx USART Instance
|
||||
* @param Phase This parameter can be one of the following values:
|
||||
* @arg @ref LL_USART_PHASE_1EDGE
|
||||
* @arg @ref LL_USART_PHASE_2EDGE
|
||||
* @param Polarity This parameter can be one of the following values:
|
||||
* @arg @ref LL_USART_POLARITY_LOW
|
||||
* @arg @ref LL_USART_POLARITY_HIGH
|
||||
* @param LBCPOutput This parameter can be one of the following values:
|
||||
* @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
|
||||
* @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_ConfigClock(USART_TypeDef *USARTx, uint32_t Phase, uint32_t Polarity, uint32_t LBCPOutput)
|
||||
{
|
||||
MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCPOutput);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable Clock output on SCLK pin
|
||||
* @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Synchronous mode is supported by the USARTx instance.
|
||||
* @rmtoll CR2 CLKEN LL_USART_EnableSCLKOutput
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx)
|
||||
{
|
||||
SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable Clock output on SCLK pin
|
||||
* @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Synchronous mode is supported by the USARTx instance.
|
||||
* @rmtoll CR2 CLKEN LL_USART_DisableSCLKOutput
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx)
|
||||
{
|
||||
CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Indicate if Clock output on SCLK pin is enabled
|
||||
* @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Synchronous mode is supported by the USARTx instance.
|
||||
* @rmtoll CR2 CLKEN LL_USART_IsEnabledSCLKOutput
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the length of the stop bits
|
||||
* @rmtoll CR2 STOP LL_USART_SetStopBitsLength
|
||||
* @param USARTx USART Instance
|
||||
* @param StopBits This parameter can be one of the following values:
|
||||
* @arg @ref LL_USART_STOPBITS_0_5
|
||||
* @arg @ref LL_USART_STOPBITS_1
|
||||
* @arg @ref LL_USART_STOPBITS_1_5
|
||||
* @arg @ref LL_USART_STOPBITS_2
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_SetStopBitsLength(USART_TypeDef *USARTx, uint32_t StopBits)
|
||||
{
|
||||
MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Retrieve the length of the stop bits
|
||||
* @rmtoll CR2 STOP LL_USART_GetStopBitsLength
|
||||
* @param USARTx USART Instance
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_USART_STOPBITS_0_5
|
||||
* @arg @ref LL_USART_STOPBITS_1
|
||||
* @arg @ref LL_USART_STOPBITS_1_5
|
||||
* @arg @ref LL_USART_STOPBITS_2
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure Character frame format (Datawidth, Parity control, Stop Bits)
|
||||
* @note Call of this function is equivalent to following function call sequence :
|
||||
* - Data Width configuration using @ref LL_USART_SetDataWidth() function
|
||||
* - Parity Control and mode configuration using @ref LL_USART_SetParity() function
|
||||
* - Stop bits configuration using @ref LL_USART_SetStopBitsLength() function
|
||||
* @rmtoll CR1 PS LL_USART_ConfigCharacter\n
|
||||
* CR1 PCE LL_USART_ConfigCharacter\n
|
||||
* CR1 M LL_USART_ConfigCharacter\n
|
||||
* CR2 STOP LL_USART_ConfigCharacter
|
||||
* @param USARTx USART Instance
|
||||
* @param DataWidth This parameter can be one of the following values:
|
||||
* @arg @ref LL_USART_DATAWIDTH_8B
|
||||
* @arg @ref LL_USART_DATAWIDTH_9B
|
||||
* @param Parity This parameter can be one of the following values:
|
||||
* @arg @ref LL_USART_PARITY_NONE
|
||||
* @arg @ref LL_USART_PARITY_EVEN
|
||||
* @arg @ref LL_USART_PARITY_ODD
|
||||
* @param StopBits This parameter can be one of the following values:
|
||||
* @arg @ref LL_USART_STOPBITS_0_5
|
||||
* @arg @ref LL_USART_STOPBITS_1
|
||||
* @arg @ref LL_USART_STOPBITS_1_5
|
||||
* @arg @ref LL_USART_STOPBITS_2
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t Parity,
|
||||
uint32_t StopBits)
|
||||
{
|
||||
MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
|
||||
MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set Address of the USART node.
|
||||
* @note This is used in multiprocessor communication during Mute mode or Stop mode,
|
||||
* for wake up with address mark detection.
|
||||
* @rmtoll CR2 ADD LL_USART_SetNodeAddress
|
||||
* @param USARTx USART Instance
|
||||
* @param NodeAddress 4 bit Address of the USART node.
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_SetNodeAddress(USART_TypeDef *USARTx, uint32_t NodeAddress)
|
||||
{
|
||||
MODIFY_REG(USARTx->CR2, USART_CR2_ADD, (NodeAddress & USART_CR2_ADD));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return 4 bit Address of the USART node as set in ADD field of CR2.
|
||||
* @note only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant)
|
||||
* @rmtoll CR2 ADD LL_USART_GetNodeAddress
|
||||
* @param USARTx USART Instance
|
||||
* @retval Address of the USART node (Value between Min_Data=0 and Max_Data=255)
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_GetNodeAddress(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADD));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable RTS HW Flow Control
|
||||
* @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Hardware Flow control feature is supported by the USARTx instance.
|
||||
* @rmtoll CR3 RTSE LL_USART_EnableRTSHWFlowCtrl
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx)
|
||||
{
|
||||
SET_BIT(USARTx->CR3, USART_CR3_RTSE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable RTS HW Flow Control
|
||||
* @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Hardware Flow control feature is supported by the USARTx instance.
|
||||
* @rmtoll CR3 RTSE LL_USART_DisableRTSHWFlowCtrl
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx)
|
||||
{
|
||||
CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable CTS HW Flow Control
|
||||
* @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Hardware Flow control feature is supported by the USARTx instance.
|
||||
* @rmtoll CR3 CTSE LL_USART_EnableCTSHWFlowCtrl
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx)
|
||||
{
|
||||
SET_BIT(USARTx->CR3, USART_CR3_CTSE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable CTS HW Flow Control
|
||||
* @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Hardware Flow control feature is supported by the USARTx instance.
|
||||
* @rmtoll CR3 CTSE LL_USART_DisableCTSHWFlowCtrl
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx)
|
||||
{
|
||||
CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure HW Flow Control mode (both CTS and RTS)
|
||||
* @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Hardware Flow control feature is supported by the USARTx instance.
|
||||
* @rmtoll CR3 RTSE LL_USART_SetHWFlowCtrl\n
|
||||
* CR3 CTSE LL_USART_SetHWFlowCtrl
|
||||
* @param USARTx USART Instance
|
||||
* @param HardwareFlowControl This parameter can be one of the following values:
|
||||
* @arg @ref LL_USART_HWCONTROL_NONE
|
||||
* @arg @ref LL_USART_HWCONTROL_RTS
|
||||
* @arg @ref LL_USART_HWCONTROL_CTS
|
||||
* @arg @ref LL_USART_HWCONTROL_RTS_CTS
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl)
|
||||
{
|
||||
MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return HW Flow Control configuration (both CTS and RTS)
|
||||
* @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Hardware Flow control feature is supported by the USARTx instance.
|
||||
* @rmtoll CR3 RTSE LL_USART_GetHWFlowCtrl\n
|
||||
* CR3 CTSE LL_USART_GetHWFlowCtrl
|
||||
* @param USARTx USART Instance
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_USART_HWCONTROL_NONE
|
||||
* @arg @ref LL_USART_HWCONTROL_RTS
|
||||
* @arg @ref LL_USART_HWCONTROL_CTS
|
||||
* @arg @ref LL_USART_HWCONTROL_RTS_CTS
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
|
||||
}
|
||||
|
||||
#if defined(USART_CR3_ONEBIT)
|
||||
/**
|
||||
* @brief Enable One bit sampling method
|
||||
* @rmtoll CR3 ONEBIT LL_USART_EnableOneBitSamp
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_EnableOneBitSamp(USART_TypeDef *USARTx)
|
||||
{
|
||||
SET_BIT(USARTx->CR3, USART_CR3_ONEBIT);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable One bit sampling method
|
||||
* @rmtoll CR3 ONEBIT LL_USART_DisableOneBitSamp
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_DisableOneBitSamp(USART_TypeDef *USARTx)
|
||||
{
|
||||
CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Indicate if One bit sampling method is enabled
|
||||
* @rmtoll CR3 ONEBIT LL_USART_IsEnabledOneBitSamp
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledOneBitSamp(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT));
|
||||
}
|
||||
#endif /* USART_OneBitSampling_Feature */
|
||||
|
||||
#if defined(USART_CR1_OVER8)
|
||||
/**
|
||||
* @brief Configure USART BRR register for achieving expected Baud Rate value.
|
||||
* @note Compute and set USARTDIV value in BRR Register (full BRR content)
|
||||
* according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values
|
||||
* @note Peripheral clock and Baud rate values provided as function parameters should be valid
|
||||
* (Baud rate value != 0)
|
||||
* @rmtoll BRR BRR LL_USART_SetBaudRate
|
||||
* @param USARTx USART Instance
|
||||
* @param PeriphClk Peripheral Clock
|
||||
* @param OverSampling This parameter can be one of the following values:
|
||||
* @arg @ref LL_USART_OVERSAMPLING_16
|
||||
* @arg @ref LL_USART_OVERSAMPLING_8
|
||||
* @param BaudRate Baud Rate
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling,
|
||||
uint32_t BaudRate)
|
||||
{
|
||||
if (OverSampling == LL_USART_OVERSAMPLING_8)
|
||||
{
|
||||
USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate));
|
||||
}
|
||||
else
|
||||
{
|
||||
USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return current Baud Rate value, according to USARTDIV present in BRR register
|
||||
* (full BRR content), and to used Peripheral Clock and Oversampling mode values
|
||||
* @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned.
|
||||
* @rmtoll BRR BRR LL_USART_GetBaudRate
|
||||
* @param USARTx USART Instance
|
||||
* @param PeriphClk Peripheral Clock
|
||||
* @param OverSampling This parameter can be one of the following values:
|
||||
* @arg @ref LL_USART_OVERSAMPLING_16
|
||||
* @arg @ref LL_USART_OVERSAMPLING_8
|
||||
* @retval Baud Rate
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_GetBaudRate(const USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling)
|
||||
{
|
||||
uint32_t usartdiv = 0x0U;
|
||||
uint32_t brrresult = 0x0U;
|
||||
|
||||
usartdiv = USARTx->BRR;
|
||||
|
||||
if (OverSampling == LL_USART_OVERSAMPLING_8)
|
||||
{
|
||||
if ((usartdiv & 0xFFF7U) != 0U)
|
||||
{
|
||||
usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ;
|
||||
brrresult = (PeriphClk * 2U) / usartdiv;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if ((usartdiv & 0xFFFFU) != 0U)
|
||||
{
|
||||
brrresult = PeriphClk / usartdiv;
|
||||
}
|
||||
}
|
||||
return (brrresult);
|
||||
}
|
||||
#else
|
||||
/**
|
||||
* @brief Configure USART BRR register for achieving expected Baud Rate value.
|
||||
* @note Compute and set USARTDIV value in BRR Register (full BRR content)
|
||||
* according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values
|
||||
* @note Peripheral clock and Baud rate values provided as function parameters should be valid
|
||||
* (Baud rate value != 0)
|
||||
* @rmtoll BRR BRR LL_USART_SetBaudRate
|
||||
* @param USARTx USART Instance
|
||||
* @param PeriphClk Peripheral Clock
|
||||
* @param BaudRate Baud Rate
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t BaudRate)
|
||||
{
|
||||
USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return current Baud Rate value, according to USARTDIV present in BRR register
|
||||
* (full BRR content), and to used Peripheral Clock and Oversampling mode values
|
||||
* @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned.
|
||||
* @rmtoll BRR BRR LL_USART_GetBaudRate
|
||||
* @param USARTx USART Instance
|
||||
* @param PeriphClk Peripheral Clock
|
||||
* @retval Baud Rate
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_GetBaudRate(const USART_TypeDef *USARTx, uint32_t PeriphClk)
|
||||
{
|
||||
uint32_t usartdiv = 0x0U;
|
||||
uint32_t brrresult = 0x0U;
|
||||
|
||||
usartdiv = USARTx->BRR;
|
||||
|
||||
if ((usartdiv & 0xFFFFU) != 0U)
|
||||
{
|
||||
brrresult = PeriphClk / usartdiv;
|
||||
}
|
||||
return (brrresult);
|
||||
}
|
||||
#endif /* USART_OverSampling_Feature */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EF_Configuration_IRDA Configuration functions related to Irda feature
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Enable IrDA mode
|
||||
* @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
|
||||
* IrDA feature is supported by the USARTx instance.
|
||||
* @rmtoll CR3 IREN LL_USART_EnableIrda
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx)
|
||||
{
|
||||
SET_BIT(USARTx->CR3, USART_CR3_IREN);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable IrDA mode
|
||||
* @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
|
||||
* IrDA feature is supported by the USARTx instance.
|
||||
* @rmtoll CR3 IREN LL_USART_DisableIrda
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_DisableIrda(USART_TypeDef *USARTx)
|
||||
{
|
||||
CLEAR_BIT(USARTx->CR3, USART_CR3_IREN);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Indicate if IrDA mode is enabled
|
||||
* @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
|
||||
* IrDA feature is supported by the USARTx instance.
|
||||
* @rmtoll CR3 IREN LL_USART_IsEnabledIrda
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIrda(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure IrDA Power Mode (Normal or Low Power)
|
||||
* @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
|
||||
* IrDA feature is supported by the USARTx instance.
|
||||
* @rmtoll CR3 IRLP LL_USART_SetIrdaPowerMode
|
||||
* @param USARTx USART Instance
|
||||
* @param PowerMode This parameter can be one of the following values:
|
||||
* @arg @ref LL_USART_IRDA_POWER_NORMAL
|
||||
* @arg @ref LL_USART_IRDA_POWER_LOW
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_SetIrdaPowerMode(USART_TypeDef *USARTx, uint32_t PowerMode)
|
||||
{
|
||||
MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Retrieve IrDA Power Mode configuration (Normal or Low Power)
|
||||
* @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
|
||||
* IrDA feature is supported by the USARTx instance.
|
||||
* @rmtoll CR3 IRLP LL_USART_GetIrdaPowerMode
|
||||
* @param USARTx USART Instance
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_USART_IRDA_POWER_NORMAL
|
||||
* @arg @ref LL_USART_PHASE_2EDGE
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set Irda prescaler value, used for dividing the USART clock source
|
||||
* to achieve the Irda Low Power frequency (8 bits value)
|
||||
* @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
|
||||
* IrDA feature is supported by the USARTx instance.
|
||||
* @rmtoll GTPR PSC LL_USART_SetIrdaPrescaler
|
||||
* @param USARTx USART Instance
|
||||
* @param PrescalerValue Value between Min_Data=0x00 and Max_Data=0xFF
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_SetIrdaPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
|
||||
{
|
||||
MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return Irda prescaler value, used for dividing the USART clock source
|
||||
* to achieve the Irda Low Power frequency (8 bits value)
|
||||
* @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
|
||||
* IrDA feature is supported by the USARTx instance.
|
||||
* @rmtoll GTPR PSC LL_USART_GetIrdaPrescaler
|
||||
* @param USARTx USART Instance
|
||||
* @retval Irda prescaler value (Value between Min_Data=0x00 and Max_Data=0xFF)
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_GetIrdaPrescaler(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EF_Configuration_Smartcard Configuration functions related to Smartcard feature
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Enable Smartcard NACK transmission
|
||||
* @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Smartcard feature is supported by the USARTx instance.
|
||||
* @rmtoll CR3 NACK LL_USART_EnableSmartcardNACK
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_EnableSmartcardNACK(USART_TypeDef *USARTx)
|
||||
{
|
||||
SET_BIT(USARTx->CR3, USART_CR3_NACK);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable Smartcard NACK transmission
|
||||
* @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Smartcard feature is supported by the USARTx instance.
|
||||
* @rmtoll CR3 NACK LL_USART_DisableSmartcardNACK
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_DisableSmartcardNACK(USART_TypeDef *USARTx)
|
||||
{
|
||||
CLEAR_BIT(USARTx->CR3, USART_CR3_NACK);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Indicate if Smartcard NACK transmission is enabled
|
||||
* @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Smartcard feature is supported by the USARTx instance.
|
||||
* @rmtoll CR3 NACK LL_USART_IsEnabledSmartcardNACK
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcardNACK(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable Smartcard mode
|
||||
* @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Smartcard feature is supported by the USARTx instance.
|
||||
* @rmtoll CR3 SCEN LL_USART_EnableSmartcard
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_EnableSmartcard(USART_TypeDef *USARTx)
|
||||
{
|
||||
SET_BIT(USARTx->CR3, USART_CR3_SCEN);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable Smartcard mode
|
||||
* @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Smartcard feature is supported by the USARTx instance.
|
||||
* @rmtoll CR3 SCEN LL_USART_DisableSmartcard
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_DisableSmartcard(USART_TypeDef *USARTx)
|
||||
{
|
||||
CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Indicate if Smartcard mode is enabled
|
||||
* @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Smartcard feature is supported by the USARTx instance.
|
||||
* @rmtoll CR3 SCEN LL_USART_IsEnabledSmartcard
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcard(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set Smartcard prescaler value, used for dividing the USART clock
|
||||
* source to provide the SMARTCARD Clock (5 bits value)
|
||||
* @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Smartcard feature is supported by the USARTx instance.
|
||||
* @rmtoll GTPR PSC LL_USART_SetSmartcardPrescaler
|
||||
* @param USARTx USART Instance
|
||||
* @param PrescalerValue Value between Min_Data=0 and Max_Data=31
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
|
||||
{
|
||||
MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return Smartcard prescaler value, used for dividing the USART clock
|
||||
* source to provide the SMARTCARD Clock (5 bits value)
|
||||
* @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Smartcard feature is supported by the USARTx instance.
|
||||
* @rmtoll GTPR PSC LL_USART_GetSmartcardPrescaler
|
||||
* @param USARTx USART Instance
|
||||
* @retval Smartcard prescaler value (Value between Min_Data=0 and Max_Data=31)
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_GetSmartcardPrescaler(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set Smartcard Guard time value, expressed in nb of baud clocks periods
|
||||
* (GT[7:0] bits : Guard time value)
|
||||
* @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Smartcard feature is supported by the USARTx instance.
|
||||
* @rmtoll GTPR GT LL_USART_SetSmartcardGuardTime
|
||||
* @param USARTx USART Instance
|
||||
* @param GuardTime Value between Min_Data=0x00 and Max_Data=0xFF
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint32_t GuardTime)
|
||||
{
|
||||
MODIFY_REG(USARTx->GTPR, USART_GTPR_GT, GuardTime << USART_POSITION_GTPR_GT);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return Smartcard Guard time value, expressed in nb of baud clocks periods
|
||||
* (GT[7:0] bits : Guard time value)
|
||||
* @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Smartcard feature is supported by the USARTx instance.
|
||||
* @rmtoll GTPR GT LL_USART_GetSmartcardGuardTime
|
||||
* @param USARTx USART Instance
|
||||
* @retval Smartcard Guard time value (Value between Min_Data=0x00 and Max_Data=0xFF)
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_POSITION_GTPR_GT);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Enable Single Wire Half-Duplex mode
|
||||
* @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Half-Duplex mode is supported by the USARTx instance.
|
||||
* @rmtoll CR3 HDSEL LL_USART_EnableHalfDuplex
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx)
|
||||
{
|
||||
SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable Single Wire Half-Duplex mode
|
||||
* @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Half-Duplex mode is supported by the USARTx instance.
|
||||
* @rmtoll CR3 HDSEL LL_USART_DisableHalfDuplex
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_DisableHalfDuplex(USART_TypeDef *USARTx)
|
||||
{
|
||||
CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Indicate if Single Wire Half-Duplex mode is enabled
|
||||
* @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Half-Duplex mode is supported by the USARTx instance.
|
||||
* @rmtoll CR3 HDSEL LL_USART_IsEnabledHalfDuplex
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL));
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EF_Configuration_LIN Configuration functions related to LIN feature
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Set LIN Break Detection Length
|
||||
* @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
|
||||
* LIN feature is supported by the USARTx instance.
|
||||
* @rmtoll CR2 LBDL LL_USART_SetLINBrkDetectionLen
|
||||
* @param USARTx USART Instance
|
||||
* @param LINBDLength This parameter can be one of the following values:
|
||||
* @arg @ref LL_USART_LINBREAK_DETECT_10B
|
||||
* @arg @ref LL_USART_LINBREAK_DETECT_11B
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint32_t LINBDLength)
|
||||
{
|
||||
MODIFY_REG(USARTx->CR2, USART_CR2_LBDL, LINBDLength);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return LIN Break Detection Length
|
||||
* @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
|
||||
* LIN feature is supported by the USARTx instance.
|
||||
* @rmtoll CR2 LBDL LL_USART_GetLINBrkDetectionLen
|
||||
* @param USARTx USART Instance
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_USART_LINBREAK_DETECT_10B
|
||||
* @arg @ref LL_USART_LINBREAK_DETECT_11B
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_GetLINBrkDetectionLen(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBDL));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable LIN mode
|
||||
* @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
|
||||
* LIN feature is supported by the USARTx instance.
|
||||
* @rmtoll CR2 LINEN LL_USART_EnableLIN
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_EnableLIN(USART_TypeDef *USARTx)
|
||||
{
|
||||
SET_BIT(USARTx->CR2, USART_CR2_LINEN);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable LIN mode
|
||||
* @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
|
||||
* LIN feature is supported by the USARTx instance.
|
||||
* @rmtoll CR2 LINEN LL_USART_DisableLIN
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx)
|
||||
{
|
||||
CLEAR_BIT(USARTx->CR2, USART_CR2_LINEN);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Indicate if LIN mode is enabled
|
||||
* @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
|
||||
* LIN feature is supported by the USARTx instance.
|
||||
* @rmtoll CR2 LINEN LL_USART_IsEnabledLIN
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN));
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EF_AdvancedConfiguration Advanced Configurations services
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Perform basic configuration of USART for enabling use in Asynchronous Mode (UART)
|
||||
* @note In UART mode, the following bits must be kept cleared:
|
||||
* - LINEN bit in the USART_CR2 register,
|
||||
* - CLKEN bit in the USART_CR2 register,
|
||||
* - SCEN bit in the USART_CR3 register,
|
||||
* - IREN bit in the USART_CR3 register,
|
||||
* - HDSEL bit in the USART_CR3 register.
|
||||
* @note Call of this function is equivalent to following function call sequence :
|
||||
* - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
|
||||
* - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
|
||||
* - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
|
||||
* - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
|
||||
* - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
|
||||
* @note Other remaining configurations items related to Asynchronous Mode
|
||||
* (as Baud Rate, Word length, Parity, ...) should be set using
|
||||
* dedicated functions
|
||||
* @rmtoll CR2 LINEN LL_USART_ConfigAsyncMode\n
|
||||
* CR2 CLKEN LL_USART_ConfigAsyncMode\n
|
||||
* CR3 SCEN LL_USART_ConfigAsyncMode\n
|
||||
* CR3 IREN LL_USART_ConfigAsyncMode\n
|
||||
* CR3 HDSEL LL_USART_ConfigAsyncMode
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx)
|
||||
{
|
||||
/* In Asynchronous mode, the following bits must be kept cleared:
|
||||
- LINEN, CLKEN bits in the USART_CR2 register,
|
||||
- SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
|
||||
CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
|
||||
CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Perform basic configuration of USART for enabling use in Synchronous Mode
|
||||
* @note In Synchronous mode, the following bits must be kept cleared:
|
||||
* - LINEN bit in the USART_CR2 register,
|
||||
* - SCEN bit in the USART_CR3 register,
|
||||
* - IREN bit in the USART_CR3 register,
|
||||
* - HDSEL bit in the USART_CR3 register.
|
||||
* This function also sets the USART in Synchronous mode.
|
||||
* @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Synchronous mode is supported by the USARTx instance.
|
||||
* @note Call of this function is equivalent to following function call sequence :
|
||||
* - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
|
||||
* - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
|
||||
* - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
|
||||
* - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
|
||||
* - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
|
||||
* @note Other remaining configurations items related to Synchronous Mode
|
||||
* (as Baud Rate, Word length, Parity, Clock Polarity, ...) should be set using
|
||||
* dedicated functions
|
||||
* @rmtoll CR2 LINEN LL_USART_ConfigSyncMode\n
|
||||
* CR2 CLKEN LL_USART_ConfigSyncMode\n
|
||||
* CR3 SCEN LL_USART_ConfigSyncMode\n
|
||||
* CR3 IREN LL_USART_ConfigSyncMode\n
|
||||
* CR3 HDSEL LL_USART_ConfigSyncMode
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_ConfigSyncMode(USART_TypeDef *USARTx)
|
||||
{
|
||||
/* In Synchronous mode, the following bits must be kept cleared:
|
||||
- LINEN bit in the USART_CR2 register,
|
||||
- SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
|
||||
CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
|
||||
CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
|
||||
/* set the UART/USART in Synchronous mode */
|
||||
SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Perform basic configuration of USART for enabling use in LIN Mode
|
||||
* @note In LIN mode, the following bits must be kept cleared:
|
||||
* - STOP and CLKEN bits in the USART_CR2 register,
|
||||
* - SCEN bit in the USART_CR3 register,
|
||||
* - IREN bit in the USART_CR3 register,
|
||||
* - HDSEL bit in the USART_CR3 register.
|
||||
* This function also set the UART/USART in LIN mode.
|
||||
* @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
|
||||
* LIN feature is supported by the USARTx instance.
|
||||
* @note Call of this function is equivalent to following function call sequence :
|
||||
* - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
|
||||
* - Clear STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
|
||||
* - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
|
||||
* - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
|
||||
* - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
|
||||
* - Set LINEN in CR2 using @ref LL_USART_EnableLIN() function
|
||||
* @note Other remaining configurations items related to LIN Mode
|
||||
* (as Baud Rate, Word length, LIN Break Detection Length, ...) should be set using
|
||||
* dedicated functions
|
||||
* @rmtoll CR2 CLKEN LL_USART_ConfigLINMode\n
|
||||
* CR2 STOP LL_USART_ConfigLINMode\n
|
||||
* CR2 LINEN LL_USART_ConfigLINMode\n
|
||||
* CR3 IREN LL_USART_ConfigLINMode\n
|
||||
* CR3 SCEN LL_USART_ConfigLINMode\n
|
||||
* CR3 HDSEL LL_USART_ConfigLINMode
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_ConfigLINMode(USART_TypeDef *USARTx)
|
||||
{
|
||||
/* In LIN mode, the following bits must be kept cleared:
|
||||
- STOP and CLKEN bits in the USART_CR2 register,
|
||||
- IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
|
||||
CLEAR_BIT(USARTx->CR2, (USART_CR2_CLKEN | USART_CR2_STOP));
|
||||
CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL));
|
||||
/* Set the UART/USART in LIN mode */
|
||||
SET_BIT(USARTx->CR2, USART_CR2_LINEN);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Perform basic configuration of USART for enabling use in Half Duplex Mode
|
||||
* @note In Half Duplex mode, the following bits must be kept cleared:
|
||||
* - LINEN bit in the USART_CR2 register,
|
||||
* - CLKEN bit in the USART_CR2 register,
|
||||
* - SCEN bit in the USART_CR3 register,
|
||||
* - IREN bit in the USART_CR3 register,
|
||||
* This function also sets the UART/USART in Half Duplex mode.
|
||||
* @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Half-Duplex mode is supported by the USARTx instance.
|
||||
* @note Call of this function is equivalent to following function call sequence :
|
||||
* - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
|
||||
* - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
|
||||
* - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
|
||||
* - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
|
||||
* - Set HDSEL in CR3 using @ref LL_USART_EnableHalfDuplex() function
|
||||
* @note Other remaining configurations items related to Half Duplex Mode
|
||||
* (as Baud Rate, Word length, Parity, ...) should be set using
|
||||
* dedicated functions
|
||||
* @rmtoll CR2 LINEN LL_USART_ConfigHalfDuplexMode\n
|
||||
* CR2 CLKEN LL_USART_ConfigHalfDuplexMode\n
|
||||
* CR3 HDSEL LL_USART_ConfigHalfDuplexMode\n
|
||||
* CR3 SCEN LL_USART_ConfigHalfDuplexMode\n
|
||||
* CR3 IREN LL_USART_ConfigHalfDuplexMode
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx)
|
||||
{
|
||||
/* In Half Duplex mode, the following bits must be kept cleared:
|
||||
- LINEN and CLKEN bits in the USART_CR2 register,
|
||||
- SCEN and IREN bits in the USART_CR3 register.*/
|
||||
CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
|
||||
CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN));
|
||||
/* set the UART/USART in Half Duplex mode */
|
||||
SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Perform basic configuration of USART for enabling use in Smartcard Mode
|
||||
* @note In Smartcard mode, the following bits must be kept cleared:
|
||||
* - LINEN bit in the USART_CR2 register,
|
||||
* - IREN bit in the USART_CR3 register,
|
||||
* - HDSEL bit in the USART_CR3 register.
|
||||
* This function also configures Stop bits to 1.5 bits and
|
||||
* sets the USART in Smartcard mode (SCEN bit).
|
||||
* Clock Output is also enabled (CLKEN).
|
||||
* @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Smartcard feature is supported by the USARTx instance.
|
||||
* @note Call of this function is equivalent to following function call sequence :
|
||||
* - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
|
||||
* - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
|
||||
* - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
|
||||
* - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
|
||||
* - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
|
||||
* - Set SCEN in CR3 using @ref LL_USART_EnableSmartcard() function
|
||||
* @note Other remaining configurations items related to Smartcard Mode
|
||||
* (as Baud Rate, Word length, Parity, ...) should be set using
|
||||
* dedicated functions
|
||||
* @rmtoll CR2 LINEN LL_USART_ConfigSmartcardMode\n
|
||||
* CR2 STOP LL_USART_ConfigSmartcardMode\n
|
||||
* CR2 CLKEN LL_USART_ConfigSmartcardMode\n
|
||||
* CR3 HDSEL LL_USART_ConfigSmartcardMode\n
|
||||
* CR3 SCEN LL_USART_ConfigSmartcardMode
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx)
|
||||
{
|
||||
/* In Smartcard mode, the following bits must be kept cleared:
|
||||
- LINEN bit in the USART_CR2 register,
|
||||
- IREN and HDSEL bits in the USART_CR3 register.*/
|
||||
CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
|
||||
CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL));
|
||||
/* Configure Stop bits to 1.5 bits */
|
||||
/* Synchronous mode is activated by default */
|
||||
SET_BIT(USARTx->CR2, (USART_CR2_STOP_0 | USART_CR2_STOP_1 | USART_CR2_CLKEN));
|
||||
/* set the UART/USART in Smartcard mode */
|
||||
SET_BIT(USARTx->CR3, USART_CR3_SCEN);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Perform basic configuration of USART for enabling use in Irda Mode
|
||||
* @note In IRDA mode, the following bits must be kept cleared:
|
||||
* - LINEN bit in the USART_CR2 register,
|
||||
* - STOP and CLKEN bits in the USART_CR2 register,
|
||||
* - SCEN bit in the USART_CR3 register,
|
||||
* - HDSEL bit in the USART_CR3 register.
|
||||
* This function also sets the UART/USART in IRDA mode (IREN bit).
|
||||
* @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
|
||||
* IrDA feature is supported by the USARTx instance.
|
||||
* @note Call of this function is equivalent to following function call sequence :
|
||||
* - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
|
||||
* - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
|
||||
* - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
|
||||
* - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
|
||||
* - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
|
||||
* - Set IREN in CR3 using @ref LL_USART_EnableIrda() function
|
||||
* @note Other remaining configurations items related to Irda Mode
|
||||
* (as Baud Rate, Word length, Power mode, ...) should be set using
|
||||
* dedicated functions
|
||||
* @rmtoll CR2 LINEN LL_USART_ConfigIrdaMode\n
|
||||
* CR2 CLKEN LL_USART_ConfigIrdaMode\n
|
||||
* CR2 STOP LL_USART_ConfigIrdaMode\n
|
||||
* CR3 SCEN LL_USART_ConfigIrdaMode\n
|
||||
* CR3 HDSEL LL_USART_ConfigIrdaMode\n
|
||||
* CR3 IREN LL_USART_ConfigIrdaMode
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_ConfigIrdaMode(USART_TypeDef *USARTx)
|
||||
{
|
||||
/* In IRDA mode, the following bits must be kept cleared:
|
||||
- LINEN, STOP and CLKEN bits in the USART_CR2 register,
|
||||
- SCEN and HDSEL bits in the USART_CR3 register.*/
|
||||
CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP));
|
||||
CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));
|
||||
/* set the UART/USART in IRDA mode */
|
||||
SET_BIT(USARTx->CR3, USART_CR3_IREN);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Perform basic configuration of USART for enabling use in Multi processor Mode
|
||||
* (several USARTs connected in a network, one of the USARTs can be the master,
|
||||
* its TX output connected to the RX inputs of the other slaves USARTs).
|
||||
* @note In MultiProcessor mode, the following bits must be kept cleared:
|
||||
* - LINEN bit in the USART_CR2 register,
|
||||
* - CLKEN bit in the USART_CR2 register,
|
||||
* - SCEN bit in the USART_CR3 register,
|
||||
* - IREN bit in the USART_CR3 register,
|
||||
* - HDSEL bit in the USART_CR3 register.
|
||||
* @note Call of this function is equivalent to following function call sequence :
|
||||
* - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
|
||||
* - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
|
||||
* - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
|
||||
* - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
|
||||
* - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
|
||||
* @note Other remaining configurations items related to Multi processor Mode
|
||||
* (as Baud Rate, Wake Up Method, Node address, ...) should be set using
|
||||
* dedicated functions
|
||||
* @rmtoll CR2 LINEN LL_USART_ConfigMultiProcessMode\n
|
||||
* CR2 CLKEN LL_USART_ConfigMultiProcessMode\n
|
||||
* CR3 SCEN LL_USART_ConfigMultiProcessMode\n
|
||||
* CR3 HDSEL LL_USART_ConfigMultiProcessMode\n
|
||||
* CR3 IREN LL_USART_ConfigMultiProcessMode
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx)
|
||||
{
|
||||
/* In Multi Processor mode, the following bits must be kept cleared:
|
||||
- LINEN and CLKEN bits in the USART_CR2 register,
|
||||
- IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
|
||||
CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
|
||||
CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EF_FLAG_Management FLAG_Management
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Check if the USART Parity Error Flag is set or not
|
||||
* @rmtoll SR PE LL_USART_IsActiveFlag_PE
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->SR, USART_SR_PE) == (USART_SR_PE));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the USART Framing Error Flag is set or not
|
||||
* @rmtoll SR FE LL_USART_IsActiveFlag_FE
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->SR, USART_SR_FE) == (USART_SR_FE));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the USART Noise error detected Flag is set or not
|
||||
* @rmtoll SR NF LL_USART_IsActiveFlag_NE
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->SR, USART_SR_NE) == (USART_SR_NE));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the USART OverRun Error Flag is set or not
|
||||
* @rmtoll SR ORE LL_USART_IsActiveFlag_ORE
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->SR, USART_SR_ORE) == (USART_SR_ORE));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the USART IDLE line detected Flag is set or not
|
||||
* @rmtoll SR IDLE LL_USART_IsActiveFlag_IDLE
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->SR, USART_SR_IDLE) == (USART_SR_IDLE));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the USART Read Data Register Not Empty Flag is set or not
|
||||
* @rmtoll SR RXNE LL_USART_IsActiveFlag_RXNE
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->SR, USART_SR_RXNE) == (USART_SR_RXNE));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the USART Transmission Complete Flag is set or not
|
||||
* @rmtoll SR TC LL_USART_IsActiveFlag_TC
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->SR, USART_SR_TC) == (USART_SR_TC));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the USART Transmit Data Register Empty Flag is set or not
|
||||
* @rmtoll SR TXE LL_USART_IsActiveFlag_TXE
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->SR, USART_SR_TXE) == (USART_SR_TXE));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the USART LIN Break Detection Flag is set or not
|
||||
* @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
|
||||
* LIN feature is supported by the USARTx instance.
|
||||
* @rmtoll SR LBD LL_USART_IsActiveFlag_LBD
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->SR, USART_SR_LBD) == (USART_SR_LBD));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the USART CTS Flag is set or not
|
||||
* @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Hardware Flow control feature is supported by the USARTx instance.
|
||||
* @rmtoll SR CTS LL_USART_IsActiveFlag_nCTS
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->SR, USART_SR_CTS) == (USART_SR_CTS));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the USART Send Break Flag is set or not
|
||||
* @rmtoll CR1 SBK LL_USART_IsActiveFlag_SBK
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR1, USART_CR1_SBK) == (USART_CR1_SBK));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the USART Receive Wake Up from mute mode Flag is set or not
|
||||
* @rmtoll CR1 RWU LL_USART_IsActiveFlag_RWU
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR1, USART_CR1_RWU) == (USART_CR1_RWU));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clear Parity Error Flag
|
||||
* @note Clearing this flag is done by a read access to the USARTx_SR
|
||||
* register followed by a read access to the USARTx_DR register.
|
||||
* @note Please also consider that when clearing this flag, other flags as
|
||||
* NE, FE, ORE, IDLE would also be cleared.
|
||||
* @rmtoll SR PE LL_USART_ClearFlag_PE
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_ClearFlag_PE(USART_TypeDef *USARTx)
|
||||
{
|
||||
__IO uint32_t tmpreg;
|
||||
tmpreg = USARTx->SR;
|
||||
(void) tmpreg;
|
||||
tmpreg = USARTx->DR;
|
||||
(void) tmpreg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clear Framing Error Flag
|
||||
* @note Clearing this flag is done by a read access to the USARTx_SR
|
||||
* register followed by a read access to the USARTx_DR register.
|
||||
* @note Please also consider that when clearing this flag, other flags as
|
||||
* PE, NE, ORE, IDLE would also be cleared.
|
||||
* @rmtoll SR FE LL_USART_ClearFlag_FE
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_ClearFlag_FE(USART_TypeDef *USARTx)
|
||||
{
|
||||
__IO uint32_t tmpreg;
|
||||
tmpreg = USARTx->SR;
|
||||
(void) tmpreg;
|
||||
tmpreg = USARTx->DR;
|
||||
(void) tmpreg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clear Noise detected Flag
|
||||
* @note Clearing this flag is done by a read access to the USARTx_SR
|
||||
* register followed by a read access to the USARTx_DR register.
|
||||
* @note Please also consider that when clearing this flag, other flags as
|
||||
* PE, FE, ORE, IDLE would also be cleared.
|
||||
* @rmtoll SR NF LL_USART_ClearFlag_NE
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_ClearFlag_NE(USART_TypeDef *USARTx)
|
||||
{
|
||||
__IO uint32_t tmpreg;
|
||||
tmpreg = USARTx->SR;
|
||||
(void) tmpreg;
|
||||
tmpreg = USARTx->DR;
|
||||
(void) tmpreg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clear OverRun Error Flag
|
||||
* @note Clearing this flag is done by a read access to the USARTx_SR
|
||||
* register followed by a read access to the USARTx_DR register.
|
||||
* @note Please also consider that when clearing this flag, other flags as
|
||||
* PE, NE, FE, IDLE would also be cleared.
|
||||
* @rmtoll SR ORE LL_USART_ClearFlag_ORE
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_ClearFlag_ORE(USART_TypeDef *USARTx)
|
||||
{
|
||||
__IO uint32_t tmpreg;
|
||||
tmpreg = USARTx->SR;
|
||||
(void) tmpreg;
|
||||
tmpreg = USARTx->DR;
|
||||
(void) tmpreg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clear IDLE line detected Flag
|
||||
* @note Clearing this flag is done by a read access to the USARTx_SR
|
||||
* register followed by a read access to the USARTx_DR register.
|
||||
* @note Please also consider that when clearing this flag, other flags as
|
||||
* PE, NE, FE, ORE would also be cleared.
|
||||
* @rmtoll SR IDLE LL_USART_ClearFlag_IDLE
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_ClearFlag_IDLE(USART_TypeDef *USARTx)
|
||||
{
|
||||
__IO uint32_t tmpreg;
|
||||
tmpreg = USARTx->SR;
|
||||
(void) tmpreg;
|
||||
tmpreg = USARTx->DR;
|
||||
(void) tmpreg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clear Transmission Complete Flag
|
||||
* @rmtoll SR TC LL_USART_ClearFlag_TC
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx)
|
||||
{
|
||||
WRITE_REG(USARTx->SR, ~(USART_SR_TC));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clear RX Not Empty Flag
|
||||
* @rmtoll SR RXNE LL_USART_ClearFlag_RXNE
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_ClearFlag_RXNE(USART_TypeDef *USARTx)
|
||||
{
|
||||
WRITE_REG(USARTx->SR, ~(USART_SR_RXNE));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clear LIN Break Detection Flag
|
||||
* @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
|
||||
* LIN feature is supported by the USARTx instance.
|
||||
* @rmtoll SR LBD LL_USART_ClearFlag_LBD
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx)
|
||||
{
|
||||
WRITE_REG(USARTx->SR, ~(USART_SR_LBD));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clear CTS Interrupt Flag
|
||||
* @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Hardware Flow control feature is supported by the USARTx instance.
|
||||
* @rmtoll SR CTS LL_USART_ClearFlag_nCTS
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx)
|
||||
{
|
||||
WRITE_REG(USARTx->SR, ~(USART_SR_CTS));
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EF_IT_Management IT_Management
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Enable IDLE Interrupt
|
||||
* @rmtoll CR1 IDLEIE LL_USART_EnableIT_IDLE
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_IDLEIE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable RX Not Empty Interrupt
|
||||
* @rmtoll CR1 RXNEIE LL_USART_EnableIT_RXNE
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_EnableIT_RXNE(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RXNEIE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable Transmission Complete Interrupt
|
||||
* @rmtoll CR1 TCIE LL_USART_EnableIT_TC
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TCIE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable TX Empty Interrupt
|
||||
* @rmtoll CR1 TXEIE LL_USART_EnableIT_TXE
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_EnableIT_TXE(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TXEIE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable Parity Error Interrupt
|
||||
* @rmtoll CR1 PEIE LL_USART_EnableIT_PE
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_PEIE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable LIN Break Detection Interrupt
|
||||
* @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
|
||||
* LIN feature is supported by the USARTx instance.
|
||||
* @rmtoll CR2 LBDIE LL_USART_EnableIT_LBD
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_EnableIT_LBD(USART_TypeDef *USARTx)
|
||||
{
|
||||
SET_BIT(USARTx->CR2, USART_CR2_LBDIE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable Error Interrupt
|
||||
* @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
|
||||
* error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_SR register).
|
||||
* 0: Interrupt is inhibited
|
||||
* 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_SR register.
|
||||
* @rmtoll CR3 EIE LL_USART_EnableIT_ERROR
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_EIE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable CTS Interrupt
|
||||
* @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Hardware Flow control feature is supported by the USARTx instance.
|
||||
* @rmtoll CR3 CTSIE LL_USART_EnableIT_CTS
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_CTSIE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable IDLE Interrupt
|
||||
* @rmtoll CR1 IDLEIE LL_USART_DisableIT_IDLE
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable RX Not Empty Interrupt
|
||||
* @rmtoll CR1 RXNEIE LL_USART_DisableIT_RXNE
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_DisableIT_RXNE(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable Transmission Complete Interrupt
|
||||
* @rmtoll CR1 TCIE LL_USART_DisableIT_TC
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TCIE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable TX Empty Interrupt
|
||||
* @rmtoll CR1 TXEIE LL_USART_DisableIT_TXE
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable Parity Error Interrupt
|
||||
* @rmtoll CR1 PEIE LL_USART_DisableIT_PE
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable LIN Break Detection Interrupt
|
||||
* @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
|
||||
* LIN feature is supported by the USARTx instance.
|
||||
* @rmtoll CR2 LBDIE LL_USART_DisableIT_LBD
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_DisableIT_LBD(USART_TypeDef *USARTx)
|
||||
{
|
||||
CLEAR_BIT(USARTx->CR2, USART_CR2_LBDIE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable Error Interrupt
|
||||
* @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
|
||||
* error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_SR register).
|
||||
* 0: Interrupt is inhibited
|
||||
* 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_SR register.
|
||||
* @rmtoll CR3 EIE LL_USART_DisableIT_ERROR
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable CTS Interrupt
|
||||
* @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Hardware Flow control feature is supported by the USARTx instance.
|
||||
* @rmtoll CR3 CTSIE LL_USART_DisableIT_CTS
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the USART IDLE Interrupt source is enabled or disabled.
|
||||
* @rmtoll CR1 IDLEIE LL_USART_IsEnabledIT_IDLE
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the USART RX Not Empty Interrupt is enabled or disabled.
|
||||
* @rmtoll CR1 RXNEIE LL_USART_IsEnabledIT_RXNE
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the USART Transmission Complete Interrupt is enabled or disabled.
|
||||
* @rmtoll CR1 TCIE LL_USART_IsEnabledIT_TC
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the USART TX Empty Interrupt is enabled or disabled.
|
||||
* @rmtoll CR1 TXEIE LL_USART_IsEnabledIT_TXE
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the USART Parity Error Interrupt is enabled or disabled.
|
||||
* @rmtoll CR1 PEIE LL_USART_IsEnabledIT_PE
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the USART LIN Break Detection Interrupt is enabled or disabled.
|
||||
* @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
|
||||
* LIN feature is supported by the USARTx instance.
|
||||
* @rmtoll CR2 LBDIE LL_USART_IsEnabledIT_LBD
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the USART Error Interrupt is enabled or disabled.
|
||||
* @rmtoll CR3 EIE LL_USART_IsEnabledIT_ERROR
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the USART CTS Interrupt is enabled or disabled.
|
||||
* @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
|
||||
* Hardware Flow control feature is supported by the USARTx instance.
|
||||
* @rmtoll CR3 CTSIE LL_USART_IsEnabledIT_CTS
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE));
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EF_DMA_Management DMA_Management
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Enable DMA Mode for reception
|
||||
* @rmtoll CR3 DMAR LL_USART_EnableDMAReq_RX
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAR);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable DMA Mode for reception
|
||||
* @rmtoll CR3 DMAR LL_USART_DisableDMAReq_RX
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if DMA Mode is enabled for reception
|
||||
* @rmtoll CR3 DMAR LL_USART_IsEnabledDMAReq_RX
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable DMA Mode for transmission
|
||||
* @rmtoll CR3 DMAT LL_USART_EnableDMAReq_TX
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable DMA Mode for transmission
|
||||
* @rmtoll CR3 DMAT LL_USART_DisableDMAReq_TX
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx)
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if DMA Mode is enabled for transmission
|
||||
* @rmtoll CR3 DMAT LL_USART_IsEnabledDMAReq_TX
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_TX(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get the data register address used for DMA transfer
|
||||
* @rmtoll DR DR LL_USART_DMA_GetRegAddr
|
||||
* @note Address of Data Register is valid for both Transmit and Receive transfers.
|
||||
* @param USARTx USART Instance
|
||||
* @retval Address of data register
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(const USART_TypeDef *USARTx)
|
||||
{
|
||||
/* return address of DR register */
|
||||
return ((uint32_t) &(USARTx->DR));
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EF_Data_Management Data_Management
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Read Receiver Data register (Receive Data value, 8 bits)
|
||||
* @rmtoll DR DR LL_USART_ReceiveData8
|
||||
* @param USARTx USART Instance
|
||||
* @retval Value between Min_Data=0x00 and Max_Data=0xFF
|
||||
*/
|
||||
__STATIC_INLINE uint8_t LL_USART_ReceiveData8(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (uint8_t)(READ_BIT(USARTx->DR, USART_DR_DR));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Read Receiver Data register (Receive Data value, 9 bits)
|
||||
* @rmtoll DR DR LL_USART_ReceiveData9
|
||||
* @param USARTx USART Instance
|
||||
* @retval Value between Min_Data=0x00 and Max_Data=0x1FF
|
||||
*/
|
||||
__STATIC_INLINE uint16_t LL_USART_ReceiveData9(const USART_TypeDef *USARTx)
|
||||
{
|
||||
return (uint16_t)(READ_BIT(USARTx->DR, USART_DR_DR));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Write in Transmitter Data Register (Transmit Data value, 8 bits)
|
||||
* @rmtoll DR DR LL_USART_TransmitData8
|
||||
* @param USARTx USART Instance
|
||||
* @param Value between Min_Data=0x00 and Max_Data=0xFF
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value)
|
||||
{
|
||||
USARTx->DR = Value;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Write in Transmitter Data Register (Transmit Data value, 9 bits)
|
||||
* @rmtoll DR DR LL_USART_TransmitData9
|
||||
* @param USARTx USART Instance
|
||||
* @param Value between Min_Data=0x00 and Max_Data=0x1FF
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_TransmitData9(USART_TypeDef *USARTx, uint16_t Value)
|
||||
{
|
||||
USARTx->DR = Value & 0x1FFU;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LL_EF_Execution Execution
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Request Break sending
|
||||
* @rmtoll CR1 SBK LL_USART_RequestBreakSending
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_RequestBreakSending(USART_TypeDef *USARTx)
|
||||
{
|
||||
SET_BIT(USARTx->CR1, USART_CR1_SBK);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Put USART in Mute mode
|
||||
* @rmtoll CR1 RWU LL_USART_RequestEnterMuteMode
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_RequestEnterMuteMode(USART_TypeDef *USARTx)
|
||||
{
|
||||
SET_BIT(USARTx->CR1, USART_CR1_RWU);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Put USART in Active mode
|
||||
* @rmtoll CR1 RWU LL_USART_RequestExitMuteMode
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_RequestExitMuteMode(USART_TypeDef *USARTx)
|
||||
{
|
||||
CLEAR_BIT(USARTx->CR1, USART_CR1_RWU);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if defined(USE_FULL_LL_DRIVER)
|
||||
/** @defgroup USART_LL_EF_Init Initialization and de-initialization functions
|
||||
* @{
|
||||
*/
|
||||
ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx);
|
||||
ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, const LL_USART_InitTypeDef *USART_InitStruct);
|
||||
void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct);
|
||||
ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, const LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
|
||||
void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* USE_FULL_LL_DRIVER */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* USART1 || USART2 || USART3 || UART4 || UART5 */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F1xx_LL_USART_H */
|
||||
|
||||
3771
diode_tester/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c
Normal file
3771
diode_tester/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c
Normal file
@@ -0,0 +1,3771 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f1xx_hal_uart.c
|
||||
* @author MCD Application Team
|
||||
* @brief UART HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART).
|
||||
* + Initialization and de-initialization functions
|
||||
* + IO operation functions
|
||||
* + Peripheral Control functions
|
||||
* + Peripheral State and Errors functions
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### How to use this driver #####
|
||||
==============================================================================
|
||||
[..]
|
||||
The UART HAL driver can be used as follows:
|
||||
|
||||
(#) Declare a UART_HandleTypeDef handle structure (eg. UART_HandleTypeDef huart).
|
||||
(#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API:
|
||||
(##) Enable the USARTx interface clock.
|
||||
(##) UART pins configuration:
|
||||
(+++) Enable the clock for the UART GPIOs.
|
||||
(+++) Configure the UART TX/RX pins as alternate function pull-up.
|
||||
(##) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT()
|
||||
and HAL_UART_Receive_IT() APIs):
|
||||
(+++) Configure the USARTx interrupt priority.
|
||||
(+++) Enable the NVIC USART IRQ handle.
|
||||
(##) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA()
|
||||
and HAL_UART_Receive_DMA() APIs):
|
||||
(+++) Declare a DMA handle structure for the Tx/Rx channel.
|
||||
(+++) Enable the DMAx interface clock.
|
||||
(+++) Configure the declared DMA handle structure with the required
|
||||
Tx/Rx parameters.
|
||||
(+++) Configure the DMA Tx/Rx channel.
|
||||
(+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle.
|
||||
(+++) Configure the priority and enable the NVIC for the transfer complete
|
||||
interrupt on the DMA Tx/Rx channel.
|
||||
(+++) Configure the USARTx interrupt priority and enable the NVIC USART IRQ handle
|
||||
(used for last byte sending completion detection in DMA non circular mode)
|
||||
|
||||
(#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
|
||||
flow control and Mode(Receiver/Transmitter) in the huart Init structure.
|
||||
|
||||
(#) For the UART asynchronous mode, initialize the UART registers by calling
|
||||
the HAL_UART_Init() API.
|
||||
|
||||
(#) For the UART Half duplex mode, initialize the UART registers by calling
|
||||
the HAL_HalfDuplex_Init() API.
|
||||
|
||||
(#) For the LIN mode, initialize the UART registers by calling the HAL_LIN_Init() API.
|
||||
|
||||
(#) For the Multi-Processor mode, initialize the UART registers by calling
|
||||
the HAL_MultiProcessor_Init() API.
|
||||
|
||||
[..]
|
||||
(@) The specific UART interrupts (Transmission complete interrupt,
|
||||
RXNE interrupt and Error Interrupts) will be managed using the macros
|
||||
__HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT() inside the transmit
|
||||
and receive process.
|
||||
|
||||
[..]
|
||||
(@) These APIs (HAL_UART_Init() and HAL_HalfDuplex_Init()) configure also the
|
||||
low level Hardware GPIO, CLOCK, CORTEX...etc) by calling the customized
|
||||
HAL_UART_MspInit() API.
|
||||
|
||||
##### Callback registration #####
|
||||
==================================
|
||||
|
||||
[..]
|
||||
The compilation define USE_HAL_UART_REGISTER_CALLBACKS when set to 1
|
||||
allows the user to configure dynamically the driver callbacks.
|
||||
|
||||
[..]
|
||||
Use Function HAL_UART_RegisterCallback() to register a user callback.
|
||||
Function HAL_UART_RegisterCallback() allows to register following callbacks:
|
||||
(+) TxHalfCpltCallback : Tx Half Complete Callback.
|
||||
(+) TxCpltCallback : Tx Complete Callback.
|
||||
(+) RxHalfCpltCallback : Rx Half Complete Callback.
|
||||
(+) RxCpltCallback : Rx Complete Callback.
|
||||
(+) ErrorCallback : Error Callback.
|
||||
(+) AbortCpltCallback : Abort Complete Callback.
|
||||
(+) AbortTransmitCpltCallback : Abort Transmit Complete Callback.
|
||||
(+) AbortReceiveCpltCallback : Abort Receive Complete Callback.
|
||||
(+) MspInitCallback : UART MspInit.
|
||||
(+) MspDeInitCallback : UART MspDeInit.
|
||||
This function takes as parameters the HAL peripheral handle, the Callback ID
|
||||
and a pointer to the user callback function.
|
||||
|
||||
[..]
|
||||
Use function HAL_UART_UnRegisterCallback() to reset a callback to the default
|
||||
weak (surcharged) function.
|
||||
HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle,
|
||||
and the Callback ID.
|
||||
This function allows to reset following callbacks:
|
||||
(+) TxHalfCpltCallback : Tx Half Complete Callback.
|
||||
(+) TxCpltCallback : Tx Complete Callback.
|
||||
(+) RxHalfCpltCallback : Rx Half Complete Callback.
|
||||
(+) RxCpltCallback : Rx Complete Callback.
|
||||
(+) ErrorCallback : Error Callback.
|
||||
(+) AbortCpltCallback : Abort Complete Callback.
|
||||
(+) AbortTransmitCpltCallback : Abort Transmit Complete Callback.
|
||||
(+) AbortReceiveCpltCallback : Abort Receive Complete Callback.
|
||||
(+) MspInitCallback : UART MspInit.
|
||||
(+) MspDeInitCallback : UART MspDeInit.
|
||||
|
||||
[..]
|
||||
For specific callback RxEventCallback, use dedicated registration/reset functions:
|
||||
respectively HAL_UART_RegisterRxEventCallback() , HAL_UART_UnRegisterRxEventCallback().
|
||||
|
||||
[..]
|
||||
By default, after the HAL_UART_Init() and when the state is HAL_UART_STATE_RESET
|
||||
all callbacks are set to the corresponding weak (surcharged) functions:
|
||||
examples HAL_UART_TxCpltCallback(), HAL_UART_RxHalfCpltCallback().
|
||||
Exception done for MspInit and MspDeInit functions that are respectively
|
||||
reset to the legacy weak (surcharged) functions in the HAL_UART_Init()
|
||||
and HAL_UART_DeInit() only when these callbacks are null (not registered beforehand).
|
||||
If not, MspInit or MspDeInit are not null, the HAL_UART_Init() and HAL_UART_DeInit()
|
||||
keep and use the user MspInit/MspDeInit callbacks (registered beforehand).
|
||||
|
||||
[..]
|
||||
Callbacks can be registered/unregistered in HAL_UART_STATE_READY state only.
|
||||
Exception done MspInit/MspDeInit that can be registered/unregistered
|
||||
in HAL_UART_STATE_READY or HAL_UART_STATE_RESET state, thus registered (user)
|
||||
MspInit/DeInit callbacks can be used during the Init/DeInit.
|
||||
In that case first register the MspInit/MspDeInit user callbacks
|
||||
using HAL_UART_RegisterCallback() before calling HAL_UART_DeInit()
|
||||
or HAL_UART_Init() function.
|
||||
|
||||
[..]
|
||||
When The compilation define USE_HAL_UART_REGISTER_CALLBACKS is set to 0 or
|
||||
not defined, the callback registration feature is not available
|
||||
and weak (surcharged) callbacks are used.
|
||||
|
||||
[..]
|
||||
Three operation modes are available within this driver :
|
||||
|
||||
*** Polling mode IO operation ***
|
||||
=================================
|
||||
[..]
|
||||
(+) Send an amount of data in blocking mode using HAL_UART_Transmit()
|
||||
(+) Receive an amount of data in blocking mode using HAL_UART_Receive()
|
||||
|
||||
*** Interrupt mode IO operation ***
|
||||
===================================
|
||||
[..]
|
||||
(+) Send an amount of data in non blocking mode using HAL_UART_Transmit_IT()
|
||||
(+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
|
||||
add his own code by customization of function pointer HAL_UART_TxCpltCallback
|
||||
(+) Receive an amount of data in non blocking mode using HAL_UART_Receive_IT()
|
||||
(+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
|
||||
add his own code by customization of function pointer HAL_UART_RxCpltCallback
|
||||
(+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
|
||||
add his own code by customization of function pointer HAL_UART_ErrorCallback
|
||||
|
||||
*** DMA mode IO operation ***
|
||||
==============================
|
||||
[..]
|
||||
(+) Send an amount of data in non blocking mode (DMA) using HAL_UART_Transmit_DMA()
|
||||
(+) At transmission end of half transfer HAL_UART_TxHalfCpltCallback is executed and user can
|
||||
add his own code by customization of function pointer HAL_UART_TxHalfCpltCallback
|
||||
(+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
|
||||
add his own code by customization of function pointer HAL_UART_TxCpltCallback
|
||||
(+) Receive an amount of data in non blocking mode (DMA) using HAL_UART_Receive_DMA()
|
||||
(+) At reception end of half transfer HAL_UART_RxHalfCpltCallback is executed and user can
|
||||
add his own code by customization of function pointer HAL_UART_RxHalfCpltCallback
|
||||
(+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
|
||||
add his own code by customization of function pointer HAL_UART_RxCpltCallback
|
||||
(+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
|
||||
add his own code by customization of function pointer HAL_UART_ErrorCallback
|
||||
(+) Pause the DMA Transfer using HAL_UART_DMAPause()
|
||||
(+) Resume the DMA Transfer using HAL_UART_DMAResume()
|
||||
(+) Stop the DMA Transfer using HAL_UART_DMAStop()
|
||||
|
||||
|
||||
[..] This subsection also provides a set of additional functions providing enhanced reception
|
||||
services to user. (For example, these functions allow application to handle use cases
|
||||
where number of data to be received is unknown).
|
||||
|
||||
(#) Compared to standard reception services which only consider number of received
|
||||
data elements as reception completion criteria, these functions also consider additional events
|
||||
as triggers for updating reception status to caller :
|
||||
(+) Detection of inactivity period (RX line has not been active for a given period).
|
||||
(++) RX inactivity detected by IDLE event, i.e. RX line has been in idle state (normally high state)
|
||||
for 1 frame time, after last received byte.
|
||||
|
||||
(#) There are two mode of transfer:
|
||||
(+) Blocking mode: The reception is performed in polling mode, until either expected number of data is received,
|
||||
or till IDLE event occurs. Reception is handled only during function execution.
|
||||
When function exits, no data reception could occur. HAL status and number of actually received data elements,
|
||||
are returned by function after finishing transfer.
|
||||
(+) Non-Blocking mode: The reception is performed using Interrupts or DMA.
|
||||
These API's return the HAL status.
|
||||
The end of the data processing will be indicated through the
|
||||
dedicated UART IRQ when using Interrupt mode or the DMA IRQ when using DMA mode.
|
||||
The HAL_UARTEx_RxEventCallback() user callback will be executed during Receive process
|
||||
The HAL_UART_ErrorCallback()user callback will be executed when a reception error is detected.
|
||||
|
||||
(#) Blocking mode API:
|
||||
(+) HAL_UARTEx_ReceiveToIdle()
|
||||
|
||||
(#) Non-Blocking mode API with Interrupt:
|
||||
(+) HAL_UARTEx_ReceiveToIdle_IT()
|
||||
|
||||
(#) Non-Blocking mode API with DMA:
|
||||
(+) HAL_UARTEx_ReceiveToIdle_DMA()
|
||||
|
||||
|
||||
*** UART HAL driver macros list ***
|
||||
=============================================
|
||||
[..]
|
||||
Below the list of most used macros in UART HAL driver.
|
||||
|
||||
(+) __HAL_UART_ENABLE: Enable the UART peripheral
|
||||
(+) __HAL_UART_DISABLE: Disable the UART peripheral
|
||||
(+) __HAL_UART_GET_FLAG : Check whether the specified UART flag is set or not
|
||||
(+) __HAL_UART_CLEAR_FLAG : Clear the specified UART pending flag
|
||||
(+) __HAL_UART_ENABLE_IT: Enable the specified UART interrupt
|
||||
(+) __HAL_UART_DISABLE_IT: Disable the specified UART interrupt
|
||||
(+) __HAL_UART_GET_IT_SOURCE: Check whether the specified UART interrupt has occurred or not
|
||||
|
||||
[..]
|
||||
(@) You can refer to the UART HAL driver header file for more useful macros
|
||||
|
||||
@endverbatim
|
||||
[..]
|
||||
(@) Additional remark: If the parity is enabled, then the MSB bit of the data written
|
||||
in the data register is transmitted but is changed by the parity bit.
|
||||
Depending on the frame length defined by the M bit (8-bits or 9-bits),
|
||||
the possible UART frame formats are as listed in the following table:
|
||||
+-------------------------------------------------------------+
|
||||
| M bit | PCE bit | UART frame |
|
||||
|---------------------|---------------------------------------|
|
||||
| 0 | 0 | | SB | 8 bit data | STB | |
|
||||
|---------|-----------|---------------------------------------|
|
||||
| 0 | 1 | | SB | 7 bit data | PB | STB | |
|
||||
|---------|-----------|---------------------------------------|
|
||||
| 1 | 0 | | SB | 9 bit data | STB | |
|
||||
|---------|-----------|---------------------------------------|
|
||||
| 1 | 1 | | SB | 8 bit data | PB | STB | |
|
||||
+-------------------------------------------------------------+
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f1xx_hal.h"
|
||||
|
||||
/** @addtogroup STM32F1xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup UART UART
|
||||
* @brief HAL UART module driver
|
||||
* @{
|
||||
*/
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/** @addtogroup UART_Private_Constants
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/** @addtogroup UART_Private_Functions UART Private Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
static void UART_EndTxTransfer(UART_HandleTypeDef *huart);
|
||||
static void UART_EndRxTransfer(UART_HandleTypeDef *huart);
|
||||
static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
|
||||
static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
|
||||
static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
|
||||
static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
|
||||
static void UART_DMAError(DMA_HandleTypeDef *hdma);
|
||||
static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
|
||||
static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
|
||||
static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
|
||||
static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
|
||||
static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
|
||||
static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart);
|
||||
static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart);
|
||||
static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart);
|
||||
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
|
||||
uint32_t Tickstart, uint32_t Timeout);
|
||||
static void UART_SetConfig(UART_HandleTypeDef *huart);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions ---------------------------------------------------------*/
|
||||
/** @defgroup UART_Exported_Functions UART Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @brief Initialization and Configuration functions
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### Initialization and Configuration functions #####
|
||||
===============================================================================
|
||||
[..]
|
||||
This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
|
||||
in asynchronous mode.
|
||||
(+) For the asynchronous mode only these parameters can be configured:
|
||||
(++) Baud Rate
|
||||
(++) Word Length
|
||||
(++) Stop Bit
|
||||
(++) Parity: If the parity is enabled, then the MSB bit of the data written
|
||||
in the data register is transmitted but is changed by the parity bit.
|
||||
Depending on the frame length defined by the M bit (8-bits or 9-bits),
|
||||
please refer to Reference manual for possible UART frame formats.
|
||||
(++) Hardware flow control
|
||||
(++) Receiver/transmitter modes
|
||||
(++) Over Sampling Method
|
||||
[..]
|
||||
The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init() and HAL_MultiProcessor_Init() APIs
|
||||
follow respectively the UART asynchronous, UART Half duplex, LIN and Multi-Processor configuration
|
||||
procedures (details for the procedures are available in reference manuals
|
||||
(RM0008 for STM32F10Xxx MCUs and RM0041 for STM32F100xx MCUs)).
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Initializes the UART mode according to the specified parameters in
|
||||
* the UART_InitTypeDef and create the associated handle.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Check the UART handle allocation */
|
||||
if (huart == NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Check the parameters */
|
||||
if (huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
|
||||
{
|
||||
/* The hardware flow control is available only for USART1, USART2 and USART3 */
|
||||
assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
|
||||
assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
|
||||
}
|
||||
else
|
||||
{
|
||||
assert_param(IS_UART_INSTANCE(huart->Instance));
|
||||
}
|
||||
assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
|
||||
#if defined(USART_CR1_OVER8)
|
||||
assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
|
||||
#endif /* USART_CR1_OVER8 */
|
||||
|
||||
if (huart->gState == HAL_UART_STATE_RESET)
|
||||
{
|
||||
/* Allocate lock resource and initialize it */
|
||||
huart->Lock = HAL_UNLOCKED;
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
UART_InitCallbacksToDefault(huart);
|
||||
|
||||
if (huart->MspInitCallback == NULL)
|
||||
{
|
||||
huart->MspInitCallback = HAL_UART_MspInit;
|
||||
}
|
||||
|
||||
/* Init the low level hardware */
|
||||
huart->MspInitCallback(huart);
|
||||
#else
|
||||
/* Init the low level hardware : GPIO, CLOCK */
|
||||
HAL_UART_MspInit(huart);
|
||||
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
|
||||
}
|
||||
|
||||
huart->gState = HAL_UART_STATE_BUSY;
|
||||
|
||||
/* Disable the peripheral */
|
||||
__HAL_UART_DISABLE(huart);
|
||||
|
||||
/* Set the UART Communication parameters */
|
||||
UART_SetConfig(huart);
|
||||
|
||||
/* In asynchronous mode, the following bits must be kept cleared:
|
||||
- LINEN and CLKEN bits in the USART_CR2 register,
|
||||
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
|
||||
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
|
||||
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
|
||||
|
||||
/* Enable the peripheral */
|
||||
__HAL_UART_ENABLE(huart);
|
||||
|
||||
/* Initialize the UART state */
|
||||
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the half-duplex mode according to the specified
|
||||
* parameters in the UART_InitTypeDef and create the associated handle.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Check the UART handle allocation */
|
||||
if (huart == NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance));
|
||||
assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
|
||||
#if defined(USART_CR1_OVER8)
|
||||
assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
|
||||
#endif /* USART_CR1_OVER8 */
|
||||
|
||||
if (huart->gState == HAL_UART_STATE_RESET)
|
||||
{
|
||||
/* Allocate lock resource and initialize it */
|
||||
huart->Lock = HAL_UNLOCKED;
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
UART_InitCallbacksToDefault(huart);
|
||||
|
||||
if (huart->MspInitCallback == NULL)
|
||||
{
|
||||
huart->MspInitCallback = HAL_UART_MspInit;
|
||||
}
|
||||
|
||||
/* Init the low level hardware */
|
||||
huart->MspInitCallback(huart);
|
||||
#else
|
||||
/* Init the low level hardware : GPIO, CLOCK */
|
||||
HAL_UART_MspInit(huart);
|
||||
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
|
||||
}
|
||||
|
||||
huart->gState = HAL_UART_STATE_BUSY;
|
||||
|
||||
/* Disable the peripheral */
|
||||
__HAL_UART_DISABLE(huart);
|
||||
|
||||
/* Set the UART Communication parameters */
|
||||
UART_SetConfig(huart);
|
||||
|
||||
/* In half-duplex mode, the following bits must be kept cleared:
|
||||
- LINEN and CLKEN bits in the USART_CR2 register,
|
||||
- SCEN and IREN bits in the USART_CR3 register.*/
|
||||
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
|
||||
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN));
|
||||
|
||||
/* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
|
||||
SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL);
|
||||
|
||||
/* Enable the peripheral */
|
||||
__HAL_UART_ENABLE(huart);
|
||||
|
||||
/* Initialize the UART state*/
|
||||
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the LIN mode according to the specified
|
||||
* parameters in the UART_InitTypeDef and create the associated handle.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @param BreakDetectLength Specifies the LIN break detection length.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_LINBREAKDETECTLENGTH_10B: 10-bit break detection
|
||||
* @arg UART_LINBREAKDETECTLENGTH_11B: 11-bit break detection
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
|
||||
{
|
||||
/* Check the UART handle allocation */
|
||||
if (huart == NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Check the LIN UART instance */
|
||||
assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
|
||||
|
||||
/* Check the Break detection length parameter */
|
||||
assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength));
|
||||
assert_param(IS_UART_LIN_WORD_LENGTH(huart->Init.WordLength));
|
||||
#if defined(USART_CR1_OVER8)
|
||||
assert_param(IS_UART_LIN_OVERSAMPLING(huart->Init.OverSampling));
|
||||
#endif /* USART_CR1_OVER8 */
|
||||
|
||||
if (huart->gState == HAL_UART_STATE_RESET)
|
||||
{
|
||||
/* Allocate lock resource and initialize it */
|
||||
huart->Lock = HAL_UNLOCKED;
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
UART_InitCallbacksToDefault(huart);
|
||||
|
||||
if (huart->MspInitCallback == NULL)
|
||||
{
|
||||
huart->MspInitCallback = HAL_UART_MspInit;
|
||||
}
|
||||
|
||||
/* Init the low level hardware */
|
||||
huart->MspInitCallback(huart);
|
||||
#else
|
||||
/* Init the low level hardware : GPIO, CLOCK */
|
||||
HAL_UART_MspInit(huart);
|
||||
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
|
||||
}
|
||||
|
||||
huart->gState = HAL_UART_STATE_BUSY;
|
||||
|
||||
/* Disable the peripheral */
|
||||
__HAL_UART_DISABLE(huart);
|
||||
|
||||
/* Set the UART Communication parameters */
|
||||
UART_SetConfig(huart);
|
||||
|
||||
/* In LIN mode, the following bits must be kept cleared:
|
||||
- CLKEN bits in the USART_CR2 register,
|
||||
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
|
||||
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_CLKEN));
|
||||
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN));
|
||||
|
||||
/* Enable the LIN mode by setting the LINEN bit in the CR2 register */
|
||||
SET_BIT(huart->Instance->CR2, USART_CR2_LINEN);
|
||||
|
||||
/* Set the USART LIN Break detection length. */
|
||||
CLEAR_BIT(huart->Instance->CR2, USART_CR2_LBDL);
|
||||
SET_BIT(huart->Instance->CR2, BreakDetectLength);
|
||||
|
||||
/* Enable the peripheral */
|
||||
__HAL_UART_ENABLE(huart);
|
||||
|
||||
/* Initialize the UART state*/
|
||||
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the Multi-Processor mode according to the specified
|
||||
* parameters in the UART_InitTypeDef and create the associated handle.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @param Address USART address
|
||||
* @param WakeUpMethod specifies the USART wake-up method.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_WAKEUPMETHOD_IDLELINE: Wake-up by an idle line detection
|
||||
* @arg UART_WAKEUPMETHOD_ADDRESSMARK: Wake-up by an address mark
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
|
||||
{
|
||||
/* Check the UART handle allocation */
|
||||
if (huart == NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_UART_INSTANCE(huart->Instance));
|
||||
|
||||
/* Check the Address & wake up method parameters */
|
||||
assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
|
||||
assert_param(IS_UART_ADDRESS(Address));
|
||||
assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
|
||||
#if defined(USART_CR1_OVER8)
|
||||
assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
|
||||
#endif /* USART_CR1_OVER8 */
|
||||
|
||||
if (huart->gState == HAL_UART_STATE_RESET)
|
||||
{
|
||||
/* Allocate lock resource and initialize it */
|
||||
huart->Lock = HAL_UNLOCKED;
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
UART_InitCallbacksToDefault(huart);
|
||||
|
||||
if (huart->MspInitCallback == NULL)
|
||||
{
|
||||
huart->MspInitCallback = HAL_UART_MspInit;
|
||||
}
|
||||
|
||||
/* Init the low level hardware */
|
||||
huart->MspInitCallback(huart);
|
||||
#else
|
||||
/* Init the low level hardware : GPIO, CLOCK */
|
||||
HAL_UART_MspInit(huart);
|
||||
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
|
||||
}
|
||||
|
||||
huart->gState = HAL_UART_STATE_BUSY;
|
||||
|
||||
/* Disable the peripheral */
|
||||
__HAL_UART_DISABLE(huart);
|
||||
|
||||
/* Set the UART Communication parameters */
|
||||
UART_SetConfig(huart);
|
||||
|
||||
/* In Multi-Processor mode, the following bits must be kept cleared:
|
||||
- LINEN and CLKEN bits in the USART_CR2 register,
|
||||
- SCEN, HDSEL and IREN bits in the USART_CR3 register */
|
||||
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
|
||||
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
|
||||
|
||||
/* Set the USART address node */
|
||||
CLEAR_BIT(huart->Instance->CR2, USART_CR2_ADD);
|
||||
SET_BIT(huart->Instance->CR2, Address);
|
||||
|
||||
/* Set the wake up method by setting the WAKE bit in the CR1 register */
|
||||
CLEAR_BIT(huart->Instance->CR1, USART_CR1_WAKE);
|
||||
SET_BIT(huart->Instance->CR1, WakeUpMethod);
|
||||
|
||||
/* Enable the peripheral */
|
||||
__HAL_UART_ENABLE(huart);
|
||||
|
||||
/* Initialize the UART state */
|
||||
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitializes the UART peripheral.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Check the UART handle allocation */
|
||||
if (huart == NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_UART_INSTANCE(huart->Instance));
|
||||
|
||||
huart->gState = HAL_UART_STATE_BUSY;
|
||||
|
||||
/* Disable the Peripheral */
|
||||
__HAL_UART_DISABLE(huart);
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
if (huart->MspDeInitCallback == NULL)
|
||||
{
|
||||
huart->MspDeInitCallback = HAL_UART_MspDeInit;
|
||||
}
|
||||
/* DeInit the low level hardware */
|
||||
huart->MspDeInitCallback(huart);
|
||||
#else
|
||||
/* DeInit the low level hardware */
|
||||
HAL_UART_MspDeInit(huart);
|
||||
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
|
||||
|
||||
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
huart->gState = HAL_UART_STATE_RESET;
|
||||
huart->RxState = HAL_UART_STATE_RESET;
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
||||
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||||
|
||||
/* Process Unlock */
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UART MSP Init.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(huart);
|
||||
/* NOTE: This function should not be modified, when the callback is needed,
|
||||
the HAL_UART_MspInit could be implemented in the user file
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UART MSP DeInit.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(huart);
|
||||
/* NOTE: This function should not be modified, when the callback is needed,
|
||||
the HAL_UART_MspDeInit could be implemented in the user file
|
||||
*/
|
||||
}
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief Register a User UART Callback
|
||||
* To be used instead of the weak predefined callback
|
||||
* @note The HAL_UART_RegisterCallback() may be called before HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init(),
|
||||
* HAL_MultiProcessor_Init() to register callbacks for HAL_UART_MSPINIT_CB_ID and HAL_UART_MSPDEINIT_CB_ID
|
||||
* @param huart uart handle
|
||||
* @param CallbackID ID of the callback to be registered
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref HAL_UART_TX_HALFCOMPLETE_CB_ID Tx Half Complete Callback ID
|
||||
* @arg @ref HAL_UART_TX_COMPLETE_CB_ID Tx Complete Callback ID
|
||||
* @arg @ref HAL_UART_RX_HALFCOMPLETE_CB_ID Rx Half Complete Callback ID
|
||||
* @arg @ref HAL_UART_RX_COMPLETE_CB_ID Rx Complete Callback ID
|
||||
* @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID
|
||||
* @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID
|
||||
* @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID
|
||||
* @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID
|
||||
* @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID
|
||||
* @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID
|
||||
* @param pCallback pointer to the Callback function
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID,
|
||||
pUART_CallbackTypeDef pCallback)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
if (pCallback == NULL)
|
||||
{
|
||||
/* Update the error code */
|
||||
huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
|
||||
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
if (huart->gState == HAL_UART_STATE_READY)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_UART_TX_HALFCOMPLETE_CB_ID :
|
||||
huart->TxHalfCpltCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_UART_TX_COMPLETE_CB_ID :
|
||||
huart->TxCpltCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_UART_RX_HALFCOMPLETE_CB_ID :
|
||||
huart->RxHalfCpltCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_UART_RX_COMPLETE_CB_ID :
|
||||
huart->RxCpltCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_UART_ERROR_CB_ID :
|
||||
huart->ErrorCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_UART_ABORT_COMPLETE_CB_ID :
|
||||
huart->AbortCpltCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID :
|
||||
huart->AbortTransmitCpltCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID :
|
||||
huart->AbortReceiveCpltCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_UART_MSPINIT_CB_ID :
|
||||
huart->MspInitCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_UART_MSPDEINIT_CB_ID :
|
||||
huart->MspDeInitCallback = pCallback;
|
||||
break;
|
||||
|
||||
default :
|
||||
/* Update the error code */
|
||||
huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else if (huart->gState == HAL_UART_STATE_RESET)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_UART_MSPINIT_CB_ID :
|
||||
huart->MspInitCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_UART_MSPDEINIT_CB_ID :
|
||||
huart->MspDeInitCallback = pCallback;
|
||||
break;
|
||||
|
||||
default :
|
||||
/* Update the error code */
|
||||
huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Update the error code */
|
||||
huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Unregister an UART Callback
|
||||
* UART callaback is redirected to the weak predefined callback
|
||||
* @note The HAL_UART_UnRegisterCallback() may be called before HAL_UART_Init(), HAL_HalfDuplex_Init(),
|
||||
* HAL_LIN_Init(), HAL_MultiProcessor_Init() to un-register callbacks for HAL_UART_MSPINIT_CB_ID
|
||||
* and HAL_UART_MSPDEINIT_CB_ID
|
||||
* @param huart uart handle
|
||||
* @param CallbackID ID of the callback to be unregistered
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref HAL_UART_TX_HALFCOMPLETE_CB_ID Tx Half Complete Callback ID
|
||||
* @arg @ref HAL_UART_TX_COMPLETE_CB_ID Tx Complete Callback ID
|
||||
* @arg @ref HAL_UART_RX_HALFCOMPLETE_CB_ID Rx Half Complete Callback ID
|
||||
* @arg @ref HAL_UART_RX_COMPLETE_CB_ID Rx Complete Callback ID
|
||||
* @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID
|
||||
* @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID
|
||||
* @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID
|
||||
* @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID
|
||||
* @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID
|
||||
* @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
if (HAL_UART_STATE_READY == huart->gState)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_UART_TX_HALFCOMPLETE_CB_ID :
|
||||
huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
|
||||
break;
|
||||
|
||||
case HAL_UART_TX_COMPLETE_CB_ID :
|
||||
huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */
|
||||
break;
|
||||
|
||||
case HAL_UART_RX_HALFCOMPLETE_CB_ID :
|
||||
huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
|
||||
break;
|
||||
|
||||
case HAL_UART_RX_COMPLETE_CB_ID :
|
||||
huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */
|
||||
break;
|
||||
|
||||
case HAL_UART_ERROR_CB_ID :
|
||||
huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */
|
||||
break;
|
||||
|
||||
case HAL_UART_ABORT_COMPLETE_CB_ID :
|
||||
huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
|
||||
break;
|
||||
|
||||
case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID :
|
||||
huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */
|
||||
break;
|
||||
|
||||
case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID :
|
||||
huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */
|
||||
break;
|
||||
|
||||
case HAL_UART_MSPINIT_CB_ID :
|
||||
huart->MspInitCallback = HAL_UART_MspInit; /* Legacy weak MspInitCallback */
|
||||
break;
|
||||
|
||||
case HAL_UART_MSPDEINIT_CB_ID :
|
||||
huart->MspDeInitCallback = HAL_UART_MspDeInit; /* Legacy weak MspDeInitCallback */
|
||||
break;
|
||||
|
||||
default :
|
||||
/* Update the error code */
|
||||
huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else if (HAL_UART_STATE_RESET == huart->gState)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_UART_MSPINIT_CB_ID :
|
||||
huart->MspInitCallback = HAL_UART_MspInit;
|
||||
break;
|
||||
|
||||
case HAL_UART_MSPDEINIT_CB_ID :
|
||||
huart->MspDeInitCallback = HAL_UART_MspDeInit;
|
||||
break;
|
||||
|
||||
default :
|
||||
/* Update the error code */
|
||||
huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Update the error code */
|
||||
huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Register a User UART Rx Event Callback
|
||||
* To be used instead of the weak predefined callback
|
||||
* @param huart Uart handle
|
||||
* @param pCallback Pointer to the Rx Event Callback function
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
if (pCallback == NULL)
|
||||
{
|
||||
huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
|
||||
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Process locked */
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
if (huart->gState == HAL_UART_STATE_READY)
|
||||
{
|
||||
huart->RxEventCallback = pCallback;
|
||||
}
|
||||
else
|
||||
{
|
||||
huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
|
||||
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Release Lock */
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UnRegister the UART Rx Event Callback
|
||||
* UART Rx Event Callback is redirected to the weak HAL_UARTEx_RxEventCallback() predefined callback
|
||||
* @param huart Uart handle
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
/* Process locked */
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
if (huart->gState == HAL_UART_STATE_READY)
|
||||
{
|
||||
huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak UART Rx Event Callback */
|
||||
}
|
||||
else
|
||||
{
|
||||
huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
|
||||
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Release Lock */
|
||||
__HAL_UNLOCK(huart);
|
||||
return status;
|
||||
}
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Exported_Functions_Group2 IO operation functions
|
||||
* @brief UART Transmit and Receive functions
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### IO operation functions #####
|
||||
===============================================================================
|
||||
This subsection provides a set of functions allowing to manage the UART asynchronous
|
||||
and Half duplex data transfers.
|
||||
|
||||
(#) There are two modes of transfer:
|
||||
(+) Blocking mode: The communication is performed in polling mode.
|
||||
The HAL status of all data processing is returned by the same function
|
||||
after finishing transfer.
|
||||
(+) Non-Blocking mode: The communication is performed using Interrupts
|
||||
or DMA, these API's return the HAL status.
|
||||
The end of the data processing will be indicated through the
|
||||
dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
|
||||
using DMA mode.
|
||||
The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks
|
||||
will be executed respectively at the end of the transmit or receive process
|
||||
The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected.
|
||||
|
||||
(#) Blocking mode API's are :
|
||||
(+) HAL_UART_Transmit()
|
||||
(+) HAL_UART_Receive()
|
||||
|
||||
(#) Non-Blocking mode API's with Interrupt are :
|
||||
(+) HAL_UART_Transmit_IT()
|
||||
(+) HAL_UART_Receive_IT()
|
||||
(+) HAL_UART_IRQHandler()
|
||||
|
||||
(#) Non-Blocking mode API's with DMA are :
|
||||
(+) HAL_UART_Transmit_DMA()
|
||||
(+) HAL_UART_Receive_DMA()
|
||||
(+) HAL_UART_DMAPause()
|
||||
(+) HAL_UART_DMAResume()
|
||||
(+) HAL_UART_DMAStop()
|
||||
|
||||
(#) A set of Transfer Complete Callbacks are provided in Non_Blocking mode:
|
||||
(+) HAL_UART_TxHalfCpltCallback()
|
||||
(+) HAL_UART_TxCpltCallback()
|
||||
(+) HAL_UART_RxHalfCpltCallback()
|
||||
(+) HAL_UART_RxCpltCallback()
|
||||
(+) HAL_UART_ErrorCallback()
|
||||
|
||||
(#) Non-Blocking mode transfers could be aborted using Abort API's :
|
||||
(+) HAL_UART_Abort()
|
||||
(+) HAL_UART_AbortTransmit()
|
||||
(+) HAL_UART_AbortReceive()
|
||||
(+) HAL_UART_Abort_IT()
|
||||
(+) HAL_UART_AbortTransmit_IT()
|
||||
(+) HAL_UART_AbortReceive_IT()
|
||||
|
||||
(#) For Abort services based on interrupts (HAL_UART_Abortxxx_IT), a set of Abort Complete Callbacks are provided:
|
||||
(+) HAL_UART_AbortCpltCallback()
|
||||
(+) HAL_UART_AbortTransmitCpltCallback()
|
||||
(+) HAL_UART_AbortReceiveCpltCallback()
|
||||
|
||||
(#) A Rx Event Reception Callback (Rx event notification) is available for Non_Blocking modes of enhanced reception services:
|
||||
(+) HAL_UARTEx_RxEventCallback()
|
||||
|
||||
(#) In Non-Blocking mode transfers, possible errors are split into 2 categories.
|
||||
Errors are handled as follows :
|
||||
(+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is
|
||||
to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error in Interrupt mode reception .
|
||||
Received character is then retrieved and stored in Rx buffer, Error code is set to allow user to identify error type,
|
||||
and HAL_UART_ErrorCallback() user callback is executed. Transfer is kept ongoing on UART side.
|
||||
If user wants to abort it, Abort services should be called by user.
|
||||
(+) Error is considered as Blocking : Transfer could not be completed properly and is aborted.
|
||||
This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode.
|
||||
Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback() user callback is executed.
|
||||
|
||||
-@- In the Half duplex communication, it is forbidden to run the transmit
|
||||
and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Sends an amount of data in blocking mode.
|
||||
* @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
|
||||
* the sent data is handled as a set of u16. In this case, Size must indicate the number
|
||||
* of u16 provided through pData.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @param pData Pointer to data buffer (u8 or u16 data elements).
|
||||
* @param Size Amount of data elements (u8 or u16) to be sent
|
||||
* @param Timeout Timeout duration
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
|
||||
{
|
||||
const uint8_t *pdata8bits;
|
||||
const uint16_t *pdata16bits;
|
||||
uint32_t tickstart = 0U;
|
||||
|
||||
/* Check that a Tx process is not already ongoing */
|
||||
if (huart->gState == HAL_UART_STATE_READY)
|
||||
{
|
||||
if ((pData == NULL) || (Size == 0U))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
huart->gState = HAL_UART_STATE_BUSY_TX;
|
||||
|
||||
/* Init tickstart for timeout management */
|
||||
tickstart = HAL_GetTick();
|
||||
|
||||
huart->TxXferSize = Size;
|
||||
huart->TxXferCount = Size;
|
||||
|
||||
/* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
|
||||
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
|
||||
{
|
||||
pdata8bits = NULL;
|
||||
pdata16bits = (const uint16_t *) pData;
|
||||
}
|
||||
else
|
||||
{
|
||||
pdata8bits = pData;
|
||||
pdata16bits = NULL;
|
||||
}
|
||||
|
||||
while (huart->TxXferCount > 0U)
|
||||
{
|
||||
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
|
||||
{
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
if (pdata8bits == NULL)
|
||||
{
|
||||
huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU);
|
||||
pdata16bits++;
|
||||
}
|
||||
else
|
||||
{
|
||||
huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU);
|
||||
pdata8bits++;
|
||||
}
|
||||
huart->TxXferCount--;
|
||||
}
|
||||
|
||||
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
|
||||
{
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
|
||||
/* At end of Tx process, restore huart->gState to Ready */
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
else
|
||||
{
|
||||
return HAL_BUSY;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Receives an amount of data in blocking mode.
|
||||
* @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
|
||||
* the received data is handled as a set of u16. In this case, Size must indicate the number
|
||||
* of u16 available through pData.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @param pData Pointer to data buffer (u8 or u16 data elements).
|
||||
* @param Size Amount of data elements (u8 or u16) to be received.
|
||||
* @param Timeout Timeout duration
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
|
||||
{
|
||||
uint8_t *pdata8bits;
|
||||
uint16_t *pdata16bits;
|
||||
uint32_t tickstart = 0U;
|
||||
|
||||
/* Check that a Rx process is not already ongoing */
|
||||
if (huart->RxState == HAL_UART_STATE_READY)
|
||||
{
|
||||
if ((pData == NULL) || (Size == 0U))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
huart->RxState = HAL_UART_STATE_BUSY_RX;
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
||||
|
||||
/* Init tickstart for timeout management */
|
||||
tickstart = HAL_GetTick();
|
||||
|
||||
huart->RxXferSize = Size;
|
||||
huart->RxXferCount = Size;
|
||||
|
||||
/* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */
|
||||
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
|
||||
{
|
||||
pdata8bits = NULL;
|
||||
pdata16bits = (uint16_t *) pData;
|
||||
}
|
||||
else
|
||||
{
|
||||
pdata8bits = pData;
|
||||
pdata16bits = NULL;
|
||||
}
|
||||
|
||||
/* Check the remain data to be received */
|
||||
while (huart->RxXferCount > 0U)
|
||||
{
|
||||
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
|
||||
{
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
if (pdata8bits == NULL)
|
||||
{
|
||||
*pdata16bits = (uint16_t)(huart->Instance->DR & 0x01FF);
|
||||
pdata16bits++;
|
||||
}
|
||||
else
|
||||
{
|
||||
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE)))
|
||||
{
|
||||
*pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
|
||||
}
|
||||
else
|
||||
{
|
||||
*pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
|
||||
}
|
||||
pdata8bits++;
|
||||
}
|
||||
huart->RxXferCount--;
|
||||
}
|
||||
|
||||
/* At end of Rx process, restore huart->RxState to Ready */
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
else
|
||||
{
|
||||
return HAL_BUSY;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sends an amount of data in non blocking mode.
|
||||
* @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
|
||||
* the sent data is handled as a set of u16. In this case, Size must indicate the number
|
||||
* of u16 provided through pData.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @param pData Pointer to data buffer (u8 or u16 data elements).
|
||||
* @param Size Amount of data elements (u8 or u16) to be sent
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
|
||||
{
|
||||
/* Check that a Tx process is not already ongoing */
|
||||
if (huart->gState == HAL_UART_STATE_READY)
|
||||
{
|
||||
if ((pData == NULL) || (Size == 0U))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
huart->pTxBuffPtr = pData;
|
||||
huart->TxXferSize = Size;
|
||||
huart->TxXferCount = Size;
|
||||
|
||||
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
huart->gState = HAL_UART_STATE_BUSY_TX;
|
||||
|
||||
/* Enable the UART Transmit data register empty Interrupt */
|
||||
__HAL_UART_ENABLE_IT(huart, UART_IT_TXE);
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
else
|
||||
{
|
||||
return HAL_BUSY;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Receives an amount of data in non blocking mode.
|
||||
* @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
|
||||
* the received data is handled as a set of u16. In this case, Size must indicate the number
|
||||
* of u16 available through pData.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @param pData Pointer to data buffer (u8 or u16 data elements).
|
||||
* @param Size Amount of data elements (u8 or u16) to be received.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
|
||||
{
|
||||
/* Check that a Rx process is not already ongoing */
|
||||
if (huart->RxState == HAL_UART_STATE_READY)
|
||||
{
|
||||
if ((pData == NULL) || (Size == 0U))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Set Reception type to Standard reception */
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
||||
|
||||
return (UART_Start_Receive_IT(huart, pData, Size));
|
||||
}
|
||||
else
|
||||
{
|
||||
return HAL_BUSY;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sends an amount of data in DMA mode.
|
||||
* @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
|
||||
* the sent data is handled as a set of u16. In this case, Size must indicate the number
|
||||
* of u16 provided through pData.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @param pData Pointer to data buffer (u8 or u16 data elements).
|
||||
* @param Size Amount of data elements (u8 or u16) to be sent
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
|
||||
{
|
||||
const uint32_t *tmp;
|
||||
|
||||
/* Check that a Tx process is not already ongoing */
|
||||
if (huart->gState == HAL_UART_STATE_READY)
|
||||
{
|
||||
if ((pData == NULL) || (Size == 0U))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
huart->pTxBuffPtr = pData;
|
||||
huart->TxXferSize = Size;
|
||||
huart->TxXferCount = Size;
|
||||
|
||||
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
huart->gState = HAL_UART_STATE_BUSY_TX;
|
||||
|
||||
/* Set the UART DMA transfer complete callback */
|
||||
huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
|
||||
|
||||
/* Set the UART DMA Half transfer complete callback */
|
||||
huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
|
||||
|
||||
/* Set the DMA error callback */
|
||||
huart->hdmatx->XferErrorCallback = UART_DMAError;
|
||||
|
||||
/* Set the DMA abort callback */
|
||||
huart->hdmatx->XferAbortCallback = NULL;
|
||||
|
||||
/* Enable the UART transmit DMA channel */
|
||||
tmp = (const uint32_t *)&pData;
|
||||
HAL_DMA_Start_IT(huart->hdmatx, *(const uint32_t *)tmp, (uint32_t)&huart->Instance->DR, Size);
|
||||
|
||||
/* Clear the TC flag in the SR register by writing 0 to it */
|
||||
__HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
|
||||
|
||||
/* Enable the DMA transfer for transmit request by setting the DMAT bit
|
||||
in the UART CR3 register */
|
||||
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
else
|
||||
{
|
||||
return HAL_BUSY;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Receives an amount of data in DMA mode.
|
||||
* @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
|
||||
* the received data is handled as a set of u16. In this case, Size must indicate the number
|
||||
* of u16 available through pData.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @param pData Pointer to data buffer (u8 or u16 data elements).
|
||||
* @param Size Amount of data elements (u8 or u16) to be received.
|
||||
* @note When the UART parity is enabled (PCE = 1) the received data contains the parity bit.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
|
||||
{
|
||||
/* Check that a Rx process is not already ongoing */
|
||||
if (huart->RxState == HAL_UART_STATE_READY)
|
||||
{
|
||||
if ((pData == NULL) || (Size == 0U))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Set Reception type to Standard reception */
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
||||
|
||||
return (UART_Start_Receive_DMA(huart, pData, Size));
|
||||
}
|
||||
else
|
||||
{
|
||||
return HAL_BUSY;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Pauses the DMA Transfer.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
|
||||
{
|
||||
uint32_t dmarequest = 0x00U;
|
||||
|
||||
dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
|
||||
if ((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
|
||||
{
|
||||
/* Disable the UART DMA Tx request */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
|
||||
}
|
||||
|
||||
dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
|
||||
{
|
||||
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
|
||||
|
||||
/* Disable the UART DMA Rx request */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
}
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Resumes the DMA Transfer.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
|
||||
{
|
||||
|
||||
if (huart->gState == HAL_UART_STATE_BUSY_TX)
|
||||
{
|
||||
/* Enable the UART DMA Tx request */
|
||||
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
|
||||
}
|
||||
|
||||
if (huart->RxState == HAL_UART_STATE_BUSY_RX)
|
||||
{
|
||||
/* Clear the Overrun flag before resuming the Rx transfer*/
|
||||
__HAL_UART_CLEAR_OREFLAG(huart);
|
||||
|
||||
/* Re-enable PE and ERR (Frame error, noise error, overrun error) interrupts */
|
||||
if (huart->Init.Parity != UART_PARITY_NONE)
|
||||
{
|
||||
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
|
||||
}
|
||||
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
|
||||
|
||||
/* Enable the UART DMA Rx request */
|
||||
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
}
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Stops the DMA Transfer.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
|
||||
{
|
||||
uint32_t dmarequest = 0x00U;
|
||||
/* The Lock is not implemented on this API to allow the user application
|
||||
to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback():
|
||||
when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
|
||||
and the correspond call back is executed HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback()
|
||||
*/
|
||||
|
||||
/* Stop UART DMA Tx request if ongoing */
|
||||
dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
|
||||
if ((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
|
||||
|
||||
/* Abort the UART DMA Tx channel */
|
||||
if (huart->hdmatx != NULL)
|
||||
{
|
||||
HAL_DMA_Abort(huart->hdmatx);
|
||||
}
|
||||
UART_EndTxTransfer(huart);
|
||||
}
|
||||
|
||||
/* Stop UART DMA Rx request if ongoing */
|
||||
dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
|
||||
/* Abort the UART DMA Rx channel */
|
||||
if (huart->hdmarx != NULL)
|
||||
{
|
||||
HAL_DMA_Abort(huart->hdmarx);
|
||||
}
|
||||
UART_EndRxTransfer(huart);
|
||||
}
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Receive an amount of data in blocking mode till either the expected number of data is received or an IDLE event occurs.
|
||||
* @note HAL_OK is returned if reception is completed (expected number of data has been received)
|
||||
* or if reception is stopped after IDLE event (less than the expected number of data has been received)
|
||||
* In this case, RxLen output parameter indicates number of data available in reception buffer.
|
||||
* @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M = 01),
|
||||
* the received data is handled as a set of uint16_t. In this case, Size must indicate the number
|
||||
* of uint16_t available through pData.
|
||||
* @param huart UART handle.
|
||||
* @param pData Pointer to data buffer (uint8_t or uint16_t data elements).
|
||||
* @param Size Amount of data elements (uint8_t or uint16_t) to be received.
|
||||
* @param RxLen Number of data elements finally received (could be lower than Size, in case reception ends on IDLE event)
|
||||
* @param Timeout Timeout duration expressed in ms (covers the whole reception sequence).
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen,
|
||||
uint32_t Timeout)
|
||||
{
|
||||
uint8_t *pdata8bits;
|
||||
uint16_t *pdata16bits;
|
||||
uint32_t tickstart;
|
||||
|
||||
/* Check that a Rx process is not already ongoing */
|
||||
if (huart->RxState == HAL_UART_STATE_READY)
|
||||
{
|
||||
if ((pData == NULL) || (Size == 0U))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
huart->RxState = HAL_UART_STATE_BUSY_RX;
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
|
||||
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||||
|
||||
/* Init tickstart for timeout management */
|
||||
tickstart = HAL_GetTick();
|
||||
|
||||
huart->RxXferSize = Size;
|
||||
huart->RxXferCount = Size;
|
||||
|
||||
/* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */
|
||||
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
|
||||
{
|
||||
pdata8bits = NULL;
|
||||
pdata16bits = (uint16_t *) pData;
|
||||
}
|
||||
else
|
||||
{
|
||||
pdata8bits = pData;
|
||||
pdata16bits = NULL;
|
||||
}
|
||||
|
||||
/* Initialize output number of received elements */
|
||||
*RxLen = 0U;
|
||||
|
||||
/* as long as data have to be received */
|
||||
while (huart->RxXferCount > 0U)
|
||||
{
|
||||
/* Check if IDLE flag is set */
|
||||
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE))
|
||||
{
|
||||
/* Clear IDLE flag in ISR */
|
||||
__HAL_UART_CLEAR_IDLEFLAG(huart);
|
||||
|
||||
/* If Set, but no data ever received, clear flag without exiting loop */
|
||||
/* If Set, and data has already been received, this means Idle Event is valid : End reception */
|
||||
if (*RxLen > 0U)
|
||||
{
|
||||
huart->RxEventType = HAL_UART_RXEVENT_IDLE;
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
}
|
||||
|
||||
/* Check if RXNE flag is set */
|
||||
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE))
|
||||
{
|
||||
if (pdata8bits == NULL)
|
||||
{
|
||||
*pdata16bits = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
|
||||
pdata16bits++;
|
||||
}
|
||||
else
|
||||
{
|
||||
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE)))
|
||||
{
|
||||
*pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
|
||||
}
|
||||
else
|
||||
{
|
||||
*pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
|
||||
}
|
||||
|
||||
pdata8bits++;
|
||||
}
|
||||
/* Increment number of received elements */
|
||||
*RxLen += 1U;
|
||||
huart->RxXferCount--;
|
||||
}
|
||||
|
||||
/* Check for the Timeout */
|
||||
if (Timeout != HAL_MAX_DELAY)
|
||||
{
|
||||
if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
|
||||
{
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Set number of received elements in output parameter : RxLen */
|
||||
*RxLen = huart->RxXferSize - huart->RxXferCount;
|
||||
/* At end of Rx process, restore huart->RxState to Ready */
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
else
|
||||
{
|
||||
return HAL_BUSY;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Receive an amount of data in interrupt mode till either the expected number of data is received or an IDLE event occurs.
|
||||
* @note Reception is initiated by this function call. Further progress of reception is achieved thanks
|
||||
* to UART interrupts raised by RXNE and IDLE events. Callback is called at end of reception indicating
|
||||
* number of received data elements.
|
||||
* @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M = 01),
|
||||
* the received data is handled as a set of uint16_t. In this case, Size must indicate the number
|
||||
* of uint16_t available through pData.
|
||||
* @param huart UART handle.
|
||||
* @param pData Pointer to data buffer (uint8_t or uint16_t data elements).
|
||||
* @param Size Amount of data elements (uint8_t or uint16_t) to be received.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
|
||||
{
|
||||
HAL_StatusTypeDef status;
|
||||
|
||||
/* Check that a Rx process is not already ongoing */
|
||||
if (huart->RxState == HAL_UART_STATE_READY)
|
||||
{
|
||||
if ((pData == NULL) || (Size == 0U))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Set Reception type to reception till IDLE Event*/
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
|
||||
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||||
|
||||
status = UART_Start_Receive_IT(huart, pData, Size);
|
||||
|
||||
/* Check Rx process has been successfully started */
|
||||
if (status == HAL_OK)
|
||||
{
|
||||
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
|
||||
{
|
||||
__HAL_UART_CLEAR_IDLEFLAG(huart);
|
||||
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* In case of errors already pending when reception is started,
|
||||
Interrupts may have already been raised and lead to reception abortion.
|
||||
(Overrun error for instance).
|
||||
In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
else
|
||||
{
|
||||
return HAL_BUSY;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Receive an amount of data in DMA mode till either the expected number of data is received or an IDLE event occurs.
|
||||
* @note Reception is initiated by this function call. Further progress of reception is achieved thanks
|
||||
* to DMA services, transferring automatically received data elements in user reception buffer and
|
||||
* calling registered callbacks at half/end of reception. UART IDLE events are also used to consider
|
||||
* reception phase as ended. In all cases, callback execution will indicate number of received data elements.
|
||||
* @note When the UART parity is enabled (PCE = 1), the received data contain
|
||||
* the parity bit (MSB position).
|
||||
* @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M = 01),
|
||||
* the received data is handled as a set of uint16_t. In this case, Size must indicate the number
|
||||
* of uint16_t available through pData.
|
||||
* @param huart UART handle.
|
||||
* @param pData Pointer to data buffer (uint8_t or uint16_t data elements).
|
||||
* @param Size Amount of data elements (uint8_t or uint16_t) to be received.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
|
||||
{
|
||||
HAL_StatusTypeDef status;
|
||||
|
||||
/* Check that a Rx process is not already ongoing */
|
||||
if (huart->RxState == HAL_UART_STATE_READY)
|
||||
{
|
||||
if ((pData == NULL) || (Size == 0U))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Set Reception type to reception till IDLE Event*/
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
|
||||
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||||
|
||||
status = UART_Start_Receive_DMA(huart, pData, Size);
|
||||
|
||||
/* Check Rx process has been successfully started */
|
||||
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
|
||||
{
|
||||
__HAL_UART_CLEAR_IDLEFLAG(huart);
|
||||
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* In case of errors already pending when reception is started,
|
||||
Interrupts may have already been raised and lead to reception abortion.
|
||||
(Overrun error for instance).
|
||||
In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
else
|
||||
{
|
||||
return HAL_BUSY;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Provide Rx Event type that has lead to RxEvent callback execution.
|
||||
* @note When HAL_UARTEx_ReceiveToIdle_IT() or HAL_UARTEx_ReceiveToIdle_DMA() API are called, progress
|
||||
* of reception process is provided to application through calls of Rx Event callback (either default one
|
||||
* HAL_UARTEx_RxEventCallback() or user registered one). As several types of events could occur (IDLE event,
|
||||
* Half Transfer, or Transfer Complete), this function allows to retrieve the Rx Event type that has lead
|
||||
* to Rx Event callback execution.
|
||||
* @note This function is expected to be called within the user implementation of Rx Event Callback,
|
||||
* in order to provide the accurate value :
|
||||
* In Interrupt Mode :
|
||||
* - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has been received)
|
||||
* - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed (nb of
|
||||
* received data is lower than expected one)
|
||||
* In DMA Mode :
|
||||
* - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has been received)
|
||||
* - HAL_UART_RXEVENT_HT : when half of expected nb of data has been received
|
||||
* - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed (nb of
|
||||
* received data is lower than expected one).
|
||||
* In DMA mode, RxEvent callback could be called several times;
|
||||
* When DMA is configured in Normal Mode, HT event does not stop Reception process;
|
||||
* When DMA is configured in Circular Mode, HT, TC or IDLE events don't stop Reception process;
|
||||
* @param huart UART handle.
|
||||
* @retval Rx Event Type (returned value will be a value of @ref UART_RxEvent_Type_Values)
|
||||
*/
|
||||
HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Return Rx Event type value, as stored in UART handle */
|
||||
return(huart->RxEventType);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Abort ongoing transfers (blocking mode).
|
||||
* @param huart UART handle.
|
||||
* @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
|
||||
* This procedure performs following operations :
|
||||
* - Disable UART Interrupts (Tx and Rx)
|
||||
* - Disable the DMA transfer in the peripheral register (if enabled)
|
||||
* - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
|
||||
* - Set handle State to READY
|
||||
* @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
|
||||
|
||||
/* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
|
||||
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
|
||||
}
|
||||
|
||||
/* Disable the UART DMA Tx request if enabled */
|
||||
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
|
||||
|
||||
/* Abort the UART DMA Tx channel: use blocking DMA Abort API (no callback) */
|
||||
if (huart->hdmatx != NULL)
|
||||
{
|
||||
/* Set the UART DMA Abort callback to Null.
|
||||
No call back execution at end of DMA abort procedure */
|
||||
huart->hdmatx->XferAbortCallback = NULL;
|
||||
|
||||
if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
|
||||
{
|
||||
if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
|
||||
{
|
||||
/* Set error code to DMA */
|
||||
huart->ErrorCode = HAL_UART_ERROR_DMA;
|
||||
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Disable the UART DMA Rx request if enabled */
|
||||
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
|
||||
/* Abort the UART DMA Rx channel: use blocking DMA Abort API (no callback) */
|
||||
if (huart->hdmarx != NULL)
|
||||
{
|
||||
/* Set the UART DMA Abort callback to Null.
|
||||
No call back execution at end of DMA abort procedure */
|
||||
huart->hdmarx->XferAbortCallback = NULL;
|
||||
|
||||
if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
|
||||
{
|
||||
if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
|
||||
{
|
||||
/* Set error code to DMA */
|
||||
huart->ErrorCode = HAL_UART_ERROR_DMA;
|
||||
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Reset Tx and Rx transfer counters */
|
||||
huart->TxXferCount = 0x00U;
|
||||
huart->RxXferCount = 0x00U;
|
||||
|
||||
/* Reset ErrorCode */
|
||||
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
|
||||
/* Restore huart->RxState and huart->gState to Ready */
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Abort ongoing Transmit transfer (blocking mode).
|
||||
* @param huart UART handle.
|
||||
* @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode.
|
||||
* This procedure performs following operations :
|
||||
* - Disable UART Interrupts (Tx)
|
||||
* - Disable the DMA transfer in the peripheral register (if enabled)
|
||||
* - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
|
||||
* - Set handle State to READY
|
||||
* @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Disable TXEIE and TCIE interrupts */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
|
||||
|
||||
/* Disable the UART DMA Tx request if enabled */
|
||||
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
|
||||
|
||||
/* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
|
||||
if (huart->hdmatx != NULL)
|
||||
{
|
||||
/* Set the UART DMA Abort callback to Null.
|
||||
No call back execution at end of DMA abort procedure */
|
||||
huart->hdmatx->XferAbortCallback = NULL;
|
||||
|
||||
if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
|
||||
{
|
||||
if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
|
||||
{
|
||||
/* Set error code to DMA */
|
||||
huart->ErrorCode = HAL_UART_ERROR_DMA;
|
||||
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Reset Tx transfer counter */
|
||||
huart->TxXferCount = 0x00U;
|
||||
|
||||
/* Restore huart->gState to Ready */
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Abort ongoing Receive transfer (blocking mode).
|
||||
* @param huart UART handle.
|
||||
* @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode.
|
||||
* This procedure performs following operations :
|
||||
* - Disable UART Interrupts (Rx)
|
||||
* - Disable the DMA transfer in the peripheral register (if enabled)
|
||||
* - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
|
||||
* - Set handle State to READY
|
||||
* @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
|
||||
|
||||
/* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
|
||||
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
|
||||
}
|
||||
|
||||
/* Disable the UART DMA Rx request if enabled */
|
||||
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
|
||||
/* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
|
||||
if (huart->hdmarx != NULL)
|
||||
{
|
||||
/* Set the UART DMA Abort callback to Null.
|
||||
No call back execution at end of DMA abort procedure */
|
||||
huart->hdmarx->XferAbortCallback = NULL;
|
||||
|
||||
if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
|
||||
{
|
||||
if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
|
||||
{
|
||||
/* Set error code to DMA */
|
||||
huart->ErrorCode = HAL_UART_ERROR_DMA;
|
||||
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Reset Rx transfer counter */
|
||||
huart->RxXferCount = 0x00U;
|
||||
|
||||
/* Restore huart->RxState to Ready */
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Abort ongoing transfers (Interrupt mode).
|
||||
* @param huart UART handle.
|
||||
* @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
|
||||
* This procedure performs following operations :
|
||||
* - Disable UART Interrupts (Tx and Rx)
|
||||
* - Disable the DMA transfer in the peripheral register (if enabled)
|
||||
* - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
|
||||
* - Set handle State to READY
|
||||
* - At abort completion, call user abort complete callback
|
||||
* @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
|
||||
* considered as completed only when user abort complete callback is executed (not when exiting function).
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
|
||||
{
|
||||
uint32_t AbortCplt = 0x01U;
|
||||
|
||||
/* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
|
||||
|
||||
/* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
|
||||
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
|
||||
}
|
||||
|
||||
/* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised
|
||||
before any call to DMA Abort functions */
|
||||
/* DMA Tx Handle is valid */
|
||||
if (huart->hdmatx != NULL)
|
||||
{
|
||||
/* Set DMA Abort Complete callback if UART DMA Tx request if enabled.
|
||||
Otherwise, set it to NULL */
|
||||
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
|
||||
{
|
||||
huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback;
|
||||
}
|
||||
else
|
||||
{
|
||||
huart->hdmatx->XferAbortCallback = NULL;
|
||||
}
|
||||
}
|
||||
/* DMA Rx Handle is valid */
|
||||
if (huart->hdmarx != NULL)
|
||||
{
|
||||
/* Set DMA Abort Complete callback if UART DMA Rx request if enabled.
|
||||
Otherwise, set it to NULL */
|
||||
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
|
||||
{
|
||||
huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback;
|
||||
}
|
||||
else
|
||||
{
|
||||
huart->hdmarx->XferAbortCallback = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
/* Disable the UART DMA Tx request if enabled */
|
||||
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
|
||||
{
|
||||
/* Disable DMA Tx at UART level */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
|
||||
|
||||
/* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
|
||||
if (huart->hdmatx != NULL)
|
||||
{
|
||||
/* UART Tx DMA Abort callback has already been initialised :
|
||||
will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
|
||||
|
||||
/* Abort DMA TX */
|
||||
if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
|
||||
{
|
||||
huart->hdmatx->XferAbortCallback = NULL;
|
||||
}
|
||||
else
|
||||
{
|
||||
AbortCplt = 0x00U;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Disable the UART DMA Rx request if enabled */
|
||||
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
|
||||
/* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
|
||||
if (huart->hdmarx != NULL)
|
||||
{
|
||||
/* UART Rx DMA Abort callback has already been initialised :
|
||||
will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
|
||||
|
||||
/* Abort DMA RX */
|
||||
if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
|
||||
{
|
||||
huart->hdmarx->XferAbortCallback = NULL;
|
||||
AbortCplt = 0x01U;
|
||||
}
|
||||
else
|
||||
{
|
||||
AbortCplt = 0x00U;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* if no DMA abort complete callback execution is required => call user Abort Complete callback */
|
||||
if (AbortCplt == 0x01U)
|
||||
{
|
||||
/* Reset Tx and Rx transfer counters */
|
||||
huart->TxXferCount = 0x00U;
|
||||
huart->RxXferCount = 0x00U;
|
||||
|
||||
/* Reset ErrorCode */
|
||||
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
|
||||
/* Restore huart->gState and huart->RxState to Ready */
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
||||
|
||||
/* As no DMA to be aborted, call directly user Abort complete callback */
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/* Call registered Abort complete callback */
|
||||
huart->AbortCpltCallback(huart);
|
||||
#else
|
||||
/* Call legacy weak Abort complete callback */
|
||||
HAL_UART_AbortCpltCallback(huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Abort ongoing Transmit transfer (Interrupt mode).
|
||||
* @param huart UART handle.
|
||||
* @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode.
|
||||
* This procedure performs following operations :
|
||||
* - Disable UART Interrupts (Tx)
|
||||
* - Disable the DMA transfer in the peripheral register (if enabled)
|
||||
* - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
|
||||
* - Set handle State to READY
|
||||
* - At abort completion, call user abort complete callback
|
||||
* @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
|
||||
* considered as completed only when user abort complete callback is executed (not when exiting function).
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Disable TXEIE and TCIE interrupts */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
|
||||
|
||||
/* Disable the UART DMA Tx request if enabled */
|
||||
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
|
||||
|
||||
/* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
|
||||
if (huart->hdmatx != NULL)
|
||||
{
|
||||
/* Set the UART DMA Abort callback :
|
||||
will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
|
||||
huart->hdmatx->XferAbortCallback = UART_DMATxOnlyAbortCallback;
|
||||
|
||||
/* Abort DMA TX */
|
||||
if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
|
||||
{
|
||||
/* Call Directly huart->hdmatx->XferAbortCallback function in case of error */
|
||||
huart->hdmatx->XferAbortCallback(huart->hdmatx);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Reset Tx transfer counter */
|
||||
huart->TxXferCount = 0x00U;
|
||||
|
||||
/* Restore huart->gState to Ready */
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
|
||||
/* As no DMA to be aborted, call directly user Abort complete callback */
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/* Call registered Abort Transmit Complete Callback */
|
||||
huart->AbortTransmitCpltCallback(huart);
|
||||
#else
|
||||
/* Call legacy weak Abort Transmit Complete Callback */
|
||||
HAL_UART_AbortTransmitCpltCallback(huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Reset Tx transfer counter */
|
||||
huart->TxXferCount = 0x00U;
|
||||
|
||||
/* Restore huart->gState to Ready */
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
|
||||
/* As no DMA to be aborted, call directly user Abort complete callback */
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/* Call registered Abort Transmit Complete Callback */
|
||||
huart->AbortTransmitCpltCallback(huart);
|
||||
#else
|
||||
/* Call legacy weak Abort Transmit Complete Callback */
|
||||
HAL_UART_AbortTransmitCpltCallback(huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Abort ongoing Receive transfer (Interrupt mode).
|
||||
* @param huart UART handle.
|
||||
* @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode.
|
||||
* This procedure performs following operations :
|
||||
* - Disable UART Interrupts (Rx)
|
||||
* - Disable the DMA transfer in the peripheral register (if enabled)
|
||||
* - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
|
||||
* - Set handle State to READY
|
||||
* - At abort completion, call user abort complete callback
|
||||
* @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
|
||||
* considered as completed only when user abort complete callback is executed (not when exiting function).
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
|
||||
|
||||
/* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
|
||||
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
|
||||
}
|
||||
|
||||
/* Disable the UART DMA Rx request if enabled */
|
||||
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
|
||||
/* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
|
||||
if (huart->hdmarx != NULL)
|
||||
{
|
||||
/* Set the UART DMA Abort callback :
|
||||
will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
|
||||
huart->hdmarx->XferAbortCallback = UART_DMARxOnlyAbortCallback;
|
||||
|
||||
/* Abort DMA RX */
|
||||
if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
|
||||
{
|
||||
/* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
|
||||
huart->hdmarx->XferAbortCallback(huart->hdmarx);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Reset Rx transfer counter */
|
||||
huart->RxXferCount = 0x00U;
|
||||
|
||||
/* Restore huart->RxState to Ready */
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
||||
|
||||
/* As no DMA to be aborted, call directly user Abort complete callback */
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/* Call registered Abort Receive Complete Callback */
|
||||
huart->AbortReceiveCpltCallback(huart);
|
||||
#else
|
||||
/* Call legacy weak Abort Receive Complete Callback */
|
||||
HAL_UART_AbortReceiveCpltCallback(huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Reset Rx transfer counter */
|
||||
huart->RxXferCount = 0x00U;
|
||||
|
||||
/* Restore huart->RxState to Ready */
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
||||
|
||||
/* As no DMA to be aborted, call directly user Abort complete callback */
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/* Call registered Abort Receive Complete Callback */
|
||||
huart->AbortReceiveCpltCallback(huart);
|
||||
#else
|
||||
/* Call legacy weak Abort Receive Complete Callback */
|
||||
HAL_UART_AbortReceiveCpltCallback(huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles UART interrupt request.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
|
||||
{
|
||||
uint32_t isrflags = READ_REG(huart->Instance->SR);
|
||||
uint32_t cr1its = READ_REG(huart->Instance->CR1);
|
||||
uint32_t cr3its = READ_REG(huart->Instance->CR3);
|
||||
uint32_t errorflags = 0x00U;
|
||||
uint32_t dmarequest = 0x00U;
|
||||
|
||||
/* If no error occurs */
|
||||
errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE));
|
||||
if (errorflags == RESET)
|
||||
{
|
||||
/* UART in mode Receiver -------------------------------------------------*/
|
||||
if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
|
||||
{
|
||||
UART_Receive_IT(huart);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
/* If some errors occur */
|
||||
if ((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET)
|
||||
|| ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)))
|
||||
{
|
||||
/* UART parity error interrupt occurred ----------------------------------*/
|
||||
if (((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
|
||||
{
|
||||
huart->ErrorCode |= HAL_UART_ERROR_PE;
|
||||
}
|
||||
|
||||
/* UART noise error interrupt occurred -----------------------------------*/
|
||||
if (((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
|
||||
{
|
||||
huart->ErrorCode |= HAL_UART_ERROR_NE;
|
||||
}
|
||||
|
||||
/* UART frame error interrupt occurred -----------------------------------*/
|
||||
if (((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
|
||||
{
|
||||
huart->ErrorCode |= HAL_UART_ERROR_FE;
|
||||
}
|
||||
|
||||
/* UART Over-Run interrupt occurred --------------------------------------*/
|
||||
if (((isrflags & USART_SR_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET)
|
||||
|| ((cr3its & USART_CR3_EIE) != RESET)))
|
||||
{
|
||||
huart->ErrorCode |= HAL_UART_ERROR_ORE;
|
||||
}
|
||||
|
||||
/* Call UART Error Call back function if need be --------------------------*/
|
||||
if (huart->ErrorCode != HAL_UART_ERROR_NONE)
|
||||
{
|
||||
/* UART in mode Receiver -----------------------------------------------*/
|
||||
if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
|
||||
{
|
||||
UART_Receive_IT(huart);
|
||||
}
|
||||
|
||||
/* If Overrun error occurs, or if any error occurs in DMA mode reception,
|
||||
consider error as blocking */
|
||||
dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest)
|
||||
{
|
||||
/* Blocking error : transfer is aborted
|
||||
Set the UART state ready to be able to start again the process,
|
||||
Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
|
||||
UART_EndRxTransfer(huart);
|
||||
|
||||
/* Disable the UART DMA Rx request if enabled */
|
||||
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
|
||||
/* Abort the UART DMA Rx channel */
|
||||
if (huart->hdmarx != NULL)
|
||||
{
|
||||
/* Set the UART DMA Abort callback :
|
||||
will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
|
||||
huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
|
||||
if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
|
||||
{
|
||||
/* Call Directly XferAbortCallback function in case of error */
|
||||
huart->hdmarx->XferAbortCallback(huart->hdmarx);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Call user error callback */
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/*Call registered error callback*/
|
||||
huart->ErrorCallback(huart);
|
||||
#else
|
||||
/*Call legacy weak error callback*/
|
||||
HAL_UART_ErrorCallback(huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Call user error callback */
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/*Call registered error callback*/
|
||||
huart->ErrorCallback(huart);
|
||||
#else
|
||||
/*Call legacy weak error callback*/
|
||||
HAL_UART_ErrorCallback(huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Non Blocking error : transfer could go on.
|
||||
Error is notified to user through user error callback */
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/*Call registered error callback*/
|
||||
huart->ErrorCallback(huart);
|
||||
#else
|
||||
/*Call legacy weak error callback*/
|
||||
HAL_UART_ErrorCallback(huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
|
||||
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
}
|
||||
}
|
||||
return;
|
||||
} /* End if some error occurs */
|
||||
|
||||
/* Check current reception Mode :
|
||||
If Reception till IDLE event has been selected : */
|
||||
if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
|
||||
&& ((isrflags & USART_SR_IDLE) != 0U)
|
||||
&& ((cr1its & USART_SR_IDLE) != 0U))
|
||||
{
|
||||
__HAL_UART_CLEAR_IDLEFLAG(huart);
|
||||
|
||||
/* Check if DMA mode is enabled in UART */
|
||||
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
|
||||
{
|
||||
/* DMA mode enabled */
|
||||
/* Check received length : If all expected data are received, do nothing,
|
||||
(DMA cplt callback will be called).
|
||||
Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
|
||||
uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx);
|
||||
if ((nb_remaining_rx_data > 0U)
|
||||
&& (nb_remaining_rx_data < huart->RxXferSize))
|
||||
{
|
||||
/* Reception is not complete */
|
||||
huart->RxXferCount = nb_remaining_rx_data;
|
||||
|
||||
/* In Normal mode, end DMA xfer and HAL UART Rx process*/
|
||||
if (huart->hdmarx->Init.Mode != DMA_CIRCULAR)
|
||||
{
|
||||
/* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
|
||||
|
||||
/* Disable the DMA transfer for the receiver request by resetting the DMAR bit
|
||||
in the UART CR3 register */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
|
||||
/* At end of Rx process, restore huart->RxState to Ready */
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
||||
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
|
||||
|
||||
/* Last bytes received, so no need as the abort is immediate */
|
||||
(void)HAL_DMA_Abort(huart->hdmarx);
|
||||
}
|
||||
|
||||
/* Initialize type of RxEvent that correspond to RxEvent callback execution;
|
||||
In this case, Rx Event type is Idle Event */
|
||||
huart->RxEventType = HAL_UART_RXEVENT_IDLE;
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/*Call registered Rx Event callback*/
|
||||
huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
|
||||
#else
|
||||
/*Call legacy weak Rx Event callback*/
|
||||
HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
return;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* DMA mode not enabled */
|
||||
/* Check received length : If all expected data are received, do nothing.
|
||||
Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
|
||||
uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount;
|
||||
if ((huart->RxXferCount > 0U)
|
||||
&& (nb_rx_data > 0U))
|
||||
{
|
||||
/* Disable the UART Parity Error Interrupt and RXNE interrupts */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
|
||||
|
||||
/* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
|
||||
|
||||
/* Rx process is completed, restore huart->RxState to Ready */
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
||||
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
|
||||
|
||||
/* Initialize type of RxEvent that correspond to RxEvent callback execution;
|
||||
In this case, Rx Event type is Idle Event */
|
||||
huart->RxEventType = HAL_UART_RXEVENT_IDLE;
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/*Call registered Rx complete callback*/
|
||||
huart->RxEventCallback(huart, nb_rx_data);
|
||||
#else
|
||||
/*Call legacy weak Rx Event callback*/
|
||||
HAL_UARTEx_RxEventCallback(huart, nb_rx_data);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
/* UART in mode Transmitter ------------------------------------------------*/
|
||||
if (((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
|
||||
{
|
||||
UART_Transmit_IT(huart);
|
||||
return;
|
||||
}
|
||||
|
||||
/* UART in mode Transmitter end --------------------------------------------*/
|
||||
if (((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
|
||||
{
|
||||
UART_EndTransmit_IT(huart);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Tx Transfer completed callbacks.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(huart);
|
||||
/* NOTE: This function should not be modified, when the callback is needed,
|
||||
the HAL_UART_TxCpltCallback could be implemented in the user file
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Tx Half Transfer completed callbacks.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(huart);
|
||||
/* NOTE: This function should not be modified, when the callback is needed,
|
||||
the HAL_UART_TxHalfCpltCallback could be implemented in the user file
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Rx Transfer completed callbacks.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(huart);
|
||||
/* NOTE: This function should not be modified, when the callback is needed,
|
||||
the HAL_UART_RxCpltCallback could be implemented in the user file
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Rx Half Transfer completed callbacks.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(huart);
|
||||
/* NOTE: This function should not be modified, when the callback is needed,
|
||||
the HAL_UART_RxHalfCpltCallback could be implemented in the user file
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UART error callbacks.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(huart);
|
||||
/* NOTE: This function should not be modified, when the callback is needed,
|
||||
the HAL_UART_ErrorCallback could be implemented in the user file
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UART Abort Complete callback.
|
||||
* @param huart UART handle.
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(huart);
|
||||
|
||||
/* NOTE : This function should not be modified, when the callback is needed,
|
||||
the HAL_UART_AbortCpltCallback can be implemented in the user file.
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UART Abort Complete callback.
|
||||
* @param huart UART handle.
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(huart);
|
||||
|
||||
/* NOTE : This function should not be modified, when the callback is needed,
|
||||
the HAL_UART_AbortTransmitCpltCallback can be implemented in the user file.
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UART Abort Receive Complete callback.
|
||||
* @param huart UART handle.
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(huart);
|
||||
|
||||
/* NOTE : This function should not be modified, when the callback is needed,
|
||||
the HAL_UART_AbortReceiveCpltCallback can be implemented in the user file.
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reception Event Callback (Rx event notification called after use of advanced reception service).
|
||||
* @param huart UART handle
|
||||
* @param Size Number of data available in application reception buffer (indicates a position in
|
||||
* reception buffer until which, data are available)
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(huart);
|
||||
UNUSED(Size);
|
||||
|
||||
/* NOTE : This function should not be modified, when the callback is needed,
|
||||
the HAL_UARTEx_RxEventCallback can be implemented in the user file.
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions
|
||||
* @brief UART control functions
|
||||
*
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### Peripheral Control functions #####
|
||||
==============================================================================
|
||||
[..]
|
||||
This subsection provides a set of functions allowing to control the UART:
|
||||
(+) HAL_LIN_SendBreak() API can be helpful to transmit the break character.
|
||||
(+) HAL_MultiProcessor_EnterMuteMode() API can be helpful to enter the UART in mute mode.
|
||||
(+) HAL_MultiProcessor_ExitMuteMode() API can be helpful to exit the UART mute mode by software.
|
||||
(+) HAL_HalfDuplex_EnableTransmitter() API to enable the UART transmitter and disables the UART receiver in Half Duplex mode
|
||||
(+) HAL_HalfDuplex_EnableReceiver() API to enable the UART receiver and disables the UART transmitter in Half Duplex mode
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Transmits break characters.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_UART_INSTANCE(huart->Instance));
|
||||
|
||||
/* Process Locked */
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
huart->gState = HAL_UART_STATE_BUSY;
|
||||
|
||||
/* Send break characters */
|
||||
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_SBK);
|
||||
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enters the UART in mute mode.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_UART_INSTANCE(huart->Instance));
|
||||
|
||||
/* Process Locked */
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
huart->gState = HAL_UART_STATE_BUSY;
|
||||
|
||||
/* Enable the USART mute mode by setting the RWU bit in the CR1 register */
|
||||
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RWU);
|
||||
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Exits the UART mute mode: wake up software.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_UART_INSTANCE(huart->Instance));
|
||||
|
||||
/* Process Locked */
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
huart->gState = HAL_UART_STATE_BUSY;
|
||||
|
||||
/* Disable the USART mute mode by clearing the RWU bit in the CR1 register */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RWU);
|
||||
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables the UART transmitter and disables the UART receiver.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
|
||||
{
|
||||
uint32_t tmpreg = 0x00U;
|
||||
|
||||
/* Process Locked */
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
huart->gState = HAL_UART_STATE_BUSY;
|
||||
|
||||
/*-------------------------- USART CR1 Configuration -----------------------*/
|
||||
tmpreg = huart->Instance->CR1;
|
||||
|
||||
/* Clear TE and RE bits */
|
||||
tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_TE | USART_CR1_RE));
|
||||
|
||||
/* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
|
||||
tmpreg |= (uint32_t)USART_CR1_TE;
|
||||
|
||||
/* Write to USART CR1 */
|
||||
WRITE_REG(huart->Instance->CR1, (uint32_t)tmpreg);
|
||||
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables the UART receiver and disables the UART transmitter.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
|
||||
{
|
||||
uint32_t tmpreg = 0x00U;
|
||||
|
||||
/* Process Locked */
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
huart->gState = HAL_UART_STATE_BUSY;
|
||||
|
||||
/*-------------------------- USART CR1 Configuration -----------------------*/
|
||||
tmpreg = huart->Instance->CR1;
|
||||
|
||||
/* Clear TE and RE bits */
|
||||
tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_TE | USART_CR1_RE));
|
||||
|
||||
/* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
|
||||
tmpreg |= (uint32_t)USART_CR1_RE;
|
||||
|
||||
/* Write to USART CR1 */
|
||||
WRITE_REG(huart->Instance->CR1, (uint32_t)tmpreg);
|
||||
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Exported_Functions_Group4 Peripheral State and Errors functions
|
||||
* @brief UART State and Errors functions
|
||||
*
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### Peripheral State and Errors functions #####
|
||||
==============================================================================
|
||||
[..]
|
||||
This subsection provides a set of functions allowing to return the State of
|
||||
UART communication process, return Peripheral Errors occurred during communication
|
||||
process
|
||||
(+) HAL_UART_GetState() API can be helpful to check in run-time the state of the UART peripheral.
|
||||
(+) HAL_UART_GetError() check in run-time errors that could be occurred during communication.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Returns the UART state.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval HAL state
|
||||
*/
|
||||
HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart)
|
||||
{
|
||||
uint32_t temp1 = 0x00U, temp2 = 0x00U;
|
||||
temp1 = huart->gState;
|
||||
temp2 = huart->RxState;
|
||||
|
||||
return (HAL_UART_StateTypeDef)(temp1 | temp2);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return the UART error code
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART.
|
||||
* @retval UART Error Code
|
||||
*/
|
||||
uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart)
|
||||
{
|
||||
return huart->ErrorCode;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Private_Functions UART Private Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Initialize the callbacks to their default values.
|
||||
* @param huart UART handle.
|
||||
* @retval none
|
||||
*/
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Init the UART Callback settings */
|
||||
huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
|
||||
huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */
|
||||
huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
|
||||
huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */
|
||||
huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */
|
||||
huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
|
||||
huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */
|
||||
huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */
|
||||
huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak RxEventCallback */
|
||||
|
||||
}
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @brief DMA UART transmit process complete callback.
|
||||
* @param hdma Pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA module.
|
||||
* @retval None
|
||||
*/
|
||||
static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
|
||||
{
|
||||
UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
|
||||
/* DMA Normal mode*/
|
||||
if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
|
||||
{
|
||||
huart->TxXferCount = 0x00U;
|
||||
|
||||
/* Disable the DMA transfer for transmit request by setting the DMAT bit
|
||||
in the UART CR3 register */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
|
||||
|
||||
/* Enable the UART Transmit Complete Interrupt */
|
||||
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
|
||||
|
||||
}
|
||||
/* DMA Circular mode */
|
||||
else
|
||||
{
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/*Call registered Tx complete callback*/
|
||||
huart->TxCpltCallback(huart);
|
||||
#else
|
||||
/*Call legacy weak Tx complete callback*/
|
||||
HAL_UART_TxCpltCallback(huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DMA UART transmit process half complete callback
|
||||
* @param hdma Pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA module.
|
||||
* @retval None
|
||||
*/
|
||||
static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
|
||||
{
|
||||
UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/*Call registered Tx complete callback*/
|
||||
huart->TxHalfCpltCallback(huart);
|
||||
#else
|
||||
/*Call legacy weak Tx complete callback*/
|
||||
HAL_UART_TxHalfCpltCallback(huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DMA UART receive process complete callback.
|
||||
* @param hdma Pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA module.
|
||||
* @retval None
|
||||
*/
|
||||
static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
|
||||
{
|
||||
UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
|
||||
|
||||
/* DMA Normal mode*/
|
||||
if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
|
||||
{
|
||||
huart->RxXferCount = 0U;
|
||||
|
||||
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
|
||||
|
||||
/* Disable the DMA transfer for the receiver request by setting the DMAR bit
|
||||
in the UART CR3 register */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
|
||||
/* At end of Rx process, restore huart->RxState to Ready */
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
|
||||
/* If Reception till IDLE event has been selected, Disable IDLE Interrupt */
|
||||
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
|
||||
}
|
||||
}
|
||||
|
||||
/* Initialize type of RxEvent that correspond to RxEvent callback execution;
|
||||
In this case, Rx Event type is Transfer Complete */
|
||||
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||||
|
||||
/* Check current reception Mode :
|
||||
If Reception till IDLE event has been selected : use Rx Event callback */
|
||||
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
|
||||
{
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/*Call registered Rx Event callback*/
|
||||
huart->RxEventCallback(huart, huart->RxXferSize);
|
||||
#else
|
||||
/*Call legacy weak Rx Event callback*/
|
||||
HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* In other cases : use Rx Complete callback */
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/*Call registered Rx complete callback*/
|
||||
huart->RxCpltCallback(huart);
|
||||
#else
|
||||
/*Call legacy weak Rx complete callback*/
|
||||
HAL_UART_RxCpltCallback(huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DMA UART receive process half complete callback
|
||||
* @param hdma Pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA module.
|
||||
* @retval None
|
||||
*/
|
||||
static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
|
||||
{
|
||||
UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
|
||||
|
||||
/* Initialize type of RxEvent that correspond to RxEvent callback execution;
|
||||
In this case, Rx Event type is Half Transfer */
|
||||
huart->RxEventType = HAL_UART_RXEVENT_HT;
|
||||
|
||||
/* Check current reception Mode :
|
||||
If Reception till IDLE event has been selected : use Rx Event callback */
|
||||
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
|
||||
{
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/*Call registered Rx Event callback*/
|
||||
huart->RxEventCallback(huart, huart->RxXferSize / 2U);
|
||||
#else
|
||||
/*Call legacy weak Rx Event callback*/
|
||||
HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize / 2U);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* In other cases : use Rx Half Complete callback */
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/*Call registered Rx Half complete callback*/
|
||||
huart->RxHalfCpltCallback(huart);
|
||||
#else
|
||||
/*Call legacy weak Rx Half complete callback*/
|
||||
HAL_UART_RxHalfCpltCallback(huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DMA UART communication error callback.
|
||||
* @param hdma Pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA module.
|
||||
* @retval None
|
||||
*/
|
||||
static void UART_DMAError(DMA_HandleTypeDef *hdma)
|
||||
{
|
||||
uint32_t dmarequest = 0x00U;
|
||||
UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
|
||||
|
||||
/* Stop UART DMA Tx request if ongoing */
|
||||
dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
|
||||
if ((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
|
||||
{
|
||||
huart->TxXferCount = 0x00U;
|
||||
UART_EndTxTransfer(huart);
|
||||
}
|
||||
|
||||
/* Stop UART DMA Rx request if ongoing */
|
||||
dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
|
||||
{
|
||||
huart->RxXferCount = 0x00U;
|
||||
UART_EndRxTransfer(huart);
|
||||
}
|
||||
|
||||
huart->ErrorCode |= HAL_UART_ERROR_DMA;
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/*Call registered error callback*/
|
||||
huart->ErrorCallback(huart);
|
||||
#else
|
||||
/*Call legacy weak error callback*/
|
||||
HAL_UART_ErrorCallback(huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles UART Communication Timeout. It waits
|
||||
* until a flag is no longer in the specified status.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @param Flag specifies the UART flag to check.
|
||||
* @param Status The actual Flag status (SET or RESET).
|
||||
* @param Tickstart Tick start value
|
||||
* @param Timeout Timeout duration
|
||||
* @retval HAL status
|
||||
*/
|
||||
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
|
||||
uint32_t Tickstart, uint32_t Timeout)
|
||||
{
|
||||
/* Wait until flag is set */
|
||||
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
|
||||
{
|
||||
/* Check for the Timeout */
|
||||
if (Timeout != HAL_MAX_DELAY)
|
||||
{
|
||||
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
||||
{
|
||||
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
|
||||
if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC))
|
||||
{
|
||||
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
|
||||
{
|
||||
/* Clear Overrun Error flag*/
|
||||
__HAL_UART_CLEAR_OREFLAG(huart);
|
||||
|
||||
/* Blocking error : transfer is aborted
|
||||
Set the UART state ready to be able to start again the process,
|
||||
Disable Rx Interrupts if ongoing */
|
||||
UART_EndRxTransfer(huart);
|
||||
|
||||
huart->ErrorCode = HAL_UART_ERROR_ORE;
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
return HAL_ERROR;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Start Receive operation in interrupt mode.
|
||||
* @note This function could be called by all HAL UART API providing reception in Interrupt mode.
|
||||
* @note When calling this function, parameters validity is considered as already checked,
|
||||
* i.e. Rx State, buffer address, ...
|
||||
* UART Handle is assumed as Locked.
|
||||
* @param huart UART handle.
|
||||
* @param pData Pointer to data buffer (u8 or u16 data elements).
|
||||
* @param Size Amount of data elements (u8 or u16) to be received.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
|
||||
{
|
||||
huart->pRxBuffPtr = pData;
|
||||
huart->RxXferSize = Size;
|
||||
huart->RxXferCount = Size;
|
||||
|
||||
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
huart->RxState = HAL_UART_STATE_BUSY_RX;
|
||||
|
||||
if (huart->Init.Parity != UART_PARITY_NONE)
|
||||
{
|
||||
/* Enable the UART Parity Error Interrupt */
|
||||
__HAL_UART_ENABLE_IT(huart, UART_IT_PE);
|
||||
}
|
||||
|
||||
/* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
|
||||
__HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
|
||||
|
||||
/* Enable the UART Data Register not empty Interrupt */
|
||||
__HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Start Receive operation in DMA mode.
|
||||
* @note This function could be called by all HAL UART API providing reception in DMA mode.
|
||||
* @note When calling this function, parameters validity is considered as already checked,
|
||||
* i.e. Rx State, buffer address, ...
|
||||
* UART Handle is assumed as Locked.
|
||||
* @param huart UART handle.
|
||||
* @param pData Pointer to data buffer (u8 or u16 data elements).
|
||||
* @param Size Amount of data elements (u8 or u16) to be received.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
|
||||
{
|
||||
uint32_t *tmp;
|
||||
|
||||
huart->pRxBuffPtr = pData;
|
||||
huart->RxXferSize = Size;
|
||||
|
||||
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
huart->RxState = HAL_UART_STATE_BUSY_RX;
|
||||
|
||||
/* Set the UART DMA transfer complete callback */
|
||||
huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
|
||||
|
||||
/* Set the UART DMA Half transfer complete callback */
|
||||
huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
|
||||
|
||||
/* Set the DMA error callback */
|
||||
huart->hdmarx->XferErrorCallback = UART_DMAError;
|
||||
|
||||
/* Set the DMA abort callback */
|
||||
huart->hdmarx->XferAbortCallback = NULL;
|
||||
|
||||
/* Enable the DMA stream */
|
||||
tmp = (uint32_t *)&pData;
|
||||
HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t *)tmp, Size);
|
||||
|
||||
/* Clear the Overrun flag just before enabling the DMA Rx request: can be mandatory for the second transfer */
|
||||
__HAL_UART_CLEAR_OREFLAG(huart);
|
||||
|
||||
if (huart->Init.Parity != UART_PARITY_NONE)
|
||||
{
|
||||
/* Enable the UART Parity Error Interrupt */
|
||||
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
|
||||
}
|
||||
|
||||
/* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
|
||||
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
|
||||
|
||||
/* Enable the DMA transfer for the receiver request by setting the DMAR bit
|
||||
in the UART CR3 register */
|
||||
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion).
|
||||
* @param huart UART handle.
|
||||
* @retval None
|
||||
*/
|
||||
static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Disable TXEIE and TCIE interrupts */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
|
||||
|
||||
/* At end of Tx process, restore huart->gState to Ready */
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
|
||||
* @param huart UART handle.
|
||||
* @retval None
|
||||
*/
|
||||
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
|
||||
|
||||
/* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
|
||||
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
|
||||
{
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
|
||||
}
|
||||
|
||||
/* At end of Rx process, restore huart->RxState to Ready */
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DMA UART communication abort callback, when initiated by HAL services on Error
|
||||
* (To be called at end of DMA Abort procedure following error occurrence).
|
||||
* @param hdma Pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA module.
|
||||
* @retval None
|
||||
*/
|
||||
static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
|
||||
{
|
||||
UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
|
||||
huart->RxXferCount = 0x00U;
|
||||
huart->TxXferCount = 0x00U;
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/*Call registered error callback*/
|
||||
huart->ErrorCallback(huart);
|
||||
#else
|
||||
/*Call legacy weak error callback*/
|
||||
HAL_UART_ErrorCallback(huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DMA UART Tx communication abort callback, when initiated by user
|
||||
* (To be called at end of DMA Tx Abort procedure following user abort request).
|
||||
* @note When this callback is executed, User Abort complete call back is called only if no
|
||||
* Abort still ongoing for Rx DMA Handle.
|
||||
* @param hdma Pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA module.
|
||||
* @retval None
|
||||
*/
|
||||
static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
|
||||
{
|
||||
UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
|
||||
|
||||
huart->hdmatx->XferAbortCallback = NULL;
|
||||
|
||||
/* Check if an Abort process is still ongoing */
|
||||
if (huart->hdmarx != NULL)
|
||||
{
|
||||
if (huart->hdmarx->XferAbortCallback != NULL)
|
||||
{
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
/* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
|
||||
huart->TxXferCount = 0x00U;
|
||||
huart->RxXferCount = 0x00U;
|
||||
|
||||
/* Reset ErrorCode */
|
||||
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
|
||||
/* Restore huart->gState and huart->RxState to Ready */
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
||||
|
||||
/* Call user Abort complete callback */
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/* Call registered Abort complete callback */
|
||||
huart->AbortCpltCallback(huart);
|
||||
#else
|
||||
/* Call legacy weak Abort complete callback */
|
||||
HAL_UART_AbortCpltCallback(huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DMA UART Rx communication abort callback, when initiated by user
|
||||
* (To be called at end of DMA Rx Abort procedure following user abort request).
|
||||
* @note When this callback is executed, User Abort complete call back is called only if no
|
||||
* Abort still ongoing for Tx DMA Handle.
|
||||
* @param hdma Pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA module.
|
||||
* @retval None
|
||||
*/
|
||||
static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
|
||||
{
|
||||
UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
|
||||
|
||||
huart->hdmarx->XferAbortCallback = NULL;
|
||||
|
||||
/* Check if an Abort process is still ongoing */
|
||||
if (huart->hdmatx != NULL)
|
||||
{
|
||||
if (huart->hdmatx->XferAbortCallback != NULL)
|
||||
{
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
/* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
|
||||
huart->TxXferCount = 0x00U;
|
||||
huart->RxXferCount = 0x00U;
|
||||
|
||||
/* Reset ErrorCode */
|
||||
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
|
||||
/* Restore huart->gState and huart->RxState to Ready */
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
||||
|
||||
/* Call user Abort complete callback */
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/* Call registered Abort complete callback */
|
||||
huart->AbortCpltCallback(huart);
|
||||
#else
|
||||
/* Call legacy weak Abort complete callback */
|
||||
HAL_UART_AbortCpltCallback(huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DMA UART Tx communication abort callback, when initiated by user by a call to
|
||||
* HAL_UART_AbortTransmit_IT API (Abort only Tx transfer)
|
||||
* (This callback is executed at end of DMA Tx Abort procedure following user abort request,
|
||||
* and leads to user Tx Abort Complete callback execution).
|
||||
* @param hdma Pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA module.
|
||||
* @retval None
|
||||
*/
|
||||
static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
|
||||
{
|
||||
UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
|
||||
|
||||
huart->TxXferCount = 0x00U;
|
||||
|
||||
/* Restore huart->gState to Ready */
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
|
||||
/* Call user Abort complete callback */
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/* Call registered Abort Transmit Complete Callback */
|
||||
huart->AbortTransmitCpltCallback(huart);
|
||||
#else
|
||||
/* Call legacy weak Abort Transmit Complete Callback */
|
||||
HAL_UART_AbortTransmitCpltCallback(huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DMA UART Rx communication abort callback, when initiated by user by a call to
|
||||
* HAL_UART_AbortReceive_IT API (Abort only Rx transfer)
|
||||
* (This callback is executed at end of DMA Rx Abort procedure following user abort request,
|
||||
* and leads to user Rx Abort Complete callback execution).
|
||||
* @param hdma Pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA module.
|
||||
* @retval None
|
||||
*/
|
||||
static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
|
||||
{
|
||||
UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
|
||||
|
||||
huart->RxXferCount = 0x00U;
|
||||
|
||||
/* Restore huart->RxState to Ready */
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
||||
|
||||
/* Call user Abort complete callback */
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/* Call registered Abort Receive Complete Callback */
|
||||
huart->AbortReceiveCpltCallback(huart);
|
||||
#else
|
||||
/* Call legacy weak Abort Receive Complete Callback */
|
||||
HAL_UART_AbortReceiveCpltCallback(huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sends an amount of data in non blocking mode.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart)
|
||||
{
|
||||
const uint16_t *tmp;
|
||||
|
||||
/* Check that a Tx process is ongoing */
|
||||
if (huart->gState == HAL_UART_STATE_BUSY_TX)
|
||||
{
|
||||
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
|
||||
{
|
||||
tmp = (const uint16_t *) huart->pTxBuffPtr;
|
||||
huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
|
||||
huart->pTxBuffPtr += 2U;
|
||||
}
|
||||
else
|
||||
{
|
||||
huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF);
|
||||
}
|
||||
|
||||
if (--huart->TxXferCount == 0U)
|
||||
{
|
||||
/* Disable the UART Transmit Data Register Empty Interrupt */
|
||||
__HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
|
||||
|
||||
/* Enable the UART Transmit Complete Interrupt */
|
||||
__HAL_UART_ENABLE_IT(huart, UART_IT_TC);
|
||||
}
|
||||
return HAL_OK;
|
||||
}
|
||||
else
|
||||
{
|
||||
return HAL_BUSY;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Wraps up transmission in non blocking mode.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Disable the UART Transmit Complete Interrupt */
|
||||
__HAL_UART_DISABLE_IT(huart, UART_IT_TC);
|
||||
|
||||
/* Tx process is ended, restore huart->gState to Ready */
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/*Call registered Tx complete callback*/
|
||||
huart->TxCpltCallback(huart);
|
||||
#else
|
||||
/*Call legacy weak Tx complete callback*/
|
||||
HAL_UART_TxCpltCallback(huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Receives an amount of data in non blocking mode
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart)
|
||||
{
|
||||
uint8_t *pdata8bits;
|
||||
uint16_t *pdata16bits;
|
||||
|
||||
/* Check that a Rx process is ongoing */
|
||||
if (huart->RxState == HAL_UART_STATE_BUSY_RX)
|
||||
{
|
||||
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
|
||||
{
|
||||
pdata8bits = NULL;
|
||||
pdata16bits = (uint16_t *) huart->pRxBuffPtr;
|
||||
*pdata16bits = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
|
||||
huart->pRxBuffPtr += 2U;
|
||||
}
|
||||
else
|
||||
{
|
||||
pdata8bits = (uint8_t *) huart->pRxBuffPtr;
|
||||
pdata16bits = NULL;
|
||||
|
||||
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE)))
|
||||
{
|
||||
*pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
|
||||
}
|
||||
else
|
||||
{
|
||||
*pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
|
||||
}
|
||||
huart->pRxBuffPtr += 1U;
|
||||
}
|
||||
|
||||
if (--huart->RxXferCount == 0U)
|
||||
{
|
||||
/* Disable the UART Data Register not empty Interrupt */
|
||||
__HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
|
||||
|
||||
/* Disable the UART Parity Error Interrupt */
|
||||
__HAL_UART_DISABLE_IT(huart, UART_IT_PE);
|
||||
|
||||
/* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
|
||||
__HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
|
||||
|
||||
/* Rx process is completed, restore huart->RxState to Ready */
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
|
||||
/* Initialize type of RxEvent to Transfer Complete */
|
||||
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||||
|
||||
/* Check current reception Mode :
|
||||
If Reception till IDLE event has been selected : */
|
||||
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
|
||||
{
|
||||
/* Set reception type to Standard */
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
||||
|
||||
/* Disable IDLE interrupt */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
|
||||
|
||||
/* Check if IDLE flag is set */
|
||||
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE))
|
||||
{
|
||||
/* Clear IDLE flag in ISR */
|
||||
__HAL_UART_CLEAR_IDLEFLAG(huart);
|
||||
}
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/*Call registered Rx Event callback*/
|
||||
huart->RxEventCallback(huart, huart->RxXferSize);
|
||||
#else
|
||||
/*Call legacy weak Rx Event callback*/
|
||||
HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Standard reception API called */
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/*Call registered Rx complete callback*/
|
||||
huart->RxCpltCallback(huart);
|
||||
#else
|
||||
/*Call legacy weak Rx complete callback*/
|
||||
HAL_UART_RxCpltCallback(huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
}
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
return HAL_OK;
|
||||
}
|
||||
else
|
||||
{
|
||||
return HAL_BUSY;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures the UART peripheral.
|
||||
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified UART module.
|
||||
* @retval None
|
||||
*/
|
||||
static void UART_SetConfig(UART_HandleTypeDef *huart)
|
||||
{
|
||||
uint32_t tmpreg;
|
||||
uint32_t pclk;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
|
||||
assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
|
||||
assert_param(IS_UART_PARITY(huart->Init.Parity));
|
||||
assert_param(IS_UART_MODE(huart->Init.Mode));
|
||||
|
||||
/*-------------------------- USART CR2 Configuration -----------------------*/
|
||||
/* Configure the UART Stop Bits: Set STOP[13:12] bits
|
||||
according to huart->Init.StopBits value */
|
||||
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
|
||||
|
||||
/*-------------------------- USART CR1 Configuration -----------------------*/
|
||||
/* Configure the UART Word Length, Parity and mode:
|
||||
Set the M bits according to huart->Init.WordLength value
|
||||
Set PCE and PS bits according to huart->Init.Parity value
|
||||
Set TE and RE bits according to huart->Init.Mode value
|
||||
Set OVER8 bit according to huart->Init.OverSampling value */
|
||||
|
||||
#if defined(USART_CR1_OVER8)
|
||||
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
|
||||
MODIFY_REG(huart->Instance->CR1,
|
||||
(uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
|
||||
tmpreg);
|
||||
#else
|
||||
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
|
||||
MODIFY_REG(huart->Instance->CR1,
|
||||
(uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE),
|
||||
tmpreg);
|
||||
#endif /* USART_CR1_OVER8 */
|
||||
|
||||
/*-------------------------- USART CR3 Configuration -----------------------*/
|
||||
/* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
|
||||
MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
|
||||
|
||||
|
||||
if(huart->Instance == USART1)
|
||||
{
|
||||
pclk = HAL_RCC_GetPCLK2Freq();
|
||||
}
|
||||
else
|
||||
{
|
||||
pclk = HAL_RCC_GetPCLK1Freq();
|
||||
}
|
||||
|
||||
/*-------------------------- USART BRR Configuration ---------------------*/
|
||||
#if defined(USART_CR1_OVER8)
|
||||
if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
|
||||
{
|
||||
huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
|
||||
}
|
||||
else
|
||||
{
|
||||
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
|
||||
}
|
||||
#else
|
||||
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
|
||||
#endif /* USART_CR1_OVER8 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
Reference in New Issue
Block a user