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//###########################################################################
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//
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// FILE: Example_2833xMCBSP_SPIX.c
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//
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// TITLE: DSP28133x Device McBSP using SPI mode
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//
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// ASSUMPTIONS:
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//
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// This program requires the DSP2833x header files.
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// As supplied, this project is configured for "boot to SARAM"
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// operation. The 2833x Boot Mode table is shown below.
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// For information on configuring the boot mode of an eZdsp,
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// please refer to the documentation included with the eZdsp,
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//
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// $Boot_Table:
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//
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// GPIO87 GPIO86 GPIO85 GPIO84
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// XA15 XA14 XA13 XA12
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// PU PU PU PU
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// ==========================================
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// 1 1 1 1 Jump to Flash
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// 1 1 1 0 SCI-A boot
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// 1 1 0 1 SPI-A boot
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// 1 1 0 0 I2C-A boot
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// 1 0 1 1 eCAN-A boot
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// 1 0 1 0 McBSP-A boot
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// 1 0 0 1 Jump to XINTF x16
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// 1 0 0 0 Jump to XINTF x32
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// 0 1 1 1 Jump to OTP
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// 0 1 1 0 Parallel GPIO I/O boot
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// 0 1 0 1 Parallel XINTF boot
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// 0 1 0 0 Jump to SARAM <- "boot to SARAM"
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// 0 0 1 1 Branch to check boot mode
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// 0 0 1 0 Boot to flash, bypass ADC cal
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// 0 0 0 1 Boot to SARAM, bypass ADC cal
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// 0 0 0 0 Boot to SCI-A, bypass ADC cal
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// Boot_Table_End$
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//
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// DESCRIPTION:
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//
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// SPI master mode transfer of 32-bit word size with digital loopback enabled.
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//
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// McBSP Signals SPI equivalent
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// -------------------------------------
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// MCLKX SPICLK (master)
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// MFSX SPISTE (master)
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// MDX SPISIMO
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// MCLKR SPICLK (slave - not used for this example)
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// MFSR SPISTE (slave - not used for this example)
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// MDR SPISOMI (not used for this example)
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//
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// This program will execute and transmit words until terminated by the user.
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//
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// By default for the McBSP examples, the McBSP sample rate generator (SRG) input
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// clock frequency is LSPCLK (150E6/4 or 100E6/4) assuming SYSCLKOUT = 150 MHz or
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// 100 MHz respectively. If while testing, the SRG input frequency
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// is changed, the #define MCBSP_SRG_FREQ (CPU_SPD/4) in the Mcbsp.c file must
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// also be updated accordingly. This define is used to determine the Mcbsp initialization
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// delay after the SRG is enabled, which must be at least 2 SRG clock cycles.
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//
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// Watch Variables:
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// sdata1
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// sdata2
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// rdata1
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// rdata2
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//
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//
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//###########################################################################
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//
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// Original Author: S.S.
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//
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// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
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// $Release Date: August 1, 2008 $
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//###########################################################################
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#include "DSP28x_Project.h" // Device Headerfile and Examples Include File
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// Prototype statements for functions found within this file.
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void init_mcbsp_spi(void);
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void mcbsp_xmit(int a, int b);
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void error(void);
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// Global data for this example
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Uint16 sdata1 = 0x000; // Sent Data
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Uint16 rdata1 = 0x000; // Recieved Data
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Uint16 sdata2 = 0x000; // Sent Data
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Uint16 rdata2 = 0x000; // Recieved Data
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void main(void)
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{
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// Uint16 i;
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// Step 1. Initialize System Control:
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// PLL, WatchDog, enable Peripheral Clocks
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// This example function is found in the DSP2833x_SysCtrl.c file.
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InitSysCtrl();
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// Step 2. Initalize GPIO:
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// This example function is found in the DSP2833x_Gpio.c file and
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// illustrates how to set the GPIO to it's default state.
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// InitGpio(); // Skipped for this example
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// For this example, only enable the GPIO for McBSP-A
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InitMcbspaGpio();
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// Step 3. Clear all interrupts and initialize PIE vector table:
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// Disable CPU interrupts
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DINT;
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// Initialize PIE control registers to their default state.
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// The default state is all PIE interrupts disabled and flags
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// are cleared.
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// This function is found in the DSP2833x_PieCtrl.c file.
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InitPieCtrl();
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// Disable CPU interrupts and clear all CPU interrupt flags:
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IER = 0x0000;
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IFR = 0x0000;
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// Initialize the PIE vector table with pointers to the shell Interrupt
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// Service Routines (ISR).
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// This will populate the entire table, even if the interrupt
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// is not used in this example. This is useful for debug purposes.
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// The shell ISR routines are found in DSP281x_DefaultIsr.c.
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// This function is found in DSP2833x_PieVect.c.
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InitPieVectTable();
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// Step 4. Initialize all the Device Peripherals:
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// This function is found in DSP2833x_InitPeripherals.c
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// InitPeripherals(); // Not required for this example
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// Step 5. User specific code,
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init_mcbsp_spi();
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sdata1 = 0x55aa;
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sdata2 = 0xaa55;
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// Main loop to transfer 32-bit words through MCBSP in SPI mode periodically
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for(;;)
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{
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mcbsp_xmit(sdata1,sdata2);
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while( McbspaRegs.SPCR1.bit.RRDY == 0 ) {} // Master waits until RX data is ready
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rdata2 = McbspaRegs.DRR2.all; // Read DRR2 first.
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rdata1 = McbspaRegs.DRR1.all; // Then read DRR1 to complete receiving of data
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if((rdata2 != sdata2)&&(rdata1 != sdata1)) error( ); // Check that correct data is received.
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delay_loop();
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sdata1^=0xFFFF;
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sdata2^=0xFFFF;
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asm(" nop"); // Good place for a breakpoint
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}
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}
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// Some Useful local functions
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void error(void)
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{
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asm(" ESTOP0"); // test failed!! Stop!
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for (;;);
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}
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void init_mcbsp_spi()
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{
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// McBSP-A register settings
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McbspaRegs.SPCR2.all=0x0000; // Reset FS generator, sample rate generator & transmitter
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McbspaRegs.SPCR1.all=0x0000; // Reset Receiver, Right justify word, Digital loopback dis.
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McbspaRegs.PCR.all=0x0F08; //(CLKXM=CLKRM=FSXM=FSRM= 1, FSXP = 1)
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McbspaRegs.SPCR1.bit.DLB = 1;
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McbspaRegs.SPCR1.bit.CLKSTP = 2; // Together with CLKXP/CLKRP determines clocking scheme
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McbspaRegs.PCR.bit.CLKXP = 0; // CPOL = 0, CPHA = 0 rising edge no delay
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McbspaRegs.PCR.bit.CLKRP = 0;
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McbspaRegs.RCR2.bit.RDATDLY=01; // FSX setup time 1 in master mode. 0 for slave mode (Receive)
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McbspaRegs.XCR2.bit.XDATDLY=01; // FSX setup time 1 in master mode. 0 for slave mode (Transmit)
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McbspaRegs.RCR1.bit.RWDLEN1=5; // 32-bit word
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McbspaRegs.XCR1.bit.XWDLEN1=5; // 32-bit word
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McbspaRegs.SRGR2.all=0x2000; // CLKSM=1, FPER = 1 CLKG periods
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McbspaRegs.SRGR1.all= 0x000F; // Frame Width = 1 CLKG period, CLKGDV=16
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McbspaRegs.SPCR2.bit.GRST=1; // Enable the sample rate generator
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delay_loop(); // Wait at least 2 SRG clock cycles
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McbspaRegs.SPCR2.bit.XRST=1; // Release TX from Reset
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McbspaRegs.SPCR1.bit.RRST=1; // Release RX from Reset
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McbspaRegs.SPCR2.bit.FRST=1; // Frame Sync Generator reset
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}
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void mcbsp_xmit(int a, int b)
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{
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McbspaRegs.DXR2.all=b;
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McbspaRegs.DXR1.all=a;
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}
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//===========================================================================
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// No more.
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//===========================================================================
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@@ -0,0 +1,28 @@
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menuitem "DSP2833x McBSP SPI DLB"
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hotmenu Load_and_Build_Project()
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{
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GEL_ProjectLoad("Example_2833xMcBSP_SPI_DLB.pjt");
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GEL_ProjectBuild("Example_2833xMcBSP_SPI_DLB.pjt");
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Setup_WatchWindow();
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}
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hotmenu Load_Code()
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{
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GEL_Load(".\\debug\\Example_2833xMcBSP_SPI_DLB.out");
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Setup_WatchWindow();
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}
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Setup_WatchWindow()
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{
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GEL_WatchReset();
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GEL_WatchAdd("sdata1,x");
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GEL_WatchAdd("rdata1,x");
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GEL_WatchAdd("sdata2,x");
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GEL_WatchAdd("rdata2,x");
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}
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@@ -0,0 +1,45 @@
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; Code Composer Project File, Version 2.0 (do not modify or remove this line)
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[Project Settings]
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ProjectName="DSP2833x"
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ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\mcbsp_spi_loopback\"
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ProjectType=Executable
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CPUFamily=TMS320C28XX
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Tool="Compiler"
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Tool="DspBiosBuilder"
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Tool="Linker"
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Config="Debug"
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Config="Release"
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[Source Files]
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Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
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Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
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Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
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Source="..\..\DSP2833x_common\source\DSP2833x_McBSP.c"
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Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
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Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
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Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
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Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
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Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
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Source="Example_2833xMcBSP_SPI_DLB.c"
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Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
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Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
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["Compiler" Settings: "Debug"]
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Options=-g -q -pdr -as -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\mcbsp_spi_loopback\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\mcbsp_spi_loopback\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
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["Compiler" Settings: "Release"]
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Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\mcbsp_spi_loopback\Release" -d"LARGE_MODEL" -ml -v28
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["DspBiosBuilder" Settings: "Debug"]
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Options=-v28
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["DspBiosBuilder" Settings: "Release"]
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Options=-v28
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["Linker" Settings: "Debug"]
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Options=-q -c -m".\Debug\Example_2833xMcBSP_DLB_int.map" -o".\Debug\Example_2833xMcBSP_SPI_DLB.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
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["Linker" Settings: "Release"]
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Options=-q -c -o".\Release\Example_2833xMcBSP_SPI_DLB.out" -x
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