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// TI File $Revision: /main/10 $
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// Checkin $Date: April 21, 2008 15:40:57 $
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//###########################################################################
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//
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// FILE: Example_2833xAdcSeqModeTest.c
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//
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// TITLE: DSP2833x ADC Seq Mode Test.
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//
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// ASSUMPTIONS:
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//
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// This program requires the DSP2833x header files.
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//
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// Make sure the CPU clock speed is properly defined in
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// DSP2833x_Examples.h before compiling this example.
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//
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// Connect the signal to be converted to channel A0.
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//
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// As supplied, this project is configured for "boot to SARAM"
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// operation. The 2833x Boot Mode table is shown below.
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// For information on configuring the boot mode of an eZdsp,
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// please refer to the documentation included with the eZdsp,
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//
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// $Boot_Table:
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//
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// GPIO87 GPIO86 GPIO85 GPIO84
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// XA15 XA14 XA13 XA12
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// PU PU PU PU
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// ==========================================
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// 1 1 1 1 Jump to Flash
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// 1 1 1 0 SCI-A boot
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// 1 1 0 1 SPI-A boot
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// 1 1 0 0 I2C-A boot
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// 1 0 1 1 eCAN-A boot
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// 1 0 1 0 McBSP-A boot
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// 1 0 0 1 Jump to XINTF x16
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// 1 0 0 0 Jump to XINTF x32
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// 0 1 1 1 Jump to OTP
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// 0 1 1 0 Parallel GPIO I/O boot
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// 0 1 0 1 Parallel XINTF boot
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// 0 1 0 0 Jump to SARAM <- "boot to SARAM"
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// 0 0 1 1 Branch to check boot mode
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// 0 0 1 0 Boot to flash, bypass ADC cal
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// 0 0 0 1 Boot to SARAM, bypass ADC cal
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// 0 0 0 0 Boot to SCI-A, bypass ADC cal
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// Boot_Table_End$
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//
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// DESCRIPTION:
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//
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// Channel A0 is converted forever and logged in a buffer (SampleTable)
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//
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// Open a memory window to SampleTable to observe the buffer
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// RUN for a while and stop and see the table contents.
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//
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// Watch Variables:
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// SampleTable - Log of converted values.
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//
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//###########################################################################
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//
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// Original source by: S.S.
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//
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// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
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// $Release Date: August 1, 2008 $
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//###########################################################################
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#include "DSP28x_Project.h" // Device Headerfile and Examples Include File
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// ADC start parameters
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#if (CPU_FRQ_150MHZ) // Default - 150 MHz SYSCLKOUT
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#define ADC_MODCLK 0x3 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3) = 25.0 MHz
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#endif
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#if (CPU_FRQ_100MHZ)
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#define ADC_MODCLK 0x2 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*2) = 25.0 MHz
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#endif
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#define ADC_CKPS 0x1 // ADC module clock = HSPCLK/2*ADC_CKPS = 25.0MHz/(1*2) = 12.5MHz
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#define ADC_SHCLK 0xf // S/H width in ADC module periods = 16 ADC clocks
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#define AVG 1000 // Average sample limit
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#define ZOFFSET 0x00 // Average Zero offset
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#define BUF_SIZE 2048 // Sample buffer size
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// Global variable for this example
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Uint16 SampleTable[BUF_SIZE];
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main()
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{
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Uint16 i;
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// Step 1. Initialize System Control:
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// PLL, WatchDog, enable Peripheral Clocks
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// This example function is found in the DSP2833x_SysCtrl.c file.
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InitSysCtrl();
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// Specific clock setting for this example:
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EALLOW;
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SysCtrlRegs.HISPCP.all = ADC_MODCLK; // HSPCLK = SYSCLKOUT/ADC_MODCLK
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EDIS;
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// Step 2. Initialize GPIO:
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// This example function is found in the DSP2833x_Gpio.c file and
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// illustrates how to set the GPIO to it's default state.
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// InitGpio(); // Skipped for this example
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// Step 3. Clear all interrupts and initialize PIE vector table:
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// Disable CPU interrupts
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DINT;
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// Initialize the PIE control registers to their default state.
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// The default state is all PIE interrupts disabled and flags
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// are cleared.
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// This function is found in the DSP2833x_PieCtrl.c file.
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InitPieCtrl();
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// Disable CPU interrupts and clear all CPU interrupt flags:
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IER = 0x0000;
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IFR = 0x0000;
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// Initialize the PIE vector table with pointers to the shell Interrupt
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// Service Routines (ISR).
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// This will populate the entire table, even if the interrupt
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// is not used in this example. This is useful for debug purposes.
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// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
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// This function is found in DSP2833x_PieVect.c.
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InitPieVectTable();
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// Step 4. Initialize all the Device Peripherals:
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// This function is found in DSP2833x_InitPeripherals.c
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// InitPeripherals(); // Not required for this example
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InitAdc(); // For this example, init the ADC
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// Specific ADC setup for this example:
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AdcRegs.ADCTRL1.bit.ACQ_PS = ADC_SHCLK;
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AdcRegs.ADCTRL3.bit.ADCCLKPS = ADC_CKPS;
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AdcRegs.ADCTRL1.bit.SEQ_CASC = 1; // 1 Cascaded mode
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AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0;
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AdcRegs.ADCTRL1.bit.CONT_RUN = 1; // Setup continuous run
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// Step 5. User specific code, enable interrupts:
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// Clear SampleTable
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for (i=0; i<BUF_SIZE; i++)
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{
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SampleTable[i] = 0;
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}
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// Start SEQ1
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AdcRegs.ADCTRL2.all = 0x2000;
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// Take ADC data and log the in SampleTable array
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for(;;)
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{
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for (i=0; i<AVG; i++)
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{
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while (AdcRegs.ADCST.bit.INT_SEQ1== 0) {} // Wait for interrupt
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AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;
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SampleTable[i] =((AdcRegs.ADCRESULT0>>4) );
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}
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}
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}
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//===========================================================================
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// No more.
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//===========================================================================
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@@ -0,0 +1,37 @@
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/*
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// TI File $Revision: /main/5 $
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// Checkin $Date: August 9, 2007 17:11:47 $
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//###########################################################################
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//
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// This .gel file can be used to help load and build the example project.
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// It should be unloaded from Code Composer Studio before loading another
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// project.
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//
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//###########################################################################
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// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
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// $Release Date: August 1, 2008 $
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//###########################################################################
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*/
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menuitem "DSP2833x ADC Seq Test"
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hotmenu Load_and_Build_Project()
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{
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GEL_ProjectLoad("Example_2833xAdcSeqModeTest.pjt");
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GEL_ProjectBuild("Example_2833xAdcSeqModeTest.pjt");
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Setup_WatchWindow();
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}
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hotmenu Load_Code()
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{
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GEL_Load(".\\debug\\Example_2833xAdcSeqModeTest.out");
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Setup_WatchWindow();
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}
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hotmenu Setup_WatchWindow()
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{
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GEL_WatchReset();
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GEL_WatchAdd("SampleTable,x");
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GEL_WatchAdd("AdcRegs,x");
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}
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@@ -0,0 +1,45 @@
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; Code Composer Project File, Version 2.0 (do not modify or remove this line)
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[Project Settings]
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ProjectName="DSP2833x"
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ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\adc_seqmode_test\"
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ProjectType=Executable
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CPUFamily=TMS320C28XX
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Tool="Compiler"
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Tool="DspBiosBuilder"
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Tool="Linker"
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Config="Debug"
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Config="Release"
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[Source Files]
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Source="..\..\DSP2833x_common\source\DSP2833x_Adc.c"
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Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
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Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
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Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
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Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
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Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
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Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
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Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
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Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
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Source="Example_2833xAdcSeqModeTest.c"
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Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
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Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
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["Compiler" Settings: "Debug"]
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Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\adc_seqmode_test\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\adc_seqmode_test\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
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["Compiler" Settings: "Release"]
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Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\adc_seqmode_test\Release" -d"LARGE_MODEL" -ml -v28
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["DspBiosBuilder" Settings: "Debug"]
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Options=-v28
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["DspBiosBuilder" Settings: "Release"]
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Options=-v28
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["Linker" Settings: "Debug"]
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Options=-q -c -ecode_start -m".\Debug\Example_2833xAdcSeqModeTest.map" -o".\Debug\Example_2833xAdcSeqModeTest.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
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["Linker" Settings: "Release"]
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Options=-q -c -o".\Release\Example_2833xAdcSeqModeTest.out" -x
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